The document discusses Boolean arithmetic and building basic computing components like adders and arithmetic logic units (ALUs) using logic gates. It introduces binary number representation and addition, as well as representing negative numbers. Half adders and full adders are presented as the basic building blocks for adding bits and numbers. An n-bit adder can add two n-bit numbers by chaining together full adders. The ALU is designed to perform basic arithmetic and logical operations on inputs based on control bits, and is a key component in central processing units. The document provides a high-level overview of representing and performing arithmetic at the digital circuit level.
This is a classroom presentation for the basic concepts of HDL, using Verilog as the programming language. Module 3 deals with programmable logic devices.
This is a classroom presentation for the basic concepts of HDL, using Verilog as the programming language. Module 3 deals with programmable logic devices.
Adapted from Harris & Harris Digital Design and Computer Arch.docxnettletondevon
Adapted from Harris & Harris “Digital Design and Computer Architecture” resources
EECE 343 Advanced Logic Design
Assignment 1
Introduction
In this assignment, you will design a simple digital circuit called a full adder. Along the way,
you will learn to use the Altera field-programmable gate array (FPGA) tools to enter a schematic,
simulate your design, and download your design onto a chip.
After completing the assignment, you are required to turn in something from each part. Refer to
the “Deliverables” section at the end of this handout before beginning the assignment.
Note:
For additional information about how to use Quartus II, refer to the following tutorials on
BbLearn under the tutorials section:
• Getting Started with DE series boards
• Quartus II Introduction
• ModelSim GUI Introduction
• Using ModelSim
• DE2_Pin Table
Background: Adders
An adder, not surprisingly, is a circuit whose output is the binary sum of its inputs. Since adders
are needed to perform arithmetic, they are an essential part of any computer. The full adder will
be an integral part of the microprocessor that you design in later assignments.
A full adder has three inputs (A, B, Cin) and two outputs (S, Cout), as shown in Figure 1. Inputs A
and B each represent 1-bit binary numbers that are being added, and S represents a bit of the
resulting sum.
A B
S
C
out
C
in+
Figure 1. Full adder
The Cin (carry in) and Cout (carry out) signals are used when adding numbers that are more than
one bit long. To understand how these signals are used, consider how you would add the binary
numbers 101 and 001 by hand:
1
101
+ 001
110
As with decimal addition, you first add the two least significant bits. Since 1+1=10 (in binary),
you place a zero in the least significant bit of the sum and carry the 1. Then you add the next
two bits with the carry, and place a 1 in the second bit of the sum. Finally, you add the most
significant bits (with no carry) and get a 1 in the most significant bit of the sum.
When a sum is performed using full adders, each adder handles a single column of the sum.
Figure 2 shows how to build a circuit that adds two 3-digit binary numbers using three full
adders. The Cout for each bit is connected to the Cin of the next most significant bit. Each bit of
the 3-bit numbers being added is connected to the appropriate adder’s inputs and the three sum
outputs (S2:0) make up the full 3-bit sum result.
S
2
A
1
B
1
S
1
A
0
B
0
S
0
C
1
C
0
C
out +++
A
2
B
2
C
in
Figure 2. 3-bit adder
Note that the rightmost Cin input is unnecessary, since there can never be a carry into the first
column of the sum. This would allow us to use a half adder for the first bit of the sum. A half
adder is similar to a full adder, except that it lacks a Cin and is thus simpler to implement. To
save you design time, however, you will only build a full adder in.
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nand2tetris 舊版投影片 -- 第二章 布林算術
1. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 1
www.nand2tetris.org
Building a Modern Computer From First Principles
Boolean Arithmetic
3. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 3
Rationale
192121202021)10011( 01234
=⋅+⋅+⋅+⋅+⋅=two
i
n
i
ibnn bxxxx ⋅= ∑=
−
0
01 )...(
9038018013010019)9038( 0123
=⋅+⋅+⋅+⋅=ten
4. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 4
no overflow overflow
Algorithm: exactly the same as in decimal addition
Overflow (MSB carry) has to be dealt with.
Binary addition
Assuming a 4-bit system:
0 0 0 1
1 0 0 1
0 1 0 1
0 1 1 1 0
++++
1 1 1 1
1 0 1 1
0 1 1 1
1 0 0 1 0
++++
5. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 5
Representing negative numbers (4-bit system)
The codes of all positive numbers
begin with a “0”
The codes of all negative numbers
begin with a “1“
To convert a number:
leave all trailing 0’s and first 1 intact,
and flip all the remaining bits
0 0000
1 0001 1111 -1
2 0010 1110 -2
3 0011 1101 -3
4 0100 1100 -4
5 0101 1011 -5
6 0110 1010 -6
7 0111 1001 -7
1000 -8
Example: 2 - 5 = 2 + (-5) = 0 0 1 0
+ 1 0 1 1
1 1 0 1 = -3
6. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 6
Building an Adder chip
Adder: a chip designed to add two integers
Proposed implementation:
Half adder: designed to add 2 bits
Full adder: designed to add 3 bits
Adder: designed to add two n-bit numbers.
out
a
16
16-bit
adder
b
16
16
7. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 7
Half adder (designed to add 2 bits)
Implementation: based on two gates that you’ve seen before.
half
adder
a sum
b carry
a b sum carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
8. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 8
Full adder (designed to add 3 bits)
Implementation: can be based on half-adder gates.
a b c sum carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
fu ll
ad d er
a
sum
b
carry
c
9. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 9
n-bit Adder (designed to add two 16-bit numbers)
Implementation: array of full-adder gates.
out
a
16
16-bit
adder
b
16
16
... 1 0 1 1 a
… 0 0 1 0 b
… 1 1 0 1 out
++++
10. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 10
The ALU (of the Hack platform)
half
adder
a sum
b carry
full
ad der
a
sum
b
carry
c
out
x
16
16-bit
adder
y
16
16
zx no
zr
nx zy ny f
ALU
ng
16 bits
16 bits
x
y 16 bits
out
out(x, y, control bits) =
x+y, x-y, y–x,
0, 1, -1,
x, y, -x, -y,
x!, y!,
x+1, y+1, x-1, y-1,
x&y, x|y
11. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 11
ALU logic (Hack platform)
Implementation: build a logic gate architecture
that “executes” the control bit “instructions”:
if zx==1 then set x to 0 (bit-wise), etc.
12. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 12
The ALU in the CPU context (a sneak preview of the Hack platform)
ALU
Mux
D
out
A/M
a
D register
A register
A
M
c1,c2, … ,c6
RAM
(selected
register)
13. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 13
Perspective
Combinational logic
Our adder design is very basic: no parallelism
It pays to optimize adders
Our ALU is also very basic: no multiplication, no division
Where is the seat of more advanced math operations?
a typical hardware/software tradeoff.
14. Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 2: Boolean Arithmetic slide 14
Historical end-note: Leibnitz (1646-1716)
“The binary system may be used in place of the decimal system;
express all numbers by unity and by nothing”
1679: built a mechanical calculator (+, -, *, /)
CHALLENGE: “All who are occupied with the
reading or writing of scientific literature have
assuredly very often felt the want of a common
scientific language, and regretted the great loss of
time and trouble caused by the multiplicity of
languages employed in scientific literature:
SOLUTION: “Characteristica Universalis”: a
universal, formal, and decidable language of
reasoning
The dream’s end: Turing and Gödel in 1930’s.
Leibniz’s medallion
for the Duke of Brunswick