This document discusses different methods for control logic design including one flip-flop per state, sequence register and decoder, PLA control, microprogram control, and hard-wired control. It also describes the steps to design hard-wired control which are to state the problem, assume an initial equipment configuration, formulate an algorithm, specify the data processor, and design the control logic. Finally, it provides details on microprogram control including the hardware configuration, the microprogram, microprogram sequencer, and microprogrammed CPU organization.

1. MODULE VI
CONTROL LOGIC DESIGN
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2. Control and data-processor interaction
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3. Control Organization
 Four Methods:
1. One flip-flop per state method
2. Sequence register and decoder method.
3. PLA control
4. Microprogram control
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4. One flip-flop per state method
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5. 5

6. Control logic with sequence register and decoder
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7. PLA Control(Programmable Logic Array)
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8. Microprogram Control Logic
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9. Hard-wired Control
 The Design is carried out in five steps:
1. The problem is stated.
2. An initial equipment configuration is assumed.
3. An algorithm is formulated.
4. The data-processor part is specified.
5. The control logic is designed.
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10. Statement of the Problem:
 The problem here is to implement with hardware the
addition and subtraction of two fixed point binary
numbers represented in sign magnitude form.
 Compliment arithmetic may be used, provided the final
result is in sign - magnitude form.
 The addition of two numbers stored in registers of finite
length may result a sum that exceeds the storage
capacity of the register by one bit.
 The extra bit is said to cause an overflow.The circuit
must provide a flip-flop for storing a possible overflow
bit.
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11. Equipment Configuration
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12. Derivation of Algorithm
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13. Data Processor Specification
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14. 14

15. Control State Diagram
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16. 16

17. Design of Hard-wired Control
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18. MICROPROGRAM CONTROL
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19. Hardware configuration
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21. The microprogram
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23. Microprogram Sequencer
 Address sequencing capabilities of a typical sequencer:
1. increments the present address for control memory
2. Branches to an address as specified by the address
field of the microinstruction
3. Branches to a given address if a specified status bit is
equal to 1.
4. Transfers control to a new address as specified by an
external source.
5. Has a facility for subroutine call and returns.
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25. 25

26. Microprogrammed CPU Organization
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