SlideShare a Scribd company logo
MODULE-V
Part-I
Processor Logic Design
1
 Contents
• Register Transfer Logic
 Inter Register Transfer
 Arithmetic Microoperations
 Logic Microoperations
 Shift Microoperations
• Conditional Control Statements
2
3
Registers
 Register
• a collection of binary storage elements
• included a set of flip-flop
• n-bit register store n-bit binary information
 Frequently used to perform simple data
storage and data movement and processing
operations
4
Register and Load Enable
Register with load enable
by clock gating
5
Register transfer
 Large digital systems are often designed by modular,
hierarchical approach
 Large digital systems are partitioned into two types of modules
• Data path: performs data-processing operations
• Control unit: determine the sequence of those operations
6
Register transfer
 The registers are assumed to be basic components of the
digital system
 Register transfer operation: movement on the data stored
in register and the processing performed on the data
 The basic components for describing a digital system in
register transfer logic is:
• The set of registers in digital systems and their
functions.
• The operations performed on the data
• Control on the sequence of operations
Register transfer Operations
 Microoperations: operations executed on data stored in one
or more registers.
 For any function of the computer, a sequence of
micro operations is used to describe it
 The result of the operation may be:
• replace the previous binary information of a register or
• transferred to another register
7
Register Transfer Language
 Register Transfer Language (RTL) : a symbolic notation to
describe the microoperation transfers among registers
Next steps:
• Define symbols for various types of microoperations,
• Describe the hardware that implements these
microoperations
 A statement in a register transfer language consists of a
control function and a list of micro operations.
8
 The type of microoperations in digital systems can be
classified into four categories:
• Interregister –transfer microoperations do not change the
information content when the binary information moves from one
register to another.
• Arithmetic micro operations perform arithmetic on numbers stored
in registers.
• Logic microoperations perform operations such as AND and OR on
individual pairs of bits stored in registers.
• Shift microopeartions specify operations for shift registers.
9
10
InterRegister Transfer
 Computer registers are designated by capital letters
(sometimes followed by numerals) to denote the function
of the register
 R1: processor register
 MAR: Memory Address Register (holds an address
for a memory unit)
 PC: Program Counter
 IR: Instruction Register
 SR: Status Register
 The individual flip-flops in an n-bit register are numbered
in sequence from 0 to n-1 (from the right position toward
the left position)
11
R1
Register R1
7 6 5 4 3 2 1 0
Showing individual bits
A block diagram of a register
12
PC
Numberingof bits
Partitioned intotwoparts
15 0
PC(H)
PC(L)
07815
LowerbyteUpperbyte
Other ways of drawing the block diagram of a register:
13
 Information transfer from one register to another is described
by a replacement operator: R2 ← R1
 This statement denotes a transfer of the content of register R1
into register R2
 The transfer happens in one clock cycle
 The content of the R1 (source) does not change
 The content of the R2 (destination) will be lost and replaced by
the new data transferred from R1
 We are assuming that the circuits are available from the outputs
of the source register to the inputs of the destination register,
and that the destination register has a parallel load capability
14
 The condition which determines when the transfer is to occur
is called a control function.
 Conditional transfer occurs only under a control condition
 Representation of a (conditional) transfer
P: R2 ← R1
 A binary condition (P equals to 0 or 1) determines when the
transfer occurs
 The content of R1 is transferred into R2 only if P is 1
15
 The control function is included with the statement is as
follows:
x’T1: A ← B
 The control function is terminated with a colon.
 It shows that the transfer operation be executed by the
hardware only when the Boolean function x’T1 = 1
• i.e,when variable x=0 and timing variable T1 = 1
16
Hardware implementation for the
above statement is as follows
17
18
7-3 Register Transfer Operations
More register transfer operation executed at the same time:
K3: R2 ←R1, R1 ←R2
 Consider the two statements:
 T1: C ← A
 T5: C ← B
• Destination register receives information from two
sources, but not at the same time.
19
20
Bus and Memory Transfers
 Paths must be provided to transfer information from one register
to another
 A Common Bus System is a scheme for transferring information
between registers in a multiple-register configuration
 A bus: set of common lines, one for each bit of a register,
through which binary information is transferred one at a time
 Control signals determine which register is selected by the bus
during each particular register transfer
21
22
23
24
Memory Transfer
 Memory read : Transfer from memory
 Memory write : Transfer to memory
 Data being read or wrote is called a memory word (called
M)
 It is necessary to specify the address of M when writing
/reading memory
 This is done by enclosing the address in square brackets
following the letter M
 Example: M[0016] : the memory contents at address
0x0016
25
26
 Assume that the address of a memory unit is
stored in a register called the Address
Register AR
 Lets represent a Data Register with DR,
then:
 Read: DR ← M[AR]
 Write: M[AR] ← DR
27
Memory Transfer
28
 The transfer of information from a bus into one of many
destination registers is done:
• By connecting the bus lines to the inputs of all
destination registers and then:
• activating the load control of the particular destination
register selected
 We write: R2 ← C to symbolize that the content of register
C is loaded into the register R2 using the common system
bus
 It is equivalent to: BUS ←C, (select C)
R2 ←BUS (Load R2)
29
30
Arithmetic Microoperations
 The basic arithmetic microoperations are: addition,
subtraction, increment, decrement, and shift
 Addition Microoperation:
R3 ←R1+R2
 Subtraction Microoperation:
R3 ←R1-R2 or :
R3 ←R1+R2+1
31
 One’s Complement Microoperation:
R2 ←R2
 Two’s Complement Microoperation:
R2 ←R2+1
 Increment Microoperation:
R2 ←R2+1
 Decrement Microoperation:
R2 ←R2-1
32
33
34
Logic microoperations
 Logic microoperations specify binary operations for a
string of bits stored in registers.
 These operations consider each bit in the registers
seperately and treat it as a binary variable.
 Exclusive –OR operation symbolized by the statement:
F ← A ⊕ B
 If the contents of register A is 1010 and B is 1100, the
information transferred to register F is 0110:
 1010 content of A
 1100 content of B
 0110 content of F ← A ⊕ B
35
 16 different possible logic operations that
can be performed with two binary variables,
 The symbol ∨ will be used to denote OR
microoperation and the symbol ∧ to denote
an AND microoperation.
 Complement microoperation is the sameas
1’s complement and use a bar on top of the
letter that denotes the register.
36
Logic microoperations
37
Shift Microoperations
 Used for serial transfer of data
 Also used in conjunction with arithmetic, logic, and other
data-processing operations
 The contents of the register can be shifted to the left or to
the right
 As being shifted, the first flip-flop receives its binary
information from the serial input
 Three types of shift: Logical, Circular, and Arithmetic
38
39
41
42
43
44
45
CONDITIONAL CONTROL STATEMENTS
 Conditional control statement is symbolized by an if-then –
else statement as follows:
 P: If (condition) then [microoperation(s)] else
[microoperation(s)]
• It means that if the control condition stated within the
parentheses after the word if is true, then the
microoperation enclosed within the parentheses after
the word then is executed.
• If the condition is not true, the microoperation listed
after the word else is executed.
• In any case the control function P must occur for
anything to be done.
46
 Eg:
 T2: If(C=0) then (F ← 1) else (F ← 0)
 F is assumed to be a 1-bit register(flip-flop) that can be set
or cleared.
 If register C is a 1-bit register, the statement is equivalent
to the following two statements:
C’T2: F ←1
CT2: F ←0
• Only one of the microoperation will be executed during T2,
depending on the value of C
47

More Related Content

What's hot

Intel 8051 Programming in C
Intel 8051 Programming in CIntel 8051 Programming in C
Intel 8051 Programming in C
Sudhanshu Janwadkar
 
Finite State Machine.ppt.pptx
Finite State Machine.ppt.pptxFinite State Machine.ppt.pptx
Finite State Machine.ppt.pptx
SKUP1
 
Peripherals of Microprocessor 8085
Peripherals of Microprocessor 8085Peripherals of Microprocessor 8085
Peripherals of Microprocessor 8085
Nilesh Bhaskarrao Bahadure
 
Interrupts and types of interrupts
Interrupts and types of interruptsInterrupts and types of interrupts
Interrupts and types of interrupts
Muhammad Sheharyar Asif
 
Stacks & subroutines 1
Stacks & subroutines 1Stacks & subroutines 1
Stacks & subroutines 1
deval patel
 
design of accumlator
design of accumlatordesign of accumlator
design of accumlator
SangeethaSasi1
 
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Rahul Borthakur
 
Half adder & full adder
Half adder & full adderHalf adder & full adder
Half adder & full adder
Gaditek
 
Recognition-of-tokens
Recognition-of-tokensRecognition-of-tokens
Recognition-of-tokens
Dattatray Gandhmal
 
Real time Operating System
Real time Operating SystemReal time Operating System
Real time Operating SystemTech_MX
 
Real Time Operating system (RTOS) - Embedded systems
Real Time Operating system (RTOS) - Embedded systemsReal Time Operating system (RTOS) - Embedded systems
Real Time Operating system (RTOS) - Embedded systems
Hariharan Ganesan
 
ARM Exception and interrupts
ARM Exception and interrupts ARM Exception and interrupts
ARM Exception and interrupts
NishmaNJ
 
Timing and control
Timing and controlTiming and control
Timing and control
chauhankapil
 
Asynchronous Sequential Circuit-Unit 4 ppt
Asynchronous Sequential Circuit-Unit 4 pptAsynchronous Sequential Circuit-Unit 4 ppt
Asynchronous Sequential Circuit-Unit 4 ppt
SIVALAKSHMIPANNEERSE
 
Applications of Mealy & Moore Machine
Applications of  Mealy  & Moore Machine Applications of  Mealy  & Moore Machine
Applications of Mealy & Moore Machine
SardarKashifKhan
 
Datapath Design of Computer Architecture
Datapath Design of Computer ArchitectureDatapath Design of Computer Architecture
Datapath Design of Computer Architecture
Abu Zaman
 
Registers
RegistersRegisters
Registers
Sanjeev Patel
 
T-states in microprocessor 8085
T-states in microprocessor 8085T-states in microprocessor 8085
T-states in microprocessor 8085yedles
 
Code Conversion in 8085 Microprocessor
Code Conversion in 8085 MicroprocessorCode Conversion in 8085 Microprocessor
Code Conversion in 8085 Microprocessor
MOHIT AGARWAL
 

What's hot (20)

Intel 8051 Programming in C
Intel 8051 Programming in CIntel 8051 Programming in C
Intel 8051 Programming in C
 
Finite State Machine.ppt.pptx
Finite State Machine.ppt.pptxFinite State Machine.ppt.pptx
Finite State Machine.ppt.pptx
 
Peripherals of Microprocessor 8085
Peripherals of Microprocessor 8085Peripherals of Microprocessor 8085
Peripherals of Microprocessor 8085
 
Interrupts and types of interrupts
Interrupts and types of interruptsInterrupts and types of interrupts
Interrupts and types of interrupts
 
Stacks & subroutines 1
Stacks & subroutines 1Stacks & subroutines 1
Stacks & subroutines 1
 
design of accumlator
design of accumlatordesign of accumlator
design of accumlator
 
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
 
Half adder & full adder
Half adder & full adderHalf adder & full adder
Half adder & full adder
 
Recognition-of-tokens
Recognition-of-tokensRecognition-of-tokens
Recognition-of-tokens
 
Real time Operating System
Real time Operating SystemReal time Operating System
Real time Operating System
 
Real Time Operating system (RTOS) - Embedded systems
Real Time Operating system (RTOS) - Embedded systemsReal Time Operating system (RTOS) - Embedded systems
Real Time Operating system (RTOS) - Embedded systems
 
ARM Exception and interrupts
ARM Exception and interrupts ARM Exception and interrupts
ARM Exception and interrupts
 
Timing and control
Timing and controlTiming and control
Timing and control
 
Asynchronous Sequential Circuit-Unit 4 ppt
Asynchronous Sequential Circuit-Unit 4 pptAsynchronous Sequential Circuit-Unit 4 ppt
Asynchronous Sequential Circuit-Unit 4 ppt
 
Applications of Mealy & Moore Machine
Applications of  Mealy  & Moore Machine Applications of  Mealy  & Moore Machine
Applications of Mealy & Moore Machine
 
Datapath Design of Computer Architecture
Datapath Design of Computer ArchitectureDatapath Design of Computer Architecture
Datapath Design of Computer Architecture
 
Registers
RegistersRegisters
Registers
 
T-states in microprocessor 8085
T-states in microprocessor 8085T-states in microprocessor 8085
T-states in microprocessor 8085
 
Code Conversion in 8085 Microprocessor
Code Conversion in 8085 MicroprocessorCode Conversion in 8085 Microprocessor
Code Conversion in 8085 Microprocessor
 
Status register
Status registerStatus register
Status register
 

Similar to Module 5 part1

LEC 2-register transfer and register transfer language.ppt
LEC 2-register transfer and register transfer language.pptLEC 2-register transfer and register transfer language.ppt
LEC 2-register transfer and register transfer language.ppt
mailmynew202
 
Micro operations
Micro operationsMicro operations
Micro operations
Ramakrishna Reddy Bijjam
 
Computer organization prashant odhavani- 160920107003
Computer organization   prashant odhavani- 160920107003Computer organization   prashant odhavani- 160920107003
Computer organization prashant odhavani- 160920107003
Prashant odhavani
 
Chapter4.ppt
Chapter4.pptChapter4.ppt
Chapter4.ppt
AshokRachapalli1
 
Chapter4.ppt
Chapter4.pptChapter4.ppt
Chapter4.ppt
SangeetaTripathi8
 
unit1COA Computer Organisation and Architecture
unit1COA Computer Organisation and Architectureunit1COA Computer Organisation and Architecture
unit1COA Computer Organisation and Architecture
SwapnitaSrivastava1
 
CS304PC:Computer Organization and Architecture Session 2 Registers .pptx
CS304PC:Computer Organization and Architecture Session 2 Registers .pptxCS304PC:Computer Organization and Architecture Session 2 Registers .pptx
CS304PC:Computer Organization and Architecture Session 2 Registers .pptx
Asst.prof M.Gokilavani
 
Register transfer and micro operation
Register transfer and micro operationRegister transfer and micro operation
Register transfer and micro operation
Kamal Acharya
 
overview of register transfer, micro operations and basic computer organizati...
overview of register transfer, micro operations and basic computer organizati...overview of register transfer, micro operations and basic computer organizati...
overview of register transfer, micro operations and basic computer organizati...
Rai University
 
Mca i-u-2-overview of register transfer, micro operations and basic computer ...
Mca i-u-2-overview of register transfer, micro operations and basic computer ...Mca i-u-2-overview of register transfer, micro operations and basic computer ...
Mca i-u-2-overview of register transfer, micro operations and basic computer ...
Rai University
 
Register transfer and microoperations
Register transfer and microoperationsRegister transfer and microoperations
Register transfer and microoperations
SURBHI SAROHA
 
B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...
Rai University
 
Chapter 4
Chapter 4Chapter 4
Chapter 4
Soumyajit Dutta
 
Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...
Rai University
 
jekdndnenejidjrjenenjejejejjejriririiriri
jekdndnenejidjrjenenjejejejjejriririiririjekdndnenejidjrjenenjejejejjejriririiriri
jekdndnenejidjrjenenjejejejjejriririiriri
MitShah72
 
Register reference
Register referenceRegister reference
Register referenceNitesh Singh
 
RTL
RTLRTL
Register transfer and microoperations
Register transfer and microoperationsRegister transfer and microoperations
Register transfer and microoperations
mahesh kumar prajapat
 
REGISTER TRANSFER AND MICROOPERATIONS
REGISTER  TRANSFER  AND  MICROOPERATIONSREGISTER  TRANSFER  AND  MICROOPERATIONS
REGISTER TRANSFER AND MICROOPERATIONS
Dr. Ajay Kumar Singh
 
Register transfer and microoperations part 1
Register transfer and microoperations part 1Register transfer and microoperations part 1
Register transfer and microoperations part 1
Prasenjit Dey
 

Similar to Module 5 part1 (20)

LEC 2-register transfer and register transfer language.ppt
LEC 2-register transfer and register transfer language.pptLEC 2-register transfer and register transfer language.ppt
LEC 2-register transfer and register transfer language.ppt
 
Micro operations
Micro operationsMicro operations
Micro operations
 
Computer organization prashant odhavani- 160920107003
Computer organization   prashant odhavani- 160920107003Computer organization   prashant odhavani- 160920107003
Computer organization prashant odhavani- 160920107003
 
Chapter4.ppt
Chapter4.pptChapter4.ppt
Chapter4.ppt
 
Chapter4.ppt
Chapter4.pptChapter4.ppt
Chapter4.ppt
 
unit1COA Computer Organisation and Architecture
unit1COA Computer Organisation and Architectureunit1COA Computer Organisation and Architecture
unit1COA Computer Organisation and Architecture
 
CS304PC:Computer Organization and Architecture Session 2 Registers .pptx
CS304PC:Computer Organization and Architecture Session 2 Registers .pptxCS304PC:Computer Organization and Architecture Session 2 Registers .pptx
CS304PC:Computer Organization and Architecture Session 2 Registers .pptx
 
Register transfer and micro operation
Register transfer and micro operationRegister transfer and micro operation
Register transfer and micro operation
 
overview of register transfer, micro operations and basic computer organizati...
overview of register transfer, micro operations and basic computer organizati...overview of register transfer, micro operations and basic computer organizati...
overview of register transfer, micro operations and basic computer organizati...
 
Mca i-u-2-overview of register transfer, micro operations and basic computer ...
Mca i-u-2-overview of register transfer, micro operations and basic computer ...Mca i-u-2-overview of register transfer, micro operations and basic computer ...
Mca i-u-2-overview of register transfer, micro operations and basic computer ...
 
Register transfer and microoperations
Register transfer and microoperationsRegister transfer and microoperations
Register transfer and microoperations
 
B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...
B.sc cs-ii-u-2.1-overview of register transfer, micro operations and basic co...
 
Chapter 4
Chapter 4Chapter 4
Chapter 4
 
Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...
Bca 2nd sem-u-2.1-overview of register transfer, micro operations and basic c...
 
jekdndnenejidjrjenenjejejejjejriririiriri
jekdndnenejidjrjenenjejejejjejriririiririjekdndnenejidjrjenenjejejejjejriririiriri
jekdndnenejidjrjenenjejejejjejriririiriri
 
Register reference
Register referenceRegister reference
Register reference
 
RTL
RTLRTL
RTL
 
Register transfer and microoperations
Register transfer and microoperationsRegister transfer and microoperations
Register transfer and microoperations
 
REGISTER TRANSFER AND MICROOPERATIONS
REGISTER  TRANSFER  AND  MICROOPERATIONSREGISTER  TRANSFER  AND  MICROOPERATIONS
REGISTER TRANSFER AND MICROOPERATIONS
 
Register transfer and microoperations part 1
Register transfer and microoperations part 1Register transfer and microoperations part 1
Register transfer and microoperations part 1
 

More from cs19club

Podd notes
Podd notesPodd notes
Podd notes
cs19club
 
Podd note 1
Podd note 1Podd note 1
Podd note 1
cs19club
 
Podd mod6
Podd mod6Podd mod6
Podd mod6
cs19club
 
Module 3
Module 3Module 3
Module 3
cs19club
 
Ch05
Ch05Ch05
Ch05
cs19club
 
Ch04
Ch04Ch04
Ch04
cs19club
 
Oodp extra2
Oodp extra2Oodp extra2
Oodp extra2
cs19club
 
Oodp mod4
Oodp mod4Oodp mod4
Oodp mod4
cs19club
 
Module vi
Module viModule vi
Module vi
cs19club
 
Module5 part2
Module5 part2Module5 part2
Module5 part2
cs19club
 
Module4
Module4Module4
Module4
cs19club
 
Io pro
Io proIo pro
Io pro
cs19club
 
Io pro
Io proIo pro
Io pro
cs19club
 
Floating point arithmetic operations (1)
Floating point arithmetic operations (1)Floating point arithmetic operations (1)
Floating point arithmetic operations (1)
cs19club
 
Coa module2
Coa module2Coa module2
Coa module2
cs19club
 
Addition and subtraction with signed magnitude data (mano
Addition and subtraction with signed magnitude data (manoAddition and subtraction with signed magnitude data (mano
Addition and subtraction with signed magnitude data (mano
cs19club
 
Coa module1
Coa module1Coa module1
Coa module1
cs19club
 

More from cs19club (17)

Podd notes
Podd notesPodd notes
Podd notes
 
Podd note 1
Podd note 1Podd note 1
Podd note 1
 
Podd mod6
Podd mod6Podd mod6
Podd mod6
 
Module 3
Module 3Module 3
Module 3
 
Ch05
Ch05Ch05
Ch05
 
Ch04
Ch04Ch04
Ch04
 
Oodp extra2
Oodp extra2Oodp extra2
Oodp extra2
 
Oodp mod4
Oodp mod4Oodp mod4
Oodp mod4
 
Module vi
Module viModule vi
Module vi
 
Module5 part2
Module5 part2Module5 part2
Module5 part2
 
Module4
Module4Module4
Module4
 
Io pro
Io proIo pro
Io pro
 
Io pro
Io proIo pro
Io pro
 
Floating point arithmetic operations (1)
Floating point arithmetic operations (1)Floating point arithmetic operations (1)
Floating point arithmetic operations (1)
 
Coa module2
Coa module2Coa module2
Coa module2
 
Addition and subtraction with signed magnitude data (mano
Addition and subtraction with signed magnitude data (manoAddition and subtraction with signed magnitude data (mano
Addition and subtraction with signed magnitude data (mano
 
Coa module1
Coa module1Coa module1
Coa module1
 

Recently uploaded

Thesis Statement for students diagnonsed withADHD.ppt
Thesis Statement for students diagnonsed withADHD.pptThesis Statement for students diagnonsed withADHD.ppt
Thesis Statement for students diagnonsed withADHD.ppt
EverAndrsGuerraGuerr
 
How to Split Bills in the Odoo 17 POS Module
How to Split Bills in the Odoo 17 POS ModuleHow to Split Bills in the Odoo 17 POS Module
How to Split Bills in the Odoo 17 POS Module
Celine George
 
Fish and Chips - have they had their chips
Fish and Chips - have they had their chipsFish and Chips - have they had their chips
Fish and Chips - have they had their chips
GeoBlogs
 
PART A. Introduction to Costumer Service
PART A. Introduction to Costumer ServicePART A. Introduction to Costumer Service
PART A. Introduction to Costumer Service
PedroFerreira53928
 
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
siemaillard
 
Students, digital devices and success - Andreas Schleicher - 27 May 2024..pptx
Students, digital devices and success - Andreas Schleicher - 27 May 2024..pptxStudents, digital devices and success - Andreas Schleicher - 27 May 2024..pptx
Students, digital devices and success - Andreas Schleicher - 27 May 2024..pptx
EduSkills OECD
 
The approach at University of Liverpool.pptx
The approach at University of Liverpool.pptxThe approach at University of Liverpool.pptx
The approach at University of Liverpool.pptx
Jisc
 
Palestine last event orientationfvgnh .pptx
Palestine last event orientationfvgnh .pptxPalestine last event orientationfvgnh .pptx
Palestine last event orientationfvgnh .pptx
RaedMohamed3
 
special B.ed 2nd year old paper_20240531.pdf
special B.ed 2nd year old paper_20240531.pdfspecial B.ed 2nd year old paper_20240531.pdf
special B.ed 2nd year old paper_20240531.pdf
Special education needs
 
Operation Blue Star - Saka Neela Tara
Operation Blue Star   -  Saka Neela TaraOperation Blue Star   -  Saka Neela Tara
Operation Blue Star - Saka Neela Tara
Balvir Singh
 
Model Attribute Check Company Auto Property
Model Attribute  Check Company Auto PropertyModel Attribute  Check Company Auto Property
Model Attribute Check Company Auto Property
Celine George
 
Ethnobotany and Ethnopharmacology ......
Ethnobotany and Ethnopharmacology ......Ethnobotany and Ethnopharmacology ......
Ethnobotany and Ethnopharmacology ......
Ashokrao Mane college of Pharmacy Peth-Vadgaon
 
Home assignment II on Spectroscopy 2024 Answers.pdf
Home assignment II on Spectroscopy 2024 Answers.pdfHome assignment II on Spectroscopy 2024 Answers.pdf
Home assignment II on Spectroscopy 2024 Answers.pdf
Tamralipta Mahavidyalaya
 
The French Revolution Class 9 Study Material pdf free download
The French Revolution Class 9 Study Material pdf free downloadThe French Revolution Class 9 Study Material pdf free download
The French Revolution Class 9 Study Material pdf free download
Vivekanand Anglo Vedic Academy
 
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
siemaillard
 
Polish students' mobility in the Czech Republic
Polish students' mobility in the Czech RepublicPolish students' mobility in the Czech Republic
Polish students' mobility in the Czech Republic
Anna Sz.
 
Language Across the Curriculm LAC B.Ed.
Language Across the  Curriculm LAC B.Ed.Language Across the  Curriculm LAC B.Ed.
Language Across the Curriculm LAC B.Ed.
Atul Kumar Singh
 
Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46
Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46
Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46
MysoreMuleSoftMeetup
 
Instructions for Submissions thorugh G- Classroom.pptx
Instructions for Submissions thorugh G- Classroom.pptxInstructions for Submissions thorugh G- Classroom.pptx
Instructions for Submissions thorugh G- Classroom.pptx
Jheel Barad
 
Chapter 3 - Islamic Banking Products and Services.pptx
Chapter 3 - Islamic Banking Products and Services.pptxChapter 3 - Islamic Banking Products and Services.pptx
Chapter 3 - Islamic Banking Products and Services.pptx
Mohd Adib Abd Muin, Senior Lecturer at Universiti Utara Malaysia
 

Recently uploaded (20)

Thesis Statement for students diagnonsed withADHD.ppt
Thesis Statement for students diagnonsed withADHD.pptThesis Statement for students diagnonsed withADHD.ppt
Thesis Statement for students diagnonsed withADHD.ppt
 
How to Split Bills in the Odoo 17 POS Module
How to Split Bills in the Odoo 17 POS ModuleHow to Split Bills in the Odoo 17 POS Module
How to Split Bills in the Odoo 17 POS Module
 
Fish and Chips - have they had their chips
Fish and Chips - have they had their chipsFish and Chips - have they had their chips
Fish and Chips - have they had their chips
 
PART A. Introduction to Costumer Service
PART A. Introduction to Costumer ServicePART A. Introduction to Costumer Service
PART A. Introduction to Costumer Service
 
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
 
Students, digital devices and success - Andreas Schleicher - 27 May 2024..pptx
Students, digital devices and success - Andreas Schleicher - 27 May 2024..pptxStudents, digital devices and success - Andreas Schleicher - 27 May 2024..pptx
Students, digital devices and success - Andreas Schleicher - 27 May 2024..pptx
 
The approach at University of Liverpool.pptx
The approach at University of Liverpool.pptxThe approach at University of Liverpool.pptx
The approach at University of Liverpool.pptx
 
Palestine last event orientationfvgnh .pptx
Palestine last event orientationfvgnh .pptxPalestine last event orientationfvgnh .pptx
Palestine last event orientationfvgnh .pptx
 
special B.ed 2nd year old paper_20240531.pdf
special B.ed 2nd year old paper_20240531.pdfspecial B.ed 2nd year old paper_20240531.pdf
special B.ed 2nd year old paper_20240531.pdf
 
Operation Blue Star - Saka Neela Tara
Operation Blue Star   -  Saka Neela TaraOperation Blue Star   -  Saka Neela Tara
Operation Blue Star - Saka Neela Tara
 
Model Attribute Check Company Auto Property
Model Attribute  Check Company Auto PropertyModel Attribute  Check Company Auto Property
Model Attribute Check Company Auto Property
 
Ethnobotany and Ethnopharmacology ......
Ethnobotany and Ethnopharmacology ......Ethnobotany and Ethnopharmacology ......
Ethnobotany and Ethnopharmacology ......
 
Home assignment II on Spectroscopy 2024 Answers.pdf
Home assignment II on Spectroscopy 2024 Answers.pdfHome assignment II on Spectroscopy 2024 Answers.pdf
Home assignment II on Spectroscopy 2024 Answers.pdf
 
The French Revolution Class 9 Study Material pdf free download
The French Revolution Class 9 Study Material pdf free downloadThe French Revolution Class 9 Study Material pdf free download
The French Revolution Class 9 Study Material pdf free download
 
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
 
Polish students' mobility in the Czech Republic
Polish students' mobility in the Czech RepublicPolish students' mobility in the Czech Republic
Polish students' mobility in the Czech Republic
 
Language Across the Curriculm LAC B.Ed.
Language Across the  Curriculm LAC B.Ed.Language Across the  Curriculm LAC B.Ed.
Language Across the Curriculm LAC B.Ed.
 
Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46
Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46
Mule 4.6 & Java 17 Upgrade | MuleSoft Mysore Meetup #46
 
Instructions for Submissions thorugh G- Classroom.pptx
Instructions for Submissions thorugh G- Classroom.pptxInstructions for Submissions thorugh G- Classroom.pptx
Instructions for Submissions thorugh G- Classroom.pptx
 
Chapter 3 - Islamic Banking Products and Services.pptx
Chapter 3 - Islamic Banking Products and Services.pptxChapter 3 - Islamic Banking Products and Services.pptx
Chapter 3 - Islamic Banking Products and Services.pptx
 

Module 5 part1

  • 2.  Contents • Register Transfer Logic  Inter Register Transfer  Arithmetic Microoperations  Logic Microoperations  Shift Microoperations • Conditional Control Statements 2
  • 3. 3 Registers  Register • a collection of binary storage elements • included a set of flip-flop • n-bit register store n-bit binary information  Frequently used to perform simple data storage and data movement and processing operations
  • 4. 4 Register and Load Enable Register with load enable by clock gating
  • 5. 5 Register transfer  Large digital systems are often designed by modular, hierarchical approach  Large digital systems are partitioned into two types of modules • Data path: performs data-processing operations • Control unit: determine the sequence of those operations
  • 6. 6 Register transfer  The registers are assumed to be basic components of the digital system  Register transfer operation: movement on the data stored in register and the processing performed on the data  The basic components for describing a digital system in register transfer logic is: • The set of registers in digital systems and their functions. • The operations performed on the data • Control on the sequence of operations
  • 7. Register transfer Operations  Microoperations: operations executed on data stored in one or more registers.  For any function of the computer, a sequence of micro operations is used to describe it  The result of the operation may be: • replace the previous binary information of a register or • transferred to another register 7
  • 8. Register Transfer Language  Register Transfer Language (RTL) : a symbolic notation to describe the microoperation transfers among registers Next steps: • Define symbols for various types of microoperations, • Describe the hardware that implements these microoperations  A statement in a register transfer language consists of a control function and a list of micro operations. 8
  • 9.  The type of microoperations in digital systems can be classified into four categories: • Interregister –transfer microoperations do not change the information content when the binary information moves from one register to another. • Arithmetic micro operations perform arithmetic on numbers stored in registers. • Logic microoperations perform operations such as AND and OR on individual pairs of bits stored in registers. • Shift microopeartions specify operations for shift registers. 9
  • 10. 10 InterRegister Transfer  Computer registers are designated by capital letters (sometimes followed by numerals) to denote the function of the register  R1: processor register  MAR: Memory Address Register (holds an address for a memory unit)  PC: Program Counter  IR: Instruction Register  SR: Status Register
  • 11.  The individual flip-flops in an n-bit register are numbered in sequence from 0 to n-1 (from the right position toward the left position) 11 R1 Register R1 7 6 5 4 3 2 1 0 Showing individual bits A block diagram of a register
  • 12. 12 PC Numberingof bits Partitioned intotwoparts 15 0 PC(H) PC(L) 07815 LowerbyteUpperbyte Other ways of drawing the block diagram of a register:
  • 13. 13  Information transfer from one register to another is described by a replacement operator: R2 ← R1  This statement denotes a transfer of the content of register R1 into register R2  The transfer happens in one clock cycle  The content of the R1 (source) does not change  The content of the R2 (destination) will be lost and replaced by the new data transferred from R1  We are assuming that the circuits are available from the outputs of the source register to the inputs of the destination register, and that the destination register has a parallel load capability
  • 14. 14  The condition which determines when the transfer is to occur is called a control function.  Conditional transfer occurs only under a control condition  Representation of a (conditional) transfer P: R2 ← R1  A binary condition (P equals to 0 or 1) determines when the transfer occurs  The content of R1 is transferred into R2 only if P is 1
  • 15. 15
  • 16.  The control function is included with the statement is as follows: x’T1: A ← B  The control function is terminated with a colon.  It shows that the transfer operation be executed by the hardware only when the Boolean function x’T1 = 1 • i.e,when variable x=0 and timing variable T1 = 1 16
  • 17. Hardware implementation for the above statement is as follows 17
  • 18. 18 7-3 Register Transfer Operations More register transfer operation executed at the same time: K3: R2 ←R1, R1 ←R2
  • 19.  Consider the two statements:  T1: C ← A  T5: C ← B • Destination register receives information from two sources, but not at the same time. 19
  • 20. 20
  • 21. Bus and Memory Transfers  Paths must be provided to transfer information from one register to another  A Common Bus System is a scheme for transferring information between registers in a multiple-register configuration  A bus: set of common lines, one for each bit of a register, through which binary information is transferred one at a time  Control signals determine which register is selected by the bus during each particular register transfer 21
  • 22. 22
  • 23. 23
  • 24. 24
  • 25. Memory Transfer  Memory read : Transfer from memory  Memory write : Transfer to memory  Data being read or wrote is called a memory word (called M)  It is necessary to specify the address of M when writing /reading memory  This is done by enclosing the address in square brackets following the letter M  Example: M[0016] : the memory contents at address 0x0016 25
  • 26. 26
  • 27.  Assume that the address of a memory unit is stored in a register called the Address Register AR  Lets represent a Data Register with DR, then:  Read: DR ← M[AR]  Write: M[AR] ← DR 27
  • 29.  The transfer of information from a bus into one of many destination registers is done: • By connecting the bus lines to the inputs of all destination registers and then: • activating the load control of the particular destination register selected  We write: R2 ← C to symbolize that the content of register C is loaded into the register R2 using the common system bus  It is equivalent to: BUS ←C, (select C) R2 ←BUS (Load R2) 29
  • 30. 30
  • 31. Arithmetic Microoperations  The basic arithmetic microoperations are: addition, subtraction, increment, decrement, and shift  Addition Microoperation: R3 ←R1+R2  Subtraction Microoperation: R3 ←R1-R2 or : R3 ←R1+R2+1 31
  • 32.  One’s Complement Microoperation: R2 ←R2  Two’s Complement Microoperation: R2 ←R2+1  Increment Microoperation: R2 ←R2+1  Decrement Microoperation: R2 ←R2-1 32
  • 33. 33
  • 34. 34
  • 35. Logic microoperations  Logic microoperations specify binary operations for a string of bits stored in registers.  These operations consider each bit in the registers seperately and treat it as a binary variable.  Exclusive –OR operation symbolized by the statement: F ← A ⊕ B  If the contents of register A is 1010 and B is 1100, the information transferred to register F is 0110:  1010 content of A  1100 content of B  0110 content of F ← A ⊕ B 35
  • 36.  16 different possible logic operations that can be performed with two binary variables,  The symbol ∨ will be used to denote OR microoperation and the symbol ∧ to denote an AND microoperation.  Complement microoperation is the sameas 1’s complement and use a bar on top of the letter that denotes the register. 36
  • 38. Shift Microoperations  Used for serial transfer of data  Also used in conjunction with arithmetic, logic, and other data-processing operations  The contents of the register can be shifted to the left or to the right  As being shifted, the first flip-flop receives its binary information from the serial input  Three types of shift: Logical, Circular, and Arithmetic 38
  • 39. 39
  • 40.
  • 41. 41
  • 42. 42
  • 43. 43
  • 44. 44
  • 45. 45
  • 46. CONDITIONAL CONTROL STATEMENTS  Conditional control statement is symbolized by an if-then – else statement as follows:  P: If (condition) then [microoperation(s)] else [microoperation(s)] • It means that if the control condition stated within the parentheses after the word if is true, then the microoperation enclosed within the parentheses after the word then is executed. • If the condition is not true, the microoperation listed after the word else is executed. • In any case the control function P must occur for anything to be done. 46
  • 47.  Eg:  T2: If(C=0) then (F ← 1) else (F ← 0)  F is assumed to be a 1-bit register(flip-flop) that can be set or cleared.  If register C is a 1-bit register, the statement is equivalent to the following two statements: C’T2: F ←1 CT2: F ←0 • Only one of the microoperation will be executed during T2, depending on the value of C 47

Editor's Notes

  1. States: 22 = 4 Input Combinations: 22 = 4 Output Combinations: 22 = 4 Y = A A(t+1) = IN Moore States = 2n Input Combinations = 2n Output Combinations = 2n