Lab sheet

FACULTY OF ENGINEERING
LAB SHEET
EEN 3076 POWER ELECTRONICS
I TRIMESTER 2011-2012
PE 1 – Power Semiconductor Switches
PE 2 – Switch-Mode Power Converter (Buck)
*Note: On-the-spot evaluation may be carried out during or at the end of the experiment.
Students are advised to read through this lab sheet before doing experiment. Your
performance, teamwork effort, and learning attitude will count towards the marks.

EEN3076 Power Electronics: PE1 & PE2 2010/2011
Experiment PE1
POWER SEMICONDUCTOR SWITCHES
A. OBJECTIVES:
1) To demonstrate a practical go/no-go method of testing an SCR with a multimeter
2) To study the turn-on/turn-off states of the SCR
3) To study the effects of gate current on SCR and determine the minimum holding current to
keep the SCR conducting
4) To study the switching parameters of an npn BJT
B. LEARNING OUTCOME OF SUBJECTS:
Programme Outcomes % of contribution Assessment Activities
• Ability to acquire and apply
fundamental principles of
science and engineering.
10
Lab Experiments, Assignment, Test
and Exam
• Capability to communicate
effectively. 10
Tutorial Session, Lab Experiments
• Acquisition of technical
competence in specialized
areas of engineering discipline.
40
Lab Experiments, Assignment
• Ability to identify, formulate
and model problems and find
engineering solutions based on
a system approach.
10
• Ability to work well with others
as a team member and as an
individual.
10
Tutorial, Lab Experiments,
Assignment
C. MATERIALS REQUIRED:
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a) Equipment
1. DC Power Supply (variable 0 to 15V) 1
2. Digital multimeter 1
3. Dual channel oscilloscope 1
4. Function generator 1
5. Breadboard 1
b) Electronic components
1. SCR: C106D (could be different model) 1
2. npn BJT: BC548 or BC547 or equivalent 1
3. Voltage regulator IC 7805 (+5V, 1A) 1
4. Signal diode: 1N4148 or equivalent 2
5. Single turn potentiometer (linear): 100kΩ or 2 x 50kΩ 1
6. Resistor: 10Ω/0.25W 1
8. Resistor: 1kΩ/0.25W 2
12. Resistor: 1MΩ/0.25W 2
13. Resistor: 100Ω/2W 1
14. Ceramic disc capacitor: 1nF 2
15. Electrolytic capacitor: 47µF/(16V or above) 2
16. Electrolytic capacitor: 100µF/(16V or above) 1
17. Inductor: 100µH/0.29Ω, 0.79A 1
D. INTRODUCTION
1. Introduction of SCR
The silicon-controlled rectifier (SCR) is a four-layer pnpn bipolar semiconductor device with
three terminals, as shown in Fig-1. The SCR belongs to the thyristor family of electronic
devices, which operates on the principle of current conduction when the break over voltage is
reached. An SCR has an anode, a cathode and a gate terminal. A gate terminal can also trigger
the device into conduction below the break over voltage level. It operates similar to a normal
diode, where current flows only in the forward-biased condition but must be triggered into
conduction by the gate terminal. Once the SCR is triggered into conduction, it acts like a
latched switch, and the gate no longer has control of the current flow through the SCR.
2. Operation of SCR
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Fig-1: Device structure, circuit symbol and practical packages
Cathode (C)
P
P
N
N
Anode (A)
Gate (G) device
structure
+ A
- C
G
circuit
symbol
Plastic
case
Anode (A)
Cathode (C)
Gate (G)
Anode (A)
Cathode (C)
Gate (G)
Practical packages
Anode
Cathode
Gate
Metal
case
Plastic
case

Fig-2 shows schematically the basic operation of a SCR. The anode is connected through a
series-limiting resistor RL to a positive voltage. The cathode is connected to ground via switch
S2 and the gate is connected to switch S1, which is connected to ground. Under this
configuration as in Fig-2(a), junction 1 and 3 (i.e. J1 and J3) are forward-biased but junction 2
(J2) is reverse biased, which prevents any appreciable current from flowing through the SCR.
When S1 is moved up to the bottom side of RA as in Fig-2(b), a small gate current flows into
the gate (electrons flow out from the gate). This introduces holes into the p-type gate region,
which induce electron-injection across J3 into the p-type gate layer. The electrons will diffuse
across the p-type layer and be swept across J2 by the localized field at J2 into the upper n-
layer. These electrons in the n-layer will induce hole-injection across J1 into the upper n-layer.
The holes will diffuse across the n-layer and be swept across J2 into the p-type gate layer. A
new cycle of induced process will begin but the holes are generated internally, not by the gate
current. This cyclic process is called regenerative process, which speeds up the SCR into
conduction state without the help of the gate current anymore. The SCR is in heavy minority
carrier injection and brings J2 to forward-bias (saturation condition). Now, the gate can be set
back to ground via S1 and RG as in Fig-2(c), the large current flowing through the SCR is on
or latched. The SCR can only be turned off if this main current flowing from the anode to the
cathode is reduced below its minimum holding current (IH). This can be accomplished by
momentarily opening switch S2 in the cathode lead of the circuit. The SCR can be considered
reset or off. The SCR can be turned on again by the gate current triggering.
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Fig-2: Operation of an SCR: (a) off condition, (b) triggering on; (c) on condition without triggering
J3 fwd
biased
J2 rev
J1 fwd
biased
Cathode (C)
Anode (A)
+ + +
+ + +
+ + +
+ + +
- - -
- - -
- - -
P
P
N
N
Gate
(G)
- - -
VAA
=+12V
RL
=100Ω
X
X
Y
Y
S1
S2
RA
=22kΩ
RG
=10kΩ
(a)
Cathode (C)
Anode (A)
+ + +
+ + +
+ + +
+ + +
- - -
- - -
- - -
P
P
N
N
Gate (G)
- - -
VAA
=+12V
RL
=100Ω
X
X
Y
Y
S1
S2
J1 fwd
J3 fwd
J2 fwd
RA
=22kΩ
RG
=10kΩ
IG
(b)
Cathode (C)
Anode
(A)
+ + +
+ + +
+ + +
+ + +
- - -
- - -
- - -
P
P
N
N
Gate
(G)
- - -
VAA
=+12V
RL
=100Ω
X
X
Y
Y
S1
S2
J1 fwd
biased
J3 fwd
biased
J2 fwd
RA
=22kΩ
RG
=10kΩ
(c)

3. Current-Voltage Characteristics of an SCR
The SCR operates similar to a normal diode when in the reverse biased condition, as shown in
Fig-3(a). The SCR exhibits very high internal impedance, with perhaps a slight reverse
blocking current. However, if the reverse breakdown voltage is exceeded, the reverse current
rapidly increases to a large value and may destroy the SCR. In the forward bias condition
(gate is grounded), the internal impedance of the SCR is very high with a small current flowing
called the forward blocking current. When the forward voltage (+VF) is increased beyond the
forward break over voltage point, an avalanche breakdown occurs and the current from the
cathode to anode increases rapidly. A regenerative action occurs with the conduction of p-n
junctions and the internal impedance of the SCR decreases. This results in a decrease in
voltage across the anode and the cathode as verified by Ohm's law where V = IR. When R is
small, so is the voltage drop across it. The forward current flowing through the SCR is limited
primarily by the impedance of the external circuit, and the SCR will remain on as long as this
current does not fall below the holding current. If the gate current is allowed to flow as shown
in Fig-3(b), the forward break over point will be smaller. The larger the gate current flows, the
lower the point at which forward break over will occur, as illustrated in Fig-3(c). Normally,
SCRs operated with applied voltage lower than the forward break over voltage point (with no
gate current flowing) and the gate triggering current is made sufficiently large to ensure
complete turn on.
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- C
+ A
G
RL
RG
-V
Fig-3: I-V characteristics for an SCR, (a) I-V curves, (b) test for gate current, (c) gate current curves.
- C
+ A
G
RL
RG
+V
-IR
Forward blocking current (off condition)
High current
(on condition)
Holding Current
Regenerative action
Forward break over voltage
IF
-VR VF
Reverse blocking current
(off condition)
Reverse break over voltage
(a)
IG2
>
IF
VF
IG0
IG1
>
IA
VAK
(c)
C
A
G
RL
RG
+V (variable)
IA
+
VAC
-
+
VG
-
IG
+V
(b)

4. Switching parameters of BJT
Bipolar junction transistors (BJT) are moderate speed switches in among the power
semiconductor switches. It is because carriers (electrons and holes) are collected at the BE
junction during on state. During switching off, these carriers have to be removed before the
depletion layer at the BE junction starts to develop and turn off the BJT. During switching on,
carriers have also to be collected at the junction before the BJT starts to turn on. Finite times
are required for the BJT to fully turn on and fully turn off. Below are four defined switching
parameters, which can be used to characterize the BJT switching characteristics for a given
test circuit with conditions. td is the turn-on delay time, tf the fall time of vCE, ts the storage
time and tr the rise time of vCE. The switching-on time is tsw-on = td + tf and switching-off time is
tsw-off = ts + tr. tPW is the negative-going pulse-width of vCE.
E. EXPERIMENT
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tsw-on
Fig-4: (a) Typical vI
and vCE
waveforms of npn BJT. (b) A simple test circuit for npn BJT.
VI (max)
0.1VI (max)
0V
VCE(max)
0.9VCE(max)
0.5VCE(max)
0.1VCE(max)
0VtPWtd
tf
ts
tr
tsw-off
(a)
+VCC
0V
DUT
(b)
RC
RB
VI (max)
tP
at DC, tr
& tf
vI
vCE

Experimental effort evaluation (2 marks out of 5 marks)
Student must show multimeter reading, oscilloscope display, etc to lab experiment supervisor
before proceeding to the next section. The experimental effort evaluation is performed within
3-hour lab session only.
Part I: SCR switch
Know your SCR before starting the SCR experiments (refer to Appendices)
Section 1: Testing an SCR with a digital multimeter in diode test mode
Note: Learn the procedures of Section 1 and start doing experiment from Section 2.
Procedures:
1) Connect the circuit as shown in Fig-7.
2) Set the multimeter in DIODE TEST MODE.
3) Set the position of the switches S1 and S2 as indicated in sequence no.1 in Table 1.
Record the meter reading for each sequential setting of the switches as shown in Table 1.
Meter reading (in diode test mode): A 3- or 4-digit number means the device is
conducting current with voltage drops in V or mV (depended on meter used). A “1”
displayed at the left means the device is not conducting current.
4) Confirm your results in table 1 by repeating step 3).
Results:
Table 1
Note: You will get wrong results if you do not follow the experimental sequences.
Questions:
i) Compare the measured readings in Table 1 and briefly explain how the observations of
these readings relate to the conduction states of the SCR.
Section 2: Basic operation of an SCR
Results:
Table 2
Procedures:
1) Connect the circuit shown in Fig-8.
2) Set the position of the switches S1 and S2 as indicated in sequence no.1 in Table 2 and
then apply power to the circuit. Record the readings of VGK and VAK and indicate the
states of the SCR for each sequential setting as in Table 2.
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Fig-7: Go/no-go testing of SCR
A
K
G
Multimeter
+
-
S1
S2
S1 S2
X
closeY
X
close
close
X open
StateSequence No.
1
2
3
4
5
VGK
/VVAK
/V
X close
S1 S2
close
closeclose
close
open
open
open open
readingSequence No.
1
2
3
4
state
Fig-8: Test circuit of an SCR
X
Y
S1
VAA
=12V
RA
=22kΩ
RG
=10kΩ
A
K
G +
VAK
-
+
VGK
-
S2
RL
=100Ω/2W
RG
=1kΩ

3) Confirm your results in table 2 by repeating step 2).
Note: You will get wrong results if you do not follow the experimental sequences.
Questions:
i) Before firing (triggering), what is the VAK? Give reason to support your answer.
ii) What is the VAK when the SCR is conducting? Give reason to support your answer.
Section 3: Current control of an SCR
Section 3.1 Gate Current Control
Procedures:
1) Remove power supply and modify the circuit in Fig-8 as shown in Fig-9(a).
2) Set the switch S1 at position X and then apply power to the circuit. Record the voltage
VGK and VAK.
3) Move Switch S1 to position Y. Record VGK and VAK.
4) Turn-off the SCR and repeat step 2) and 3) to confirm your results.
Results:
Step 2) VGK = ________ , VAK = ________
Step 3) VGK = ________ , VAK = ________
Questions:
i) What is the current flowing through the gate (IG) in step 2)? Is the SCR on or off? Why?
ii) What is the current flowing through the gate (IG) in step 3)? Is the SCR on or off? Why?
Section 3.2 Holding Current Control
Procedures:
1) Remove the power supply and modify the circuit in Fig-9(a) as shown in Fig-9(b).
2) Set the wipers of the potentiometers RH so that the resistance is 0Ω.
3) Ensure that the switch is opened.
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Fig-9: Current control of an SCR, (a) gate current control, (b) holding current control
(a)
RA
=
2 x 1MΩ
IGX
Y
S1
VAA
=12V
RB
=
22kΩ
A
K
G +
VAK
-+
VGK
-
RL
=100Ω/2W
RG
=1kΩ
RL
=2kΩ
RH
=2 x 50kΩ
or 100kΩ
(b)
IA
S1
VAA
=12V
RB
=
22kΩ
A
K
G
+
VAK
-
+
VRS
-
RS
=100Ω/
0.25W
Multimeter
+
-
Connected to CH1
of oscilloscope
RG
=1kΩ

4) Make firm connections to the multimeter and to the CH1 as shown in Fig-9(b).
5) Set the multimeter in DC 2V range and the oscilloscope as given below.
Caution to the oscilloscope: Make sure the INTENSITY of the displayed waveforms is not
too high, which can burn the screen material of the oscilloscope.
Before start this section experiment, check your voltage probes and oscilloscope.
Oscilloscope settings: Set CH1 knob to 0.1V/div, AC/GND/DC switch to DC, CH1 0V
position at the lowest major grid. Note that the oscilloscope needs to be on for 5 – 10 minutes
(warming up time) before setting the position of 0V.
Make sure the VARIABLE knobs for CH1 and time base at the CAL positions (means using
oscilloscope’s calibrations).
6) Apply power supply to the circuit and momentarily close the switch S1 and then open it
again. Record the voltage VAK and VRS in Table 3.
7) Slowly adjust RH and record VAK and VRS in Table 3 with VAK change (∆VAK) at
approximately 0.02V (Note: VAK will decrease and then increase again). The record ends
when the reading in VAK suddenly jumps to ~12V (over-range for DC 2V range).
Results:
Table 3
(∆VAK ~ 0.02V)
Note: A disconnection and then connection of multimeter or oscilloscope probes during
voltage measurement will affect the precision result for determining the threshold
current.
Questions:
i) Plot a graph IA versus VAK, where
S
RS
A
R
V
I = . Comment on your graph.
ii) From the graph, determine the holding current.
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VAK
/V
VRS
/V

Part II: BJT switch
Before starting these experiments:
1. Test your BJT and diodes.
2. Check your voltage probes, oscilloscope and function generator.
Fixed +5V power supply
Construct a fixed +5V voltage source as shown in Fig-10. This output will be the VS in the
circuits in Fig-11.
Fig-10: Voltage regulator IC 7805 circuit for fixed +5V output.
Section 4: Temporal switching behaviour of BJT and effect of inductor
Note: Waveforms must be drawn on a common time axis as shown in the figure in each
section. Each waveform has its own vertical scale with its ground level (channel position) at
one of the vertical major grid position, e.g. at +2 division means at 2 divisions above centre
of the vertical axis. Each 2-student group is allowed to make a photocopy of the graphs.
Please indicate group ID, partner’s name and ID on the photocopy page. Use a single
page graph paper to draw all the waveforms.
Section 4.1: BJT temporal switching behavior
• Caution when using the electrolytic capacitor: The polarity of the capacitor must be
connected correctly, otherwise, explosion may occur.
• Caution when using the oscilloscope: Make sure the INTENSITY of the displayed
waveforms is not too high, which can burn the screen material of the oscilloscope.
• Caution when using the function generator: Never short-circuit the output, which
may burn the output stage of the function generator.
Procedures:
1) Construct the circuit as shown in Fig-11.
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Fig-11: A simple BJT switching circuit
VS
= +5V
CI
=
100µF
Q (npn)
P4
C
E
B
DB
=1N4148
P1 P3RB1
=1kΩ
CB
=1nF
RB2
=
100Ω
+
RS
=100Ω/2W
(a)
P2
+9V to +10V
+ +
IN OUT
COM
+5V
47µF
7805
Constant output voltage
as VS
in Fig-11.
47µFFrom adjustable output
DC power supply

2) Oscilloscope settings: You must use VOLTS/DIV and TIME/DIV values as mentioned
in each part, if any. Channel POSITION must be put at one of the vertical major grid
position. Set AC/GND/DC input coupling switches at DC. Make sure the VARIABLE
knobs for CH1, CH2 and time base at the CAL positions.
3) Function generator settings: Select square-wave mode and set frequency at 40kHz.
Connect the function generator output to CH1. Set the output voltage amplitude to 5V (or
peak-to-peak to 10V). Set the duration when the output is +5V, t5V = 5µs by adjusting
the RAMP/PULSE knob. (Oscilloscope settings: 2V/div, 5µs/div, edge-trigger: +,
trigger level: adjust to get stable waveform.) Then connect the output to the input P1 of
the circuit. After connection, check again the amplitude of the function generator output
and adjust to 5V amplitude, if necessary. Adjust t5V to exactly 5µs by using 1µs/div.
4) Skill to draw voltage waveforms: The HORIZONTAL position knob should not be moved
before all the waveforms, which share a common time axis, are drawn. Draw the
waveform by using one-to-one scale, i.e. 1 cm on the graph paper is equivalent to 1
division on the oscilloscope screen. Draw the ground level and locate some of the
important points, e.g. maximum and minimum points, turning points, points where the
waveform cuts through the ground level and the major grids. Connect the points together
by a smooth curve.
5) Using graph paper (Note: this section and next section use the same time axis. Start
P1 waveform at top-left corner of the graph paper), draw the voltage waveforms at P2,
P3 and P4 with respect to the referent voltage waveform at P1 to show the detailed v(t)
and t relationships among them. To do this:
i) Connect CH1 (5V/div, ground level: +2 division, trigger edge: +) to P1 and
draw the waveform (keep this connected all the time),
ii) Connect CH2 (2V/div) to P2 and draw the waveform,
iii) Connect CH2 (2V/div) to P3 and draw the waveform,
iv) Connect CH2 (2V/div) to P4 and draw the waveform, and also
measure ts value between vP1 and vP4 and tr of vP4.
Note: You must draw the waveforms as shown at the left and
indicate the ground level of each waveform. Set 2V/div for CH2 and
use a time base of 1µs/div.
6) Remove CB from the circuit and draw voltage waveforms at P2 w.r.t. the
waveform at P1. Measure ts value between vP1 and vP4 and tr of vP4
(refer to Fig-4).
Results:
Step 5) iv): ts = _______, tr = ______
Step 6): ts = _______, tr = ______
Questions:
i) vP2 waveform with CB: Explain why there are positive spike and negative spike?
ii) vP3 waveform with CB: Comment and explain on the waveform.
iii) vP4 waveform with CB: Comment and explain on the waveform.
iv) vP2 waveform without CB: Comment on this waveform to the vP2 waveform with CB.
Lab report format, evaluation and submission
• The report should consists of
 Results and answers for all the questions (Please write down the corresponding step or
procedure number as the identification of your answer in appropriate order),
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vP1
vP2
vP3
vP4
vP2
t
t
t
t
t
With
CB
w/o
CB
1µs/div

 Discussion and Conclusion.
 Lab report to be submitted to the lab supervisor on the same day of the experiment
End of Lab sheet
This page shall be attached as a front cover for the Lab Report
Name : ……………………………………………………………
SID :………………………………………..…
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EEN3076 PE1
ON THE SPOT EVALUATION SHEET
Programme Outcomes
% of
contributio
n
Measurement Results
10
• Basic questions
shall be asked on
the spot
effectively.
10
• Monitor the students
in communicating
his problem and
solutions during thr
lab session
areas of engineering
discipline.
40
• completing all the
lab experiments
• answering all the
questions asked
• answering all
questions asked
during on the spot
evaluation
• Discussion and
Conclusion in the
report (shall based
on the results
obtained)
engineering solutions based
on a system approach.
10
• Solving problems
encountered during
experiments
• Ability to conduct research in
chosen fields of engineering. 10
• Troubleshooting and
researching on the
problems based on
the results obtained
• Understanding of the
importance of sustainability
and cost-effectiveness in
design and development of
engineering solutions.
10
• Less use of jumpers
and space while
connecting the
circuits
• Testing of the
components before
connecting them in
circuit
individual.
10
• Speed in completing
experiments
Total (100%)
Experiment PE2
SWITCH-MODE POWER CONVERTER (BUCK)
A. OBJECTIVES:
1) To study the operation principle of a dc-dc converter
2) To provide hand-on design experience on a basic converter circuit
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B. LEARNING OURCOME OF SUBJECTS:
Programme Outcomes % of contribution Assessment Activities
10
Lab Experiments, Assignment,
Test and Exam
effectively. 10
Tutorial Session, Lab Experiments
areas of engineering
discipline.
40
engineering solutions based
on a system approach.
10
• Ability to conduct research
in chosen fields of
engineering.
10
• Understanding of the
importance of sustainability
and cost-effectiveness in
design and development of
engineering solutions.
10
Lab Experiments
• Ability to work well with
others as a team member and
as an individual.
10
Tutorial, Lab Experiments,
Assignment
C. MATERIAL REQUIRED:
a) Equipment
1. DC power supply (variable 0 – 15V, fixed +5V) 1
2. Digital multimeter 1
3. Dual channel oscilloscope 1
4. Function generator 1
5. Breadboard 1
b) Electronic components
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1. npn BJT: BC548 or BC547 or equivalent 1
2. pnp BJT: 2N2905 or 2N4403 or BFY64 or equivalent 1
3. Voltage regulator IC 7805 (+5V, 1A) 1
4. Schottky diode: 1N5817/18/19 or equivalent 1
5. Signal diode: 1N4148 or equivalent 1
10.Resistor: 33Ω/2W 1
11. Ceramic disc capacitor: 1nF 1
12.Electrolytic capacitors: 47µF/(16V or above) 2
13.Electrolytic capacitors: 100µF/(16V or above) 2
14.Inductor: 100µH/0.29Ω, 0.79A 1
D. INTRODUCTION
1. Basic Switching Converter
In a switching converter circuit, the transistor operates as an electronic switch by being
completely on or off. This circuit is known as a dc chopper circuit. Assuming the switch is
ideal in Fig-1, the output is the same as the input when the switch is closed, and the output is
zero when the switch is open. The periodic openings and closings of the switch results in the
pulsed output shown in Fig-1(c). The average or dc component (using capital letter) of the
output is
V
T
v t dt
T
v t dt V Do o
T
s s
DT
= = =∫ ∫
1 1
0 0
( ) ( ) (Eq-1)
The dc component of the output is controlled by adjusting the duty cycle ratio D, which is the
fraction of the period that the switch is closed, i.e.
D
t
t t
t
T
t fon
on off
on
on≡
+
= = (Eq-2)
where f is the switching frequency in hertz. The dc component of the output will be less than
or equal to the input for this circuit.
The power absorbed by the idea switch is zero. When the switch is open, there is no current in
it; when the switch is closed, there is no voltage across it. Therefore, all power is absorbed by
the load, and the energy efficiency is 100%. Losses will occur in a real switch because the
voltage across will not be zero when it is on, and the switch must pass through the linear
region when making from one state to the other.
2. The Buck Converter
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RL
Vs
+
-
+
-
Vo
Vs
+
-
RL
+
-
Vo
(a) (b)
closed open
0 DT T
t
(1-D)T
vo
vs
(c)
Fig-1: (a) basic dc-dc switching converter, (b) switching equivalent, (c) output voltage
Vs
L
C RL
+
-
+
-
+ -
+
-
V0
vL
vx
Switch iL iC
iR
(a)

Controlling the dc component of a pulsed output of the type in Fig-1(c) may be sufficient for
some applications, but often the objective is to produce an output that is purely dc. One way
of obtaining a dc output from the circuit of Fig-1(a) is to insert a low-pass filter after the
switch. Fig-2(a) shows an inductor-capacitor (L-C) low-pass filter added to the basic
converter. The diode provides path for the inductor current when the switch is opened and is
reverse biased when the switch is closed. The circuit is called a buck converter or a down
converter because the output voltage is less than the input.
a) Voltage and Current Relationships
If the low-pass filter is ideal, the output voltage is the average of the input voltage to the filter.
The input to the filter, vx in Fig-2(a), is Vs when the switch is closed and is zero when the
switch is open, provided that the inductor current remains positive, keeping the diode on. If
the switch is closed periodically at a duty ratio D, the average voltage at the filter input is Vs
D, as seen by Eq-1.
This analysis assumes that the diode remains forward biased for the entire time that the switch
is open, implying that the inductor current remains positive. An inductor current that remains
positive throughout the switching period is known as continuous current. Conversely,
discontinuous current is characterized by the inductor current returning to zero during each
period.
The buck converter (and dc-dc converters in general) has the following properties when
operating in the steady state:
1. the inductor current is periodic:
i t T i tL L( ) ( )+ = (Eq-3)
2. The average inductor voltage is zero:
V
T
v dL Lt
t T
= =
+
∫
1
0( )λ λ (Eq-4)
3. The average capacitor current is zero:
I
T
i dC Ct
t T
= =
+
∫
1
0( )λ λ (Eq-5)
4. The power supplied by the source is the same as the power delivered to the load. For non-
ideal components, the source also supplies the losses:
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Fig-2: (a) Buck dc-dc converter, (b) Equivalent circuit for switch closed, (c) Equivalent
circuit for switch open.
Vs
L
C RL
+
-
+
-
+ -
+
-
V0
vL
= Vs
- Vo
vx
= Vs
Switch
(b)
Vs
L
C RL
+
-
+
-
+ -
+
-
V0
vL
= - Vo
vx
= 0
Switch
(c)

Ps = Po (ideal) andPs = Po + losses (non-ideal) (Eq-6)
Analysis of the buck converter of Fig-2(a) begins by making these assumptions:
1. The circuit is operating in the steady state.
2. The inductor current is continuous (always positive)
3. The capacitor is very large, and the output voltage is held constant at voltage Vo. This
restriction will be relaxed later to show the effects of finite capacitance.
4. The switching period is T; the switch is closed for the time DT & open for time (1- D)T
5. The components are ideal.
The key to the analysis for determining the output Vo is to examine the inductor current and
inductor voltage first for the switch closed and then for the switch open. The net change in
inductor current over one period must be zero for steady-state operation. The average
inductor voltage is zero.
b) Analysis for the switch closed
When the switch is closed in the buck converter circuit of Fig-2(a), the diode is reverse- biased
and Fig-2(b) is an equivalent circuit. The voltage across the inductor is
v V V L
di
dtL s o
L
= − =
Rearranging,
L
VV
dt
di osL −
= with switch closed
Since the derivative of the current is a positive constant, the current increases linearly, as
shown in Fig-3(b). The change in current while the switch is closed is computed by modifying
the preceding equation:
di
dt
i
t
i
DT
V V
L
L L L s o
= = =
−∆
∆
∆
⇒ ( ) ( )∆i
V V
L
DTL closed
s o
=
−
(Eq-7)
c) Analysis for the switch open
When the switch is open, the diode becomes forward biased to carry the inductor current, and
the equivalent circuit of Fig-2(c) applies. The voltage across the inductor when the switch is
open is
v V L
di
dtL o
L
= − =
Rearranging,
di
dt
V
L
L o
= − with switch open
The derivative of current in the inductor is a negative constant value, and the current
decreases linearly, as shown in Fig-3(b). The change in inductor current when the switch is
open is
∆
∆
∆i
t
i
D T
V
L
L L o
=
−
= −
( )1
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( ) ( )( )∆i
V
L
D TL open
o
= − −1 (Eq-8)
Steady-state operation requires that the inductor current at the end of the switching cycle be
the same as that at the beginning, meaning that the net change in inductor current over one
period is zero. This requires
( ) ( )∆ ∆i iL open L closed+ = 0
Using equation Eq-7 and Eq-8,
( ) ( )
V V
L
DT
V
L
D Ts o o−
−





 − =1 0
Solving for Vo,
V V Do s= (Eq-9)
This gives the same result as equation Eq-1. The bulk converter produces an output, which is
less than or equal to the input.
An alternative derivation of the output voltage is based on the inductor voltage, as shown in
Fig-3(a). Since the average inductor voltage is zero for periodic operation,
V V V DT V D TL s o o= − + − − =( ) ( )( )1 0
Solving the preceding equation for V0 yields the same result as equation Eq-9, Vo= VsD.
Note that the output voltage depends only on the input and the duty ratio D. If the input
voltage fluctuates, the output voltage can be regulated by adjusting the duty ratio
appropriately. A feedback loop is required to sample the output voltage, compare it to a
reference and set the duty cycle of the switch accordingly.
The average inductor current must be the same as the average current in the load resistor,
since the average capacitor current must be zero for steady-state operation (IL = IC + IR):
I I
V
RL R
o
= = (Eq-10)
Since the change in inductor current is known from equations Eq-7 and Eq-8, the maximum
and minimum values of the inductor current are computed as
I I
i
L
L
max = +
∆
2
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Vs
-Vo
vL
-Vo
t
Imax
iL
Imin
t
DT
∆iL
IR
iC
t
∆iL
(a)
(b)
(c)
Fig-3: (a) Inductor voltage, vL
,
(b) Inductor current, iL
,
(c) Capacitor current, iC
.
T

= + −



 = +
−





V
R
V
L
D T V
R
D
Lf
o o
o
1
2
1
1 1
2
( )
( )
(Eq-11)
I I
i
L
L
min = −
∆
2
= − −



 = −
−





V
R
V
L
D T V
R
D
Lf
o o
o
1
2
1
1 1
2
( )
( )
(Eq-12)
where f = 1/T is the switching frequency in hertz.
Equation Eq-12 can be used to determine the combination of L and f that will result in
continuous current. Since I min= 0 is the boundary between continuous and discontinuous
current.
I V
R
D
Lfomin
( )
= = −
−




0
1 1
2
(Eq-13)
( )
( )
minLf
D R
=
−1
2
(Eq-14)
d) Discontinuous current operation
Fig-4 shows the regions for iL > 0 (during DT and ∆1T) and iL = 0 (∆2T). During the interval
∆2T, the power to the load is supplied by the filter capacitor alone. Again, equating the integral
of the inductor voltage over one T to zero (equation Eq-4) yields
(Vs – Vo)DT + (-Vo)∆1T = 0
1∆+
=
D
D
V
V
s
o
(Eq-15)
e) Output voltage Ripple
In the preceding analysis, the capacitor was assumed to be very large to keep the output
voltage constant. In practice, the output voltage cannot be kept perfectly constant with a finite
capacitance. The variation in output voltage, or ripple, is computed from the voltage current
relationship of the capacitor. The current in the capacitor is i i iC L R= − , as shown in Fig-5(a),
where RLC III ∆−∆=∆ . Assuming R/VII oRL ∆=∆>>∆ , then LC II ∆≈∆ .
While the capacitor current is positive, the capacitor is charging. From the definition of
capacitance, Q CVo= ∆ ∆Q C Vo= ∆
∆
V
Q
Co =
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vL
Vo
Vs
– Vo
iL
0
DT
T
∆2
T∆1
T
Fig-4: Discontinuous current
Fig-5: (a) Capacitor current, iC
,
(b) capacitor ripple voltage
t
t
iC
T/2
∆iL
/2
∆Q
(a)
vo
(b)
∆VoVo

The change in charge, ∆Q is the area of the triangle above the time axis;
∆
∆ ∆
Q
T i T iL L
=







 =
1
2 2 2 8
Thus,
∆
∆
V
T i
Co
L
=
8
Using equation Eq-8 for ∆iL,
∆V
TV
CL
D T
V
CLf
Do
o o
= − = −
8
1
8
12( ) ( ) (Eq-16)
In this equation, ∆V0 is the peak-to-peak ripple voltage at the output, as shown in Fig-5(b). it
is also useful to express the ripple as a fraction of the output voltage:
∆V
V
D
CLf
o
o
=
−( )1
8 2 =
22
)1(
2 





−
π
f
f
D c
(Eq-17)
where
LC
fc
π
=
2
1
is the corner frequency of the low pass LC filter.
If the ripple is not large, the assumption of a constant output is reasonable and the preceding
analysis is essentially valid.
3. Design Considerations
Most buck converters are designed for continuous-current operation. The choice of switching
frequency and inductance to give continuous current is given by equation Eq-14, and the
output ripple is described by equation Eq-17. Note that as the switching frequency increases,
the minimum size of the inductor to produce continuous current and the minimum size of the
capacitor to limit output ripple both decrease. Therefore, high switching frequencies are
desirable to reduce the size of both the inductor and the capacitor.
The trade-off for high switching frequencies is increased power loss in the switches. Increased
power loss for the switches, decreases the converter’s efficiency, and the large heat sink
required for the transistor switch offsets the reduction in size of the inductor and capacitor.
Typical switching frequencies are in the 20-50kHz range. As switching devices improve,
switching frequencies will increase.
The inductor wire must be rated at the rms current, and the core should not saturate for peak
inductor current. The capacitor must be selected to limit the output ripple to the design
specifications, to withstand peak output voltage, and to carry the required rms current.
The switch and diode must withstand maximum voltage stress when off and maximum current
when on. The temperature ratings must not be exceeded, possibly requiring a heat sink.
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E. Experiment: Buck Converter
Experimental effort evaluation (2 marks out of 5 marks)
Student must show multimeter reading, oscilloscope display, etc to lab experiment
supervisor before proceeding to the next section. The experimental effort evaluation is
performed within 3-hour lab session only.
Before starting experiments:
3. Test your BJTs and diodes.
4. Check your voltage probes, oscilloscope and function generator.
Fixed +5V power supply
Construct a fixed +5V voltage source as shown in Fig-6. This output will be the VS in the
circuits in Fig-7.
Fig-6: Voltage regulator IC 7805 circuit for fixed +5V output.
Buck converter circuit
Construct the Buck converter circuit as shown in figure below.
Caution when using the electrolytic capacitor: The polarity of the capacitor must be connected
correctly, otherwise, explosion may occur.
Fig-7: Buck converter circuit
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RL
=
22Ω/2W
VS
= +5V (from 7805 output)
CI
=
100µF
Q1 (pnp)
Q2 (npn)
R1
= 100Ω
CO
= 100µF
+
V0
−
Schottky diode
DF
LS
= 100µH
RB1
=
100Ω
P3
P4
P5 P6
E C
B
C
E
B
D1
=
1N4148
P1
P2
RB2a
=
1kΩ
CB2
= 1nF
RB2b
=
100Ω
+ +
Check page 1 for Q1, Q2 and schottky diode
From
function
generator
output
+9V to +10V
+ +
IN OUT
COM
+5V
47µF
7805
Constant output voltage
as VS
in Fig-7
47µFFrom adjustable output
DC power supply

SECTION 1: Study of circuit operation of the Buck converter
In this section, we can study on the temporal delay, td and voltage, v(t) at different measure
points of the Buck circuit. We can relate two adjacent measure points in terms of td and v(t).
The operation of the whole Buck circuit can be explained by observing the behavior and
relationship of td and v(t) at various circuit junctions.
• Caution when using the oscilloscope: Make sure the intensity of the displayed
waveforms is not too high, which can burn the screen material of the oscilloscope.
• Caution when using the function generator: Never short-circuit the output, which
may burn the output stage of the function generator.
Procedures:
1) Oscilloscope settings: CH1: 5V/div, CH2: 2V/div, input coupling: DC, operation mode:
DUAL, Time base: 2µs/div, CH1 ground level: at +2 division (2 divisions above center),
CH2 ground level: at -3 division. Make sure the VARIABLE knobs for CH1, CH2 and
time base at the CAL positions. Set trigger coupling: DC, trigger source: CH1, trigger
edge: positive edge, trigger level: adjust to get stable waveform.
2) Function generator settings: Select square-wave mode and set frequency at 62.5kHz.
Make sure the duty cycle is 50% (RAMP/PULSE knob is pushed in). Connect the
function generator output to CH1 (5V/div, 2µs/div). Set output voltage amplitude to 5V
or peak-to-peak 10V (Note: the period is 16µs with t5V = 8µs). Then connect the output
to the input P1 of the Buck converter circuit. After connection, check again the amplitude
of the function generator output and adjust to 5V amplitude if necessary.
3) Skill to draw voltage waveforms: The HORIZONTAL position knob should not be
moved since all the waveforms share a common time axis. Draw the waveform by using
one-to-one scale, i.e. 1 cm on the graph paper is equivalent to 1 division on the
oscilloscope screen. Draw the ground level and locate some of the important points, e.g.
maximum and minimum points, turning points, points where the waveform cuts through
the ground level and the major grids. Connect the points together by a smooth curve.
4) Using graph paper (Note: reserve space for SECTION 3 waveform. Draw
P1 waveform from the top of graph paper), draw the voltage waveforms
(see guidelines below) at the point P3, P4 and P5 with respect to the
referent voltage waveform at P1 to show the detailed v(t) and t
relationships among them. Note: You must draw the waveforms in a
single page of graph paper as shown in figure at the left and indicate
the ground level of each waveform. Set 2V/div for CH2 and use a time
base of 2µs/div.
Guidelines (all voltage below are relative to ground level):
v) Connect CH1 of the oscilloscope to P1 and draw the waveform. Keep this
connection all the time.
vi) Connect CH2 to P2 and measure:
the positive voltage amplitude = ______
the negative voltage amplitude = ______
vii) Connect CH2 to P3 and draw the waveform. Measure also:
the voltage level of the short flat voltage portion = ______
the time duration of the short flat voltage portion = ______
the rise time of the first or larger voltage rise portion = ______
viii) Connect CH2 to P4 and draw the waveform. Measure also:
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vP1
vP3
vP4
vP5
t
t
t
t
2µs/div

the voltage level when vP1 is +5V = ______
ix) Connect CH2 to P5 and draw the waveform. Measure also:
the time delay from the falling edge of vP1 to the falling edge of vP5 = ______
the negative voltage amplitude = ______
the voltage level at the time just before the vP5 rising edge = _______
x) Connect CH2 to P6 and observe the slightly rise and slightly fall portions. Measure:
the average voltage = _______
Questions:
v) vP2 waveform: a) Why the positive voltage portion exists? b) Why the negative voltage
portion exists?
vi) vP3 waveform: a) Why the positive amplitude is about the supply voltage VS? b) Why
the level of the short flat voltage portion is about 0.7V lower than the positive amplitude?
c) Why the duration of the short flat voltage portion exists? d) Why the first rise portion
exists? e) Why there is a second or smaller voltage rise (~0.7V) portion?
vii) vP4 waveform: a) Why the positive amplitude is the same as that of vp3? b) Explain why
the voltage level when vP1 is +5V exists.
viii) vP5 waveform: a) Why the positive amplitude is close to the supply voltage VS? b) Why
the time delay exists? c) Why the negative voltage portion exists and it rises slowly?
ix) vP6 waveform: Why the voltage is not really constant?
x) a) Calculate the duty cycle of BJT Q1. b) Why this duty cycle is not 50%? c) How you
relate this duty cycle to the average output voltage?
SECTION 2: Effect of duty cycle on output voltage V0 and its ripple ∆V0
This section is to observe the effect of the duty cycle on the output voltage and the
output voltage ripple. The experimental results will be compared to the theoretical
values. From these comparisons, you can reveal some of the non-ideal components that
affect the efficiency of the Buck converter.
Procedures:
1) Oscilloscope settings: CH1: 5V/div, DC input coupling, ground at +2 division, CH2:
20mV/div, AC input coupling, ground at center position, Triggering: CH1, negative
edge trigger (adjust trigger level to get stable waveform). Time base: 2µs/div.
Multimeter: 20V range, DC volt mode. Function generator: 100kHz (T=10µs) and 5V
amplitude. Connect CH1 to P5, CH2 to P6 and multimeter test leads across RL.
2) By changing ton, P5 (adjust the function generator RAMP/PULSE knob with knob pulled
out), measure the corresponding V0 and ∆V0 values as shown in table below. Here, ton, P5 is
the Q1 on-state time duration, refer to Fig-9 (read from CH1), V0 the average output
voltage (read from multimeter) and ∆V0 the peak-to-peak voltage at P6 (read from
CH2).
Table 1
ton, P5 /µs** 3 4 5 6 7 8
V0 /V
∆V0 /mV
**The frequency may be changed when ton, P5 is changed. Adjust the
frequency adjustment knob to return to 100kHz if necessary.
Questions:
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i) Tabulate your results ton, P5, V0 and ∆V0 and calculate the duty cycle at P5,
ftD P5on,P5 = , the output voltage ripple fraction, 00 VVr ∆= , the theoretical V0, t =
DP5VS (as equation Eq-9) and the theoretical 2
P5
t
8CLf
D1
r
−
= (as equation Eq-17), where f =
100kHz.
ii) a) Plot V0 and V0, t versus DP5 into one graph. b) Comment on the graph. c) Why there
is a discrepancy between experimental and theoretical of the V0 for a given duty cycle
value?
iii) a) Plot r and rt versus DP5 into one graph (use secondary y-axis for rt). b) Comment on
the graph. c) Why there is a discrepancy between experimental and theoretical of the
output voltage ripple fraction for a given duty cycle value?
iv) Derive a more detail relations for V0, t = f(VS, DP5, VEC1, VDF) and rt = f(DP5, C, L, f,
VDF/V0) by using the circuit models as show below, where VEC1 is the effective EC voltage
drop of Q1 for a given DP5 and VDF the effective forward voltage drop of DF for a given
DP5. The models neglected the DC resistance of the inductor. Comment on the newly
derived equations by comparing the ideal case equations.
Lab report format, evaluation and submission
• The report should consists of
 Results and answers for all the questions (Please write down the corresponding step or
procedure number as the identification of your answer in appropriate order),
 Discussion and Conclusion.
 Lab report to be submitted to the lab supervisor on the same day of the experiment
End of Lab sheet
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24 of 28
+
VS
_
+ VEC1
– + VL
–
L
+
V0
_
i
Fig-8: (a) Detailed model during Q1 on. (b) Detailed model during Q1 off
+ VL
–
L
+
V0
_
i+
VDF
_
(a) (b)

This page shall be attached as a front cover for the Lab Report
Name : ……………………………………………………………
SID :………………………………………..…
EEN3076 PE2
ON THE SPOT EVALUATION SHEET
Programme Outcomes
% of
contribution
Measurement Results
10
• Basic questions shall
be asked on the spot
effectively. 10
• Monitor the students
in communicating his
problem and solutions
during thr lab session
competence in specialized areas
of engineering discipline.
40
• completing all the lab
experiments
• answering all the
questions asked
• answering all
questions asked
during on the spot
evaluation
• Discussion and
Conclusion in the
report (shall based on
the results obtained)
• Ability to identify, formulate and
model problems and find
engineering solutions based on a
system approach.
10
• Solving problems
encountered during
experiments
• Ability to conduct research in
chosen fields of engineering. 10
• Troubleshooting and
researching on the
problems based on the
results obtained
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25 of 28

• Understanding of the importance
of sustainability and cost-
effectiveness in design and
development of engineering
solutions.
10
• Less use of jumpers
and space while
connecting the
circuits
• Testing of the
components before
connecting them in
circuit
individual.
10
• Speed in completing
experiments
Total (100%)
APPENDICES
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26 of 28
Component pin layout
Breadboard internal connection
5 holes connected vertically
5 holes connected vertically
25 holes connected horizontally 25 holes connected
horizontally
Diodes
1. The packaging of 1N4007 and 1N5819 is the same, check diode code written on the diode.
2. The packaging of 1N4148 and 1N5231 is the same, check diode code written on the diode.
The Resistor color code chart
ABC
AB x 10C
pF
.abc
0.abc µF
Capacitance
Potentiomete
r
IN COM OUT
Pin layout
7805

COMPONENT AND EQUIPMENT CHECKS
The go/no-go method of testing is used. Always do these checks before start your experiment.
Diode and Zener diode checks
Use multimeter in “diode test” mode. A good diode will give a reading for forward-biased test
and no reading for reverse-biased test.
“Diode test” mode: “COM” terminal is negative “–“. “V, Ω, mA” terminal is positive “+”.
Forward bias displays reading in mV, V or other unit. Reversed bias displays a symbol. All
these depend on the multimeter used. The test current is in mA (said 0.1mA, 1.5mA, etc).
“Ohm mode” test: This mode cannot be used for most of the multimeter.
SCR check
Use multimeter in “diode test” mode. A good SCR will only give forward-biased
readings for GK (gate-to-cathode) test (gate is connected to “+” and cathode is
connected to “–“) and AK (anode-to-cathode) test after gate triggering (connect
anode to gate momentarily). Some SCRs (non-sensitive gate type) give forward-
biased readings for KG test due to the internal resistor connected in between the
gate and the cathode (cathode short).
BJT check
1) Use multimeter in “diode test” mode. A good npn BJT will only give forward-biased
readings for BE test and BC test. A good pnp BJT will only give forward-biased readings
for EB test and CB test. Some BJTs (for inductive loads) give forward-biased readings for
npn EC test or pnp CE test due to the internal diode connected in between the collector
and the emitter.
2) Use multimeter in “hFE test” mode. A good npn or pnp BJT will give an hFE reading within
the specification range of the BJT.
“hFE test” mode: An hFE test socket labeled with pnp and npn is provided in some multimeter
panel. Plug in the BJT being tested into the corresponding holes of the socket. The reading
is the DC current gain IC/IB. The test current for IB is in µA (e.g 10µA).
Oscilloscope voltage probe check
Use oscilloscope calibration (CAL) terminal. A good probe will give a waveform of positive
square wave with 2V peak-to-peak and about 1 kHz.
Oscilloscope channel check
Use oscilloscope calibration (CAL) terminal and a good voltage probe. A good input channel
will give the corresponding waveform of the CAL terminal.
Function generator check
Check the output waveform by oscilloscope. A good function generator will give a stable
waveform on the oscilloscope screen. Caution: Never short-circuit the output to
ground, this can burn the output stage of the function generator.
Resistors, capacitors and inductors
Resistors are hard to fail.
Capacitors are hard to fail except over-voltage or wrong connections of polar capacitors.
Inductors are hard to fail except coil burned by over-current.
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27 of 28

OSCILLOSCOPE INFORMATION
Below are the functions of switches/knobs/buttons:
INTENSITY knob: control brightness of displayed waveforms. Make sure the intensity is
not too high.
FOCUS knob: adjust for clearest line of displayed waveforms.
TRIG LEVEL knob: adjust for voltage level where triggering occur (push down to be
positive slope trigger and pull up to be negative slope trigger).
Trigger COUPLING switch: Select trigger mode. Use either AUTO or NORM.
Trigger SOURCE switch: Select the trigger source. Use either CH1 or CH2.
HOLDOFF knob: seldom be used. Stabilize trigger. Pull out the knob is CHOP operation.
This operation is used for displaying two low frequency waveforms at the same time.
X-Y button: seldom be used. Make sure this button is not pushed in.
POSITION (Horizontal) knob: control horizontal position of displayed waveforms. Make
sure that it is pushed in (pulled up to be ten times sweep magnification).
POSITION (vertical) knobs: control vertical positions of displayed waveforms. Pulled out
CH1 POSITION knob leads to alternately trigger of CH1 and CH2. Pulled out CH2
POSITION knob leads to inversion of CH2 waveform.
Time base:
TIME DIV: provide step selection of sweep rate in 1-2-5 step.
VARIABLE (for time div) knob: Provides continuously variable sweep rate by a factor of 5.
Make sure that it is in full clockwise (at the CAL position, i.e. calibrated sweep rate as
indicated at the time div knob).
Vertical deflection:
VOLTS DIV: provide step selection of deflection in 1-2-5 step.
VARIABLE (for volts div) knob: A smaller knob located at the center of VOLTS DIV knob.
Fine adjustment of sensitivity, with a factor of 1/3 or lower of the panel-indicated value.
Make sure that it is in full clockwise (at the CAL position). Pulled out knob leads to
increase the sensitivity of the panel-indicated value by a factor of 5 (x 5 MAG state). Make
sure that it is pushed down.
AC/GND/DC switches: select input coupling options for CH1 and CH2. AC: display AC
component of input signal on oscilloscope screen. DC: display AC + DC components of
input signal on oscilloscope screen. GND: display ground level on screen, incorporate with
AUTO trigger COUPLING selection).
CH1/CH2/DUAL/ADD switch: select the operation mode of the vertical deflection. CH1:
CH1 operates alone. CH2: CH2 operates alone. DUAL: Dual-channel operates with CH1
and CH2 swept alternately. This operation is used for displaying two high frequency
waveforms at the same time.
Note: Keep the oscilloscope ON. The oscilloscope needs an amount of warm up time for
stabilization.
CAUTION: Never allow the INTENSITY of the displayed waveforms too bright. This can
burn the screen material of the oscilloscope.
kpb/hussain
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