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© P. Raatikainen Switching Technology / 2003
Switch Fabrics
Switching Technology S38.165
http://www.netlab.hut.fi/opetus/s38165
3 - 2
© P. Raatikainen Switching Technology / 2003
Switch fabrics
• Basic concepts
• Time and space switching
• Two stage switches
• Three stage switches
• Cost criteria
• Multi-stage switches and path search
2
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© P. Raatikainen Switching Technology / 2003
Switch fabrics
• Multi-point switching
• Self-routing networks
• Sorting networks
• Fabric implementation technologies
• Fault tolerance and reliability
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© P. Raatikainen Switching Technology / 2003
Basic concepts
• Accessibility
• Blocking
• Complexity
• Scalability
• Reliability
• Throughput
3
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© P. Raatikainen Switching Technology / 2003
Accessibility
• A network has full accessibility when each inlet can
be connected to each outlet (in case there are no
other I/O connections in the network)
• A network has a limited accessibility when the
above given property does not exist
• Interconnection networks applied in today’s switch
fabrics usually have full accessibility
3 - 6
© P. Raatikainen Switching Technology / 2003
Blocking
• Blocking is defined as failure to satisfy a connection requirement
and it depends strongly on the combinatorial properties of the
switching networks
Blocking Others
Network class Network type Network state
Non-blocking
With
blocking
state
Without blocking
states
Strict-sense
non-blocking
Wide-sense
non-blocking
Rearrangeably
non-blocking
4
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© P. Raatikainen Switching Technology / 2003
Blocking (cont.)
• Non-blocking - a path between an arbitrary idle inlet and arbitrary idle
outlet can always be established independent of network state at set-up
time
• Blocking - a path between an arbitrary idle inlet and arbitrary idle outlet
cannot be established owing to internal congestion due to the already
established connections
• Strict-sense non-blocking - a path can always be set up between any
idle inlet and any idle outlet without disturbing paths already set up
• Wide-sense non-blocking - a path can be set up between any idle
inlet and any idle outlet without disturbing existing connections,
provided that certain rules are followed. These rules prevent network
from entering a state for which new connections cannot be made
• Rearrangeably non-blocking - when establishing a path between an
idle inlet and an idle outlet, paths of existing connections may have to
be changed (rearranged) to set up that connection
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© P. Raatikainen Switching Technology / 2003
Complexity
• Complexity of an interconnection network is expressed by
cost index
• Traditional definition of cost index gives the number of cross-
points in a network
– used to be a reasonable measure of space division switching
systems
• Nowadays cost index alone does not characterize cost of an
interconnection network for broadband applications
– VLSIs and their integration degree has changed the way how
cost of a switch fabric is formed (number of ICs, power
consumption)
– management and control of a switching system has a significant
contribution to cost
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© P. Raatikainen Switching Technology / 2003
Scalability
• Due to constant increase of transport links and data rates on
links, scalability of a switching system has become a key
parameter in choosing a switch fabric architecture
• Scalability describes ability of a system to evolve with
increasing requirements
• Issues that are usually matter of scalability
– number of switching nodes
– number of interconnection links between nodes
– bandwidth of interconnection links and inlets/outlets
– throughput of switch fabric
– buffering requirements
– number of inlets/outlets supported by switch fabric
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© P. Raatikainen Switching Technology / 2003
Reliability
• Reliability and fault tolerance are system measures that have an
impact on all functions of a switching system
• Reliability defines probability that a system does not fail within a
given time interval provided that it functions correctly at the start
of the interval
• Availability defines probability that a system will function at a
given time instant
• Fault tolerance is the capability of a system to continue its
intended function in spite of having a fault(s)
• Reliability measures:
– MTTF (Mean Time To Failure)
– MTTR (Mean Time To Repair)
– MTB (Mean Time Between Failures)
6
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© P. Raatikainen Switching Technology / 2003
Throughput
• Throughput gives forwarding/switching speed/efficiency of a
switch fabric
• It is measured in bits/s, octets/s, cells/s, packet/s, etc.
• Quite often throughput is given in the range (0 ... 1.0], i.e. the
obtained forwarding speed is normalized to the theoretical
maximum throughput
3 - 12
© P. Raatikainen Switching Technology / 2003
Switch fabrics
• Basic concepts
• Time and space switching
• Two stage switches
• Three stage switches
• Cost criteria
• Multi-stage switches and path search
7
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© P. Raatikainen Switching Technology / 2003
Switching mechanisms
• A switched connection requires a mechanism that
attaches the right information streams to each other
• Switching takes place in the switching fabric, the
structure of which depends on network’s mode of
operation, available technology and required capacity
• Communicating terminals may use different physical
links and different time-slots, so there is an obvious
need to switch both in time and in space domain
• Time and space switching are basic functions of a
switch fabric
3 - 14
© P. Raatikainen Switching Technology / 2003
Space division switching
1
2
3
4
5
6
7
8
1
2
3
4
5
6
INPUTS
OUTPUTS
m INPUT LINKS n OUTPUT LINKS
INTERCONNECTION
NETWORK
• A space switch directs traffic from input links to output links
• An input may set up one connection (1, 3, 6 and 7), multiple
connections (4) or no connection (2, 5 and 8)
8
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© P. Raatikainen Switching Technology / 2003
Crossbar switch matrix
• Crossbar matrix introduces the basic structure of a space switch
• Information flows are controlled (switched) by opening and closing
cross-points
• m inputs and n outputs => mn cross-points (connection points)
• Only one input can be connected to an output at a time, but an input
can be connected to multiple outputs (multi-cast) at a time
1
2
3
4
5
6
7
8
1 2 3 4 5 6
m
INPUT
LINKS
n OUTPUT LINKS
MULTI-CAST
A CLOSED CROSS-POINT
3 - 16
© P. Raatikainen Switching Technology / 2003
An example space switch
• m x1 -multiplexer used to implement a space switch
• Every input is fed to every output mux and mux control signals
are used to select which input signal is connected through
each mux
mx1
1
2
m
1 2 m
mx1 mx1
mux/connection control
9
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© P. Raatikainen Switching Technology / 2003
Time division multiplexing
• Time-slot interchanger is a device, which buffers m incoming time-
slots, e.g. 30 time-slots of an E1 frame, arranges new transmit
order and transmits n time-slots
• Time-slots are stored in buffer memory usually in the order they
arrive or in the order they leave the switch - additional control logic
is needed to decide respective output order or the memory slot
where an input slot is stored
INPUT CHANNELS OUTPUT CHANNELS
1
2
3
4
5
6
Time-slot 1
Time-slot 2
Time-slot 3
Time-slot 4
Time-slot 5
Time-slot 6
1 2
3 4
5 6
TIME-SLOT INTERCHANGER
BUFFER SPACE FOR TIME-SLOTS
3 - 18
© P. Raatikainen Switching Technology / 2003
Time-slot interchange
1
2
3
4
5
6
7
8 1
2
3
4
5
6
1
2
3
4
5
6
7
8
BUFFER FOR m
INPUT/OUTPUT SLOTS
m
INPUT
LINKS
n
OUTPUT
LINKS
(3) (2) (4) (1,6) (5)
DESTINATION OUTPUT #
10
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© P. Raatikainen Switching Technology / 2003
Time switch implementation example 1
• Incoming time-slots are written cyclically into switch memory
• Output logic reads cyclically control memory, which contains a pointer for
each output time-slot
• Pointer indicates which input time-slot to insert into each output time-slot
1
2
3
.
.
.
Time-slot counter & R/W control
.
.
.
k
m
Switch
memory
1
2
3
n
Control
memory
.
.
.
.
.
.
j (k)
1
2
3
m …
Incoming frame buffer
1
2
j
n … …
Outgoing frame buffer
read
address (k)
Cyclic read
write
address
(3)
Cyclic write
read/write
address
(j)
3 - 20
© P. Raatikainen Switching Technology / 2003
Time switch implementation example 2
• Incoming time-slots are written into switch memory by using write-addresses
read from control memory
• A write address points to an output slot to which the input slot is addressed
• Output time-slots are read cyclically from switch memory
1
2
3
.
.
.
Time-slot counter & R/W control
.
.
.
k
n
Switch
memory
1
2
3 (k)
m
Control
memory
.
.
.
1
2
3
m …
Incoming frame buffer
1
2
j
n … …
Outgoing frame buffer
write
address (k)
Cyclic read
read
address
(3)
Cyclic write
read/write
address
(2)
11
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© P. Raatikainen Switching Technology / 2003
Properties of time switches
• Input and output frame buffers are read and written at wire-speed,
i.e. m R/Ws for input and n R/Ws for output
• Interchange buffer (switch memory) serves all inputs and outputs
and thus it is read and written at the aggregate speed of all inputs
and outputs
=> speed of an interchange buffer is a critical parameter in time
switches and limits performance of a switch
• Utilizing parallel to serial conversion memory speed requirement
can be cut
• Speed requirement of control memory is half of that of switch
memory (in fact a little moor than that to allow new control data to
be updated)
3 - 22
© P. Raatikainen Switching Technology / 2003
Time-Space analogy
• A time switch can be logically converted into a space switch by
setting time-slot buffers into vertical position => time-slots can be
considered to correspond to input/output links of a space switch
• But is this logical conversion fair ?
1
2
3
m … 1
2
3
n …
…
1
2
3
m
…
1
2
3
m
Time switch
Space switch
12
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© P. Raatikainen Switching Technology / 2003
Space-Space analogy
• A space switch carrying time multiplexed input and output signals can be
logically converted into a pure space switch (without cyclic control) by
distributing each time-slot into its own space switch
Inputs and outputs are
time multiplexed signals
(K time-slots)
…
1
2
m
…
1
2
n
1
…
1
2
m
…
1
2
n
2
…
1
2
m
…
1
2
n
K
…
1
2
m
…
1
2
n
…
To switch a time-slot, it is enough
to control one of the K boxes
3 - 24
© P. Raatikainen Switching Technology / 2003
An example conversion
n
K
multiplexed
input
signals
on
each
link
2
1
1
2
m
…
1
2
m
…
1
2
K
1
2
n
mxn KxK
1
2
K
nxm
1
2
m
1
2
m
1
2
m
1
2
m
1
2
m
1
2
m
…
…
…
13
3 - 25
© P. Raatikainen Switching Technology / 2003
Properties of space and time switches
• number of cross-points (e.g.
AND-gates)
- m input x n output = mn
- when m=n => n2
• output bit rate determines the
speed requirement for the
switch components
• both input and output lines
deploy “bus” structure
=> fault location difficult
• size of switch memory (SM)
and control memory (CM)
grows linearly as long as
memory speed is sufficient, i.e.
- SM = 2 x number of time-slots
- CM = 2 x number of time-slots
• a simple and cost effective
structure when memory speed
is sufficient
• speed of available memory
determines the maximum
switching capacity
Space switches Time switches
3 - 26
© P. Raatikainen Switching Technology / 2003
Switch fabrics
• Basic concepts
• Time and space switching
• Two stage switches
• Three stage switches
• Cost criteria
• Multi-stage switches and path search
14
3 - 27
© P. Raatikainen Switching Technology / 2003
A switch fabric as a combination of
space and time switches
• Two stage switches
• Time-Time (TT) switch
• Time-Space (TS) switch
• Space-Time (SP) switch
• Space-Apace (SS) switch
• TT-switch gives no advantage compared to a single
stage T-switch
• SS-switch increases blocking probability
3 - 28
© P. Raatikainen Switching Technology / 2003
A switch fabric as a combination of
space and time switches (cont.)
• ST-switch gives high blocking probability (S-switch can
develop blocking on an arbitrary bus, e.g. slots from two
different buses attempting to flow to a common output)
• TS-switch has low blocking probability, because T-switch
allows rearrangement of time-slots so that S-switching can
be done blocking free
1
2
n
1
2
n
…
TS n
TS 1
TS 2
…
TS n
TS 1
TS 2
…
…
TS n
TS 1
TS 2 1
2
n
1
2
n
…
TS n
TS 1
TS 2
…
TS n
TS 1
TS 2
…
…
TS n
TS 1
TS 2
ST-switch TS-switch
15
3 - 29
© P. Raatikainen Switching Technology / 2003
Time multiplexed space (TMS) switch
• Space divided inputs and each of them
carry a frame of three time-slots
• Input frames on each link are
synchronized to the crossbar
• A switching plane for each
time-slot to direct incoming
slots to destined output
links of the
corresponding
time-slot
Cross-point closed
1 2 3 4
T
i
m
e
Space
4x4 plane for slot 1
4x4 plane for slot 2
4x4 plane for slot 3
1
2
3
4
1
2
3
4
1
2
3
4
Incoming frames
Outputs
TS3 TS2 TS1
Output link address
4 1
2 3 2
3 2 1
1 4
3 - 30
© P. Raatikainen Switching Technology / 2003
Connection conflicts in a TMS switch
• Space divided inputs and each of them
carry a frame of three time-slots
• Input frames on each link are
synchronized to the crossbar
• A switching plane for each
time-slot to direct incoming
slots to destined output
links of the
corresponding
time-slot
Cross-point closed
1 2 3 4
T
i
m
e
Space
4x4 plane for slot 1
4x4 plane for slot 2
4x4 plane for slot 3
1
2
3
4
1
2
3
4
1
2
3
4
Incoming frames
Outputs
TS3 TS2 TS1
4 1 4
2 3 2
3 2 1
1 4
Connection
conflict
Conflict solved
by time-slot
interchange
16
3 - 31
© P. Raatikainen Switching Technology / 2003
TS switch interconnecting TDM links
1
2
3
TIME
3x3 TSI
OUTPUTS OF 4x4 TMS
SPACE
P
L
A
N
E
F
O
R
S
L
O
T
2
P
L
A
N
E
F
O
R
S
L
O
T
3
P
L
A
N
E
F
O
R
S
L
O
T
1
• Time division switching
applied prior to space
switching
• Incoming time-slots can
always be rearranged such
that output requests become
conflict free for each slot of
a frame, provided that the
number of requests for each
output is no more than the
number of slots in a frame
3 - 32
© P. Raatikainen Switching Technology / 2003
SS equivalent of a TS-switch
3 PLANES
3x3
S-SWITCH
PLANES
4 PLANES
4x4
S-SWITCH
PLANES
3
INPUTS
4
O
U
T
P
U
T
S
17
3 - 33
© P. Raatikainen Switching Technology / 2003
Connections through SS-switch
Coordinate (X, Y, Z)
stage
plane
input/output port
Example connections:
- (1, 3, 1) => (2, 1, 2)
- (1, 4, 2) => (2, 3, 4)
3x3
S-SWITCH
PLANES
4 PLANES
4x4
S-SWITCH
PLANES
(1, 3, 1)
(2, 1, 2)
(1, 4, 2)
(2, 3, 4)
3 - 34
© P. Raatikainen Switching Technology / 2003
Switch fabrics
• Basic concepts
• Time and space switching
• Two stage switches
• Three stage switches
• Cost criteria
• Multi-stage switches and path search
18
3 - 35
© P. Raatikainen Switching Technology / 2003
Three stage switches
• Basic TS-switch sufficient for switching time-slots onto addressed
outputs, but slots can appear in any order in the output frame
• If a specific input slot is to carry data of a specific output slot then a
time-slot interchanger is needed at each output
=> any time-slot on any input can be connected to any time-slot on any output
=> blocking probability minimized
• Such a 3-stage configuration is named TST-switching
(equivalent to 3-stage SSS-switching)
…
TS n
TS 1
TS 2
…
TS n
TS 1
TS 2
…
…
TS n
TS 1
TS 2
1
2
n
…
TS n
TS 1
TS 2
…
TS n
TS 1
TS 2
…
…
TS n
TS 1
TS 2 1
2
n
TST-switch:
3 - 36
© P. Raatikainen Switching Technology / 2003
SSS presentation of TST-switch
INPUTS
3x3
T- or S-SWITCH
PLANES
4 PLANES
4x4
S-SWITCH
PLANES
3x3
T- or S-SWITCH
PLANES
OUTPUTS
3 HORIZONTAL
PLANES
4 PLANES
19
3 - 37
© P. Raatikainen Switching Technology / 2003
Three stage switch combinations
• Possible three stage switch combinations:
• Time-Time-Time (TTT) ( not significant, no connection from
PCM to PCM)
• Time-Time-Space (TTS) (=TS)
• Time-Space-Time (TST)
• Time-Space-Space (TSS)
• Space-Time-Time (STT) (=ST)
• Space-Time-Space (STS)
• Space-Space-Time (SST) (=ST)
• Space-Space-Space (SSS) (not significant, high probability
of blocking)
• Three interesting combinations TST, TSS and STS
3 - 38
© P. Raatikainen Switching Technology / 2003
Time-Space-Space switch
• Time-Space-Space switch can be applied to increase switching
capacity
…
TS n
TS 1
TS 2
…
TS n
TS 1
TS 2
…
…
TS n
TS 1
TS 2
1
2
n
1
2
n
…
TS n
TS 1
TS 2
…
TS n
TS 1
TS 2
…
…
TS n
TS 1
TS 2
1
2
n
1
2
n
20
3 - 39
© P. Raatikainen Switching Technology / 2003
Space-Time-Space switch
• Space-Time-Space switch has a high blocking probability (like
ST-switch) - not a desired feature in public networks
1
2
n
1
2
n
…
TS n
TS 1
TS 2
…
TS n
TS 1
TS 2
…
…
TS n
TS 1
TS 2
3 - 40
© P. Raatikainen Switching Technology / 2003
Graph presentation of space switch
• A space division switch can be presented by a graph G = (V, E)
- V is the set of switching nodes
- E is the set of edges in the graph
• An edge e ∈
∈E is an ordered pair (u,v) ∈
∈V
- more than one edge can exist between u and v
- edges can be consider to be bi-directional
• V includes two special sets (T and R) of nodes not considered
part of switching network
- T is a set of transmitting nodes having only outgoing edges
(input nodes to switch)
- R is a set of receiving node having only incoming edges (output
nodes from switch)
21
3 - 41
© P. Raatikainen Switching Technology / 2003
Graph presentation of space
switch (cont.)
• A connection requirement is specified for each t ∈
∈T by subset Rt∈
∈R
to which t must be connected
- subsets Rt are disjoint for different t
- in case of multi-cast Rt contains more than one element for each t
• A path is a sequence of edges (t,a), (a,b), (b,c), … ,(f,g), (g,r) ∈
∈E,
t ∈
∈T, r∈
∈R and a,b,c,…,f,g are distinct elements of V - (T+R)
• Paths originating from different t may not use the same edge
• Paths originating from the same t may use the same edges
3 - 42
© P. Raatikainen Switching Technology / 2003
Graph presentation example
INPUT NODES t OUTPUT NODES r
t1
t2
t3
t15
.
.
.
r1
r2
r3
r15
.
.
.
s1
s2
s5
v1
v2
v5
u1
u2
u3
v3
v4
s3
s4
V = (t1, t2 ,... t15, s1, s2 ,... s5 , u1, u2 , u3 , v1, v2 ,... v5 , r1, r2 ,... r15)
E = {(t1, s1), ...(t15 , s5), (s1, u1), (s1, u2) ,... (s5, u3), (u1, v1 ), (u1, v2 ), ... (u3, v5 ),
(v1, r1 ), (v1, r2 ),... (v5, r15)}
22
3 - 43
© P. Raatikainen Switching Technology / 2003
SSS-switch and its graph presentation
INPUTS
3x3
S-SWITCH
PLANES
5
PLANE
S
5x5
S-SWITCH
PLANES
3x3
S-SWITCH
PLANES
OUTPUTS
3 HORIZONTAL
PLANES
5
PLANES
INPUTS t OUTPUTS r
3 - 44
© P. Raatikainen Switching Technology / 2003
Graph presentation of connections
INPUTS t OUTPUTS r
A PATH
A TREE

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L3 slides

  • 1. 1 3 - 1 © P. Raatikainen Switching Technology / 2003 Switch Fabrics Switching Technology S38.165 http://www.netlab.hut.fi/opetus/s38165 3 - 2 © P. Raatikainen Switching Technology / 2003 Switch fabrics • Basic concepts • Time and space switching • Two stage switches • Three stage switches • Cost criteria • Multi-stage switches and path search
  • 2. 2 3 - 3 © P. Raatikainen Switching Technology / 2003 Switch fabrics • Multi-point switching • Self-routing networks • Sorting networks • Fabric implementation technologies • Fault tolerance and reliability 3 - 4 © P. Raatikainen Switching Technology / 2003 Basic concepts • Accessibility • Blocking • Complexity • Scalability • Reliability • Throughput
  • 3. 3 3 - 5 © P. Raatikainen Switching Technology / 2003 Accessibility • A network has full accessibility when each inlet can be connected to each outlet (in case there are no other I/O connections in the network) • A network has a limited accessibility when the above given property does not exist • Interconnection networks applied in today’s switch fabrics usually have full accessibility 3 - 6 © P. Raatikainen Switching Technology / 2003 Blocking • Blocking is defined as failure to satisfy a connection requirement and it depends strongly on the combinatorial properties of the switching networks Blocking Others Network class Network type Network state Non-blocking With blocking state Without blocking states Strict-sense non-blocking Wide-sense non-blocking Rearrangeably non-blocking
  • 4. 4 3 - 7 © P. Raatikainen Switching Technology / 2003 Blocking (cont.) • Non-blocking - a path between an arbitrary idle inlet and arbitrary idle outlet can always be established independent of network state at set-up time • Blocking - a path between an arbitrary idle inlet and arbitrary idle outlet cannot be established owing to internal congestion due to the already established connections • Strict-sense non-blocking - a path can always be set up between any idle inlet and any idle outlet without disturbing paths already set up • Wide-sense non-blocking - a path can be set up between any idle inlet and any idle outlet without disturbing existing connections, provided that certain rules are followed. These rules prevent network from entering a state for which new connections cannot be made • Rearrangeably non-blocking - when establishing a path between an idle inlet and an idle outlet, paths of existing connections may have to be changed (rearranged) to set up that connection 3 - 8 © P. Raatikainen Switching Technology / 2003 Complexity • Complexity of an interconnection network is expressed by cost index • Traditional definition of cost index gives the number of cross- points in a network – used to be a reasonable measure of space division switching systems • Nowadays cost index alone does not characterize cost of an interconnection network for broadband applications – VLSIs and their integration degree has changed the way how cost of a switch fabric is formed (number of ICs, power consumption) – management and control of a switching system has a significant contribution to cost
  • 5. 5 3 - 9 © P. Raatikainen Switching Technology / 2003 Scalability • Due to constant increase of transport links and data rates on links, scalability of a switching system has become a key parameter in choosing a switch fabric architecture • Scalability describes ability of a system to evolve with increasing requirements • Issues that are usually matter of scalability – number of switching nodes – number of interconnection links between nodes – bandwidth of interconnection links and inlets/outlets – throughput of switch fabric – buffering requirements – number of inlets/outlets supported by switch fabric 3 - 10 © P. Raatikainen Switching Technology / 2003 Reliability • Reliability and fault tolerance are system measures that have an impact on all functions of a switching system • Reliability defines probability that a system does not fail within a given time interval provided that it functions correctly at the start of the interval • Availability defines probability that a system will function at a given time instant • Fault tolerance is the capability of a system to continue its intended function in spite of having a fault(s) • Reliability measures: – MTTF (Mean Time To Failure) – MTTR (Mean Time To Repair) – MTB (Mean Time Between Failures)
  • 6. 6 3 - 11 © P. Raatikainen Switching Technology / 2003 Throughput • Throughput gives forwarding/switching speed/efficiency of a switch fabric • It is measured in bits/s, octets/s, cells/s, packet/s, etc. • Quite often throughput is given in the range (0 ... 1.0], i.e. the obtained forwarding speed is normalized to the theoretical maximum throughput 3 - 12 © P. Raatikainen Switching Technology / 2003 Switch fabrics • Basic concepts • Time and space switching • Two stage switches • Three stage switches • Cost criteria • Multi-stage switches and path search
  • 7. 7 3 - 13 © P. Raatikainen Switching Technology / 2003 Switching mechanisms • A switched connection requires a mechanism that attaches the right information streams to each other • Switching takes place in the switching fabric, the structure of which depends on network’s mode of operation, available technology and required capacity • Communicating terminals may use different physical links and different time-slots, so there is an obvious need to switch both in time and in space domain • Time and space switching are basic functions of a switch fabric 3 - 14 © P. Raatikainen Switching Technology / 2003 Space division switching 1 2 3 4 5 6 7 8 1 2 3 4 5 6 INPUTS OUTPUTS m INPUT LINKS n OUTPUT LINKS INTERCONNECTION NETWORK • A space switch directs traffic from input links to output links • An input may set up one connection (1, 3, 6 and 7), multiple connections (4) or no connection (2, 5 and 8)
  • 8. 8 3 - 15 © P. Raatikainen Switching Technology / 2003 Crossbar switch matrix • Crossbar matrix introduces the basic structure of a space switch • Information flows are controlled (switched) by opening and closing cross-points • m inputs and n outputs => mn cross-points (connection points) • Only one input can be connected to an output at a time, but an input can be connected to multiple outputs (multi-cast) at a time 1 2 3 4 5 6 7 8 1 2 3 4 5 6 m INPUT LINKS n OUTPUT LINKS MULTI-CAST A CLOSED CROSS-POINT 3 - 16 © P. Raatikainen Switching Technology / 2003 An example space switch • m x1 -multiplexer used to implement a space switch • Every input is fed to every output mux and mux control signals are used to select which input signal is connected through each mux mx1 1 2 m 1 2 m mx1 mx1 mux/connection control
  • 9. 9 3 - 17 © P. Raatikainen Switching Technology / 2003 Time division multiplexing • Time-slot interchanger is a device, which buffers m incoming time- slots, e.g. 30 time-slots of an E1 frame, arranges new transmit order and transmits n time-slots • Time-slots are stored in buffer memory usually in the order they arrive or in the order they leave the switch - additional control logic is needed to decide respective output order or the memory slot where an input slot is stored INPUT CHANNELS OUTPUT CHANNELS 1 2 3 4 5 6 Time-slot 1 Time-slot 2 Time-slot 3 Time-slot 4 Time-slot 5 Time-slot 6 1 2 3 4 5 6 TIME-SLOT INTERCHANGER BUFFER SPACE FOR TIME-SLOTS 3 - 18 © P. Raatikainen Switching Technology / 2003 Time-slot interchange 1 2 3 4 5 6 7 8 1 2 3 4 5 6 1 2 3 4 5 6 7 8 BUFFER FOR m INPUT/OUTPUT SLOTS m INPUT LINKS n OUTPUT LINKS (3) (2) (4) (1,6) (5) DESTINATION OUTPUT #
  • 10. 10 3 - 19 © P. Raatikainen Switching Technology / 2003 Time switch implementation example 1 • Incoming time-slots are written cyclically into switch memory • Output logic reads cyclically control memory, which contains a pointer for each output time-slot • Pointer indicates which input time-slot to insert into each output time-slot 1 2 3 . . . Time-slot counter & R/W control . . . k m Switch memory 1 2 3 n Control memory . . . . . . j (k) 1 2 3 m … Incoming frame buffer 1 2 j n … … Outgoing frame buffer read address (k) Cyclic read write address (3) Cyclic write read/write address (j) 3 - 20 © P. Raatikainen Switching Technology / 2003 Time switch implementation example 2 • Incoming time-slots are written into switch memory by using write-addresses read from control memory • A write address points to an output slot to which the input slot is addressed • Output time-slots are read cyclically from switch memory 1 2 3 . . . Time-slot counter & R/W control . . . k n Switch memory 1 2 3 (k) m Control memory . . . 1 2 3 m … Incoming frame buffer 1 2 j n … … Outgoing frame buffer write address (k) Cyclic read read address (3) Cyclic write read/write address (2)
  • 11. 11 3 - 21 © P. Raatikainen Switching Technology / 2003 Properties of time switches • Input and output frame buffers are read and written at wire-speed, i.e. m R/Ws for input and n R/Ws for output • Interchange buffer (switch memory) serves all inputs and outputs and thus it is read and written at the aggregate speed of all inputs and outputs => speed of an interchange buffer is a critical parameter in time switches and limits performance of a switch • Utilizing parallel to serial conversion memory speed requirement can be cut • Speed requirement of control memory is half of that of switch memory (in fact a little moor than that to allow new control data to be updated) 3 - 22 © P. Raatikainen Switching Technology / 2003 Time-Space analogy • A time switch can be logically converted into a space switch by setting time-slot buffers into vertical position => time-slots can be considered to correspond to input/output links of a space switch • But is this logical conversion fair ? 1 2 3 m … 1 2 3 n … … 1 2 3 m … 1 2 3 m Time switch Space switch
  • 12. 12 3 - 23 © P. Raatikainen Switching Technology / 2003 Space-Space analogy • A space switch carrying time multiplexed input and output signals can be logically converted into a pure space switch (without cyclic control) by distributing each time-slot into its own space switch Inputs and outputs are time multiplexed signals (K time-slots) … 1 2 m … 1 2 n 1 … 1 2 m … 1 2 n 2 … 1 2 m … 1 2 n K … 1 2 m … 1 2 n … To switch a time-slot, it is enough to control one of the K boxes 3 - 24 © P. Raatikainen Switching Technology / 2003 An example conversion n K multiplexed input signals on each link 2 1 1 2 m … 1 2 m … 1 2 K 1 2 n mxn KxK 1 2 K nxm 1 2 m 1 2 m 1 2 m 1 2 m 1 2 m 1 2 m … … …
  • 13. 13 3 - 25 © P. Raatikainen Switching Technology / 2003 Properties of space and time switches • number of cross-points (e.g. AND-gates) - m input x n output = mn - when m=n => n2 • output bit rate determines the speed requirement for the switch components • both input and output lines deploy “bus” structure => fault location difficult • size of switch memory (SM) and control memory (CM) grows linearly as long as memory speed is sufficient, i.e. - SM = 2 x number of time-slots - CM = 2 x number of time-slots • a simple and cost effective structure when memory speed is sufficient • speed of available memory determines the maximum switching capacity Space switches Time switches 3 - 26 © P. Raatikainen Switching Technology / 2003 Switch fabrics • Basic concepts • Time and space switching • Two stage switches • Three stage switches • Cost criteria • Multi-stage switches and path search
  • 14. 14 3 - 27 © P. Raatikainen Switching Technology / 2003 A switch fabric as a combination of space and time switches • Two stage switches • Time-Time (TT) switch • Time-Space (TS) switch • Space-Time (SP) switch • Space-Apace (SS) switch • TT-switch gives no advantage compared to a single stage T-switch • SS-switch increases blocking probability 3 - 28 © P. Raatikainen Switching Technology / 2003 A switch fabric as a combination of space and time switches (cont.) • ST-switch gives high blocking probability (S-switch can develop blocking on an arbitrary bus, e.g. slots from two different buses attempting to flow to a common output) • TS-switch has low blocking probability, because T-switch allows rearrangement of time-slots so that S-switching can be done blocking free 1 2 n 1 2 n … TS n TS 1 TS 2 … TS n TS 1 TS 2 … … TS n TS 1 TS 2 1 2 n 1 2 n … TS n TS 1 TS 2 … TS n TS 1 TS 2 … … TS n TS 1 TS 2 ST-switch TS-switch
  • 15. 15 3 - 29 © P. Raatikainen Switching Technology / 2003 Time multiplexed space (TMS) switch • Space divided inputs and each of them carry a frame of three time-slots • Input frames on each link are synchronized to the crossbar • A switching plane for each time-slot to direct incoming slots to destined output links of the corresponding time-slot Cross-point closed 1 2 3 4 T i m e Space 4x4 plane for slot 1 4x4 plane for slot 2 4x4 plane for slot 3 1 2 3 4 1 2 3 4 1 2 3 4 Incoming frames Outputs TS3 TS2 TS1 Output link address 4 1 2 3 2 3 2 1 1 4 3 - 30 © P. Raatikainen Switching Technology / 2003 Connection conflicts in a TMS switch • Space divided inputs and each of them carry a frame of three time-slots • Input frames on each link are synchronized to the crossbar • A switching plane for each time-slot to direct incoming slots to destined output links of the corresponding time-slot Cross-point closed 1 2 3 4 T i m e Space 4x4 plane for slot 1 4x4 plane for slot 2 4x4 plane for slot 3 1 2 3 4 1 2 3 4 1 2 3 4 Incoming frames Outputs TS3 TS2 TS1 4 1 4 2 3 2 3 2 1 1 4 Connection conflict Conflict solved by time-slot interchange
  • 16. 16 3 - 31 © P. Raatikainen Switching Technology / 2003 TS switch interconnecting TDM links 1 2 3 TIME 3x3 TSI OUTPUTS OF 4x4 TMS SPACE P L A N E F O R S L O T 2 P L A N E F O R S L O T 3 P L A N E F O R S L O T 1 • Time division switching applied prior to space switching • Incoming time-slots can always be rearranged such that output requests become conflict free for each slot of a frame, provided that the number of requests for each output is no more than the number of slots in a frame 3 - 32 © P. Raatikainen Switching Technology / 2003 SS equivalent of a TS-switch 3 PLANES 3x3 S-SWITCH PLANES 4 PLANES 4x4 S-SWITCH PLANES 3 INPUTS 4 O U T P U T S
  • 17. 17 3 - 33 © P. Raatikainen Switching Technology / 2003 Connections through SS-switch Coordinate (X, Y, Z) stage plane input/output port Example connections: - (1, 3, 1) => (2, 1, 2) - (1, 4, 2) => (2, 3, 4) 3x3 S-SWITCH PLANES 4 PLANES 4x4 S-SWITCH PLANES (1, 3, 1) (2, 1, 2) (1, 4, 2) (2, 3, 4) 3 - 34 © P. Raatikainen Switching Technology / 2003 Switch fabrics • Basic concepts • Time and space switching • Two stage switches • Three stage switches • Cost criteria • Multi-stage switches and path search
  • 18. 18 3 - 35 © P. Raatikainen Switching Technology / 2003 Three stage switches • Basic TS-switch sufficient for switching time-slots onto addressed outputs, but slots can appear in any order in the output frame • If a specific input slot is to carry data of a specific output slot then a time-slot interchanger is needed at each output => any time-slot on any input can be connected to any time-slot on any output => blocking probability minimized • Such a 3-stage configuration is named TST-switching (equivalent to 3-stage SSS-switching) … TS n TS 1 TS 2 … TS n TS 1 TS 2 … … TS n TS 1 TS 2 1 2 n … TS n TS 1 TS 2 … TS n TS 1 TS 2 … … TS n TS 1 TS 2 1 2 n TST-switch: 3 - 36 © P. Raatikainen Switching Technology / 2003 SSS presentation of TST-switch INPUTS 3x3 T- or S-SWITCH PLANES 4 PLANES 4x4 S-SWITCH PLANES 3x3 T- or S-SWITCH PLANES OUTPUTS 3 HORIZONTAL PLANES 4 PLANES
  • 19. 19 3 - 37 © P. Raatikainen Switching Technology / 2003 Three stage switch combinations • Possible three stage switch combinations: • Time-Time-Time (TTT) ( not significant, no connection from PCM to PCM) • Time-Time-Space (TTS) (=TS) • Time-Space-Time (TST) • Time-Space-Space (TSS) • Space-Time-Time (STT) (=ST) • Space-Time-Space (STS) • Space-Space-Time (SST) (=ST) • Space-Space-Space (SSS) (not significant, high probability of blocking) • Three interesting combinations TST, TSS and STS 3 - 38 © P. Raatikainen Switching Technology / 2003 Time-Space-Space switch • Time-Space-Space switch can be applied to increase switching capacity … TS n TS 1 TS 2 … TS n TS 1 TS 2 … … TS n TS 1 TS 2 1 2 n 1 2 n … TS n TS 1 TS 2 … TS n TS 1 TS 2 … … TS n TS 1 TS 2 1 2 n 1 2 n
  • 20. 20 3 - 39 © P. Raatikainen Switching Technology / 2003 Space-Time-Space switch • Space-Time-Space switch has a high blocking probability (like ST-switch) - not a desired feature in public networks 1 2 n 1 2 n … TS n TS 1 TS 2 … TS n TS 1 TS 2 … … TS n TS 1 TS 2 3 - 40 © P. Raatikainen Switching Technology / 2003 Graph presentation of space switch • A space division switch can be presented by a graph G = (V, E) - V is the set of switching nodes - E is the set of edges in the graph • An edge e ∈ ∈E is an ordered pair (u,v) ∈ ∈V - more than one edge can exist between u and v - edges can be consider to be bi-directional • V includes two special sets (T and R) of nodes not considered part of switching network - T is a set of transmitting nodes having only outgoing edges (input nodes to switch) - R is a set of receiving node having only incoming edges (output nodes from switch)
  • 21. 21 3 - 41 © P. Raatikainen Switching Technology / 2003 Graph presentation of space switch (cont.) • A connection requirement is specified for each t ∈ ∈T by subset Rt∈ ∈R to which t must be connected - subsets Rt are disjoint for different t - in case of multi-cast Rt contains more than one element for each t • A path is a sequence of edges (t,a), (a,b), (b,c), … ,(f,g), (g,r) ∈ ∈E, t ∈ ∈T, r∈ ∈R and a,b,c,…,f,g are distinct elements of V - (T+R) • Paths originating from different t may not use the same edge • Paths originating from the same t may use the same edges 3 - 42 © P. Raatikainen Switching Technology / 2003 Graph presentation example INPUT NODES t OUTPUT NODES r t1 t2 t3 t15 . . . r1 r2 r3 r15 . . . s1 s2 s5 v1 v2 v5 u1 u2 u3 v3 v4 s3 s4 V = (t1, t2 ,... t15, s1, s2 ,... s5 , u1, u2 , u3 , v1, v2 ,... v5 , r1, r2 ,... r15) E = {(t1, s1), ...(t15 , s5), (s1, u1), (s1, u2) ,... (s5, u3), (u1, v1 ), (u1, v2 ), ... (u3, v5 ), (v1, r1 ), (v1, r2 ),... (v5, r15)}
  • 22. 22 3 - 43 © P. Raatikainen Switching Technology / 2003 SSS-switch and its graph presentation INPUTS 3x3 S-SWITCH PLANES 5 PLANE S 5x5 S-SWITCH PLANES 3x3 S-SWITCH PLANES OUTPUTS 3 HORIZONTAL PLANES 5 PLANES INPUTS t OUTPUTS r 3 - 44 © P. Raatikainen Switching Technology / 2003 Graph presentation of connections INPUTS t OUTPUTS r A PATH A TREE