The document discusses design considerations for differential signaling on PCBs. It notes that differential signaling has advantages of producing less electromagnetic interference and being highly immune to interference. However, it also notes that differences in length or spacing between differential pair traces can reduce these advantages. Specifically, the key points are that the length of each trace in a differential pair should be equal, the spacing between traces should be constant, and bends should be gradual rather than sharp to avoid impedance discontinuities and mode conversion that degrade signal quality and increase noise.

1. Introduction
A pair of traces (wires) between the driver and receiver, one trace carries the
positive signal and the other carries a negative signal that is both equal to, and
the opposite polarity from. This is just so-called differential signal [1].
The real PCB differential trace :
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2. Advantage
One advantage of differential signal is with less EMI radiation. EMI radiation is
fundamentally caused by any electrical transitions with sharp edges, which
produces electromagnetic radiation. In digital systems, periodic clock signals are
the major cause of EMI [2].
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3. But, with balanced differential devices signal lines, the fields around the two
electrical paths oppose each other, and the concentric magnetic fields tend to
react with one another and cancel each other, and then results in lower
emissions [2-3].
This is the reason why usually high speed digital signals are differential form.
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4. The second major benefit of differential signaling is that it is highly immune to
outside electromagnetic interference(EMI) and crosstalk from nearby signal
conductors. An example of how it works is shown in following figure [4] :
B and C are differential pair, and A is the nearby interference. In terms of
S-parameter, the interference that A couples to B is SBA, and the interference that
A couples to C is SCA. If both B and C are close to each other, SBA and SCA will be
roughly equal. Besides, B and C have opposite direction on signal propagating.
That is to say, SBA and SCA will be roughly equal and opposite, and then cancel
each other. It’s the reason why that differential signaling is highly immune to
outside interference.
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5. In RF circuits, compared with Tx signal, Rx signal is much weaker. Therefore, in
order to be highly immune to interference and avoid degrading the sensitivity,
the Rx signal usually adopt differential form.
In addition, I/Q signal does affect the modulation and demodulation accuracy.
Therefore, both Tx I/Q and Rx I/Q signals adopt differential form to avoid
being interfered by outside interference, and then degrading the modulation and
demodulation accuracy.
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6. Length
From previous analysis, we know that the differential signal has two major
benefits :
1. Produce less interference
2. Be highly immune to interference
However, if the differential pair has different length in each other, perhaps the
benefits will disappear. Let’s take the following figure for example :
B and C are differential pair. If the length of B is not equal to which of C, there will
be an additional length, just “length 2”. At this moment, length2 is single-end
signal, which will interfere A, or be interfered by A.
If B and C are RF Rx signal differential pair, the length difference will introduce a
large impedance discontinuity (100 Ohm => 50 Ohm), which causes mismatch
loss and sensitivity degradation.
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7. As mentioned above, usually I/Q signals adopt differential form. That is to say,
there will be four I/Q signals : I+、I-、Q+、Q-. And the phase relationship is as
following figure :
The length of the four I/Q signals must be all equal, or there will be IQ phase
Imbalance, which will produce the undesired sideband, so-called image.
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8. The amplitude difference between the desired signal and image is sideband
suppression. If the length of the four I/Q signals are all equal, in theory, there will
be no IQ phase Imbalance, just like the left side of above figure.
In contrast, in the right side of above figure, the more length 2 is, the more IQ
phase Imbalance and the less Sideband Suppression will be.
As illustrated in above figure, we know that the less Sideband Suppression is, the
more phase error will be, which will make EVM increase.
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9. According to [5], we know that SNR is inversely proportional to EVM :
That is to say, in terms of Rx I/Q differential signal, the more length difference is,
the more EVM, the less SNR, and the poorer sensitivity will be.
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10. Separation
The impedance of differential pair is related to the separation between each
other, as illustrated in following figure :
Consequently, for the high speed digital differential pair (e.g. MIPI, HDMI, and
USB, etc.), the separation should be constant, or there will be reflection due to
impedance discontinuity, and then EMI radiation interference will be stronger.
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11. In addition, the differential pair separation is not only related to impedance, but
also immunity to interference. Let’s take the following figure for example :
B and C are differential pair, and A is the nearby interference. In terms of
S-parameter, the interference that A couples to B is SBA, and the interference that
A couples to C is SCA. According to previous analysis, if both B and C are close to
each other, SBA and SCA will cancel each other. Nevertheless, if B and C are not
close to each other, i.e. S2 is large, SBA > SCA. In that case, B will be interfered by
A. In light of this, the less separation between each other is, the better immunity
to interference will be. But, we already know that the separation affects
impedance, the less separation is, the less impedance will be. So, to be accurate,
the separation between each other should be as small as possible without
destroying target impedance(e.g. 100 Ohm or 150 Ohm) to posses better
immunity to interference.
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12. From another point of view, we regard A as the nearby victim. According to
previous statement, we know that with balanced differential devices signal lines,
the fields around the two electrical paths oppose each other, and the concentric
magnetic fields tend to react with one another and cancel each other, and then
results in lower emissions. Nevertheless, if S2 is large, the concentric magnetic
fields around B and C are not able to cancel each other completely, and then
emissions will become higher. Consequently, the separation between each other
should be as small as possible without destroying target impedance to posses
lower emissions.
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13. Bend
In real PCB, it’s impossible for the differential traces to be only straight. The bend
is inevitable, and then causes extra length and additional common-mode noise.
Consequently, the conventional method is to bend again to compensate for the
length difference.
But, as shown in the above figure, these bends are all bad. Because these bends
are all sharp, i.e. 90 degree, which causes impedance discontinuity and signal
reflection [6].
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14. Besides, there is no mode conversion in ideal differential signal. Nevertheless,
the sharp bends cause mode conversion (differential-mode to common-mode)
and additional common-mode noise.
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15. According to [6-7], the less the rising time is , the more the common-mode noise
due to sharp bend is.
And as shown in the following figure, the more length of L is, the more the
common-mode noise due to sharp bend is.
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16. In terms of eye diagram, because the sharp bend causes impedance discontinuity
and mode conversion, which cause loss. Besides, there will be jitter due to phase
imbalance. In other words, the sharp bend will narrow the eye height and width.
Thus, in PCB layout, we should avoid the sharp bend.
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17. Of course, as mentioned above, the bend is inevitable. But we are able to make
use of round or 45 degree corner, rather than 90 degree.
For example, for the dual-bend mentioned above, we can make use of the 45
degree, as illustrated in the right side of the following figure.
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18. According to [8], the ranking of phase imbalance due to bend :
90 degree > 45 degree > round corner
And the common-mode noise due to round corner is actually smaller than 90
degree.
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19. Consequently, among the three types of bend, no matther which one is adopted,
there must be loss, phase imbalance, and common-mode noise, the only
difference is how much they are. Now that the bend is inevitable, what we can do
is only to mitigate the influence by means of 45 degree and round corner.
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20. EMI Filter
For the high speed digital differential signal, we make use of termination resistor
to do impedance matching. Nevertheless,
mismatching is inevitable.
or because of via itself and connector.
As mentioned above, the impedance mismatching causes reflection, and then
enhances EMI noise. In other words
there must be noise emission
For the high speed digital differential signal, we make use of termination resistor
to do impedance matching. Nevertheless, in real PCB, the impedance
mismatching is inevitable. Perhaps it’s because of bypassing the via,
or because of via itself and connector.
the impedance mismatching causes reflection, and then
In other words, as long as there is high speed digital
noise emission.
For the high speed digital differential signal, we make use of termination resistor
the impedance
s because of bypassing the via,
the impedance mismatching causes reflection, and then
as long as there is high speed digital signal,
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21. For example, MDDI or MIPI may radiate noise to RF antenna, and then sensitivity
degrades [10].
In terms of time-domain, the noise will distort the signal waveform.
Thus, we need to suppress the noise due to high speed digital signal. The most
common method is to make use of EMI filter.
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22. For the noise due to differential signal, there are two kinds : common-mode and
differential-mode.
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23. Nevertheless, with differential-mode noise suppression, perhaps the signal is
attenuated as well. But with common-mode noise suppression, the signal is
hardly attenuated.
Besides, comparing with differential-mode noise, the common-mode noise is
stronger. Thus, for the differential signal, we usually focus on common-mode
noise suppression. And we often make use of common-mode choke, composed of
inductor and capacitor, to suppress common-mode noise. As shown in the
following figure :
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24. In terms of time-domain, with EMI filter, the distortion of signal waveform
reduces much.
In terms of frequency-domain, with EMI filter, the noise floor reduces much.
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25. In terms of RF, there will be sensitivity degradation issue while LCM is on. Thus,
we can add common-mode choke in MIPI signal to mitigate the noise to improve
the sensitivity.
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26. As mentioned above, for the differential signal, we usually focus on
common-mode noise suppression. Consequently, we should select the
common-mode choke with higher common-mode noise suppression.
From the following figure, we can see that there is still de-sense issue in some
channels with the original common-mode choke. But, there is no de-sense issue
in all channels with the new common-mode choke with higher common-mode
noise suppression.
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27. Besides, there is also de-sense issue when camera is on.
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28. We can also add EMI Filter in the camera differential signal to suppress the noise.
As illustrated in the following figure, the de-sense issue is mitigated with EMI
Filter.
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29. But, as mentioned above, for the high speed digital differential signal,we make
use of termination resistor to do impedance matching, and common-mode choke
is composed of inductor and capacitor. In other words, the internal resistance
within the inductor of common-mode choke may change the impedance, cause
the noise reduction is less than expected, even cause stronger noise emission
than the situation without common-mode choke. Therefore, when selecting the
common-mode choke, not only focus on common-mode noise suppression, but
also on the internal resistance within the inductor. The safest method is to
discuss with your vendor before adding the common-mode choke.
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30. Ground
According to [11], all currents return to their source. In other words, currents
flow in loops.
As illustrated in the following figure and formulas, we know that the larger the
loop area is, the larger the inductance is and vice versa.
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31. According to [12], current will always follows the path with least impedance. At
low frequency, the resistance of a path dominates the impedance, while at high
frequency, the inductance of a path dominates. This is best summarized as
follows:
– Low frequency current flows through the path with least resistance.
– High frequency current flows through the path with least inductance
As mentioned above, the smaller the loop area is, the smaller the inductance is.
That is to say, the return current of high frequency signal follows the path with
least loop area. Therefore, as illustrated in the above figure, although the return
path of high frequency is longer than which of low frequency, the loop area of
high frequency is smaller than which of low frequency. Consequently, we realize
that the return current of high frequency is underneath the signal path.
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32. And the simulation result supports the statement as well. At low frequency, the
return current concentrates on the path from load to source. But at high
frequency, the return current concentrates on the path underneath the signal
path.
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33. However, as illustrated in the following figure, the return current of differential
signal, i.e. GND current, is almost zero. Thus, we wonder that does the return
current of differential signal exist in adjacent trace, not in ground ?
According to [13], we know that differential pair not only couples to ground, but
also to adjacent trace in differential-mode.
As mentioned above, the return current of high frequency signal follows the path
with least loop area. That is to say, for differential signal, the path with least loop
area is just the return path.
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34. Take the following PCB stack-up for example, if we lay differential traces on top
layer, and we regard layer 2 as ground plane, the spacing between differential
traces and ground plane is only 2.8 mil. Even though we regard layer 4 as ground
plane, the spacing is only 8.4 mil at best.
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35. But, with the same PCB stack-up, the spacing between each other of the
differential pair on the top layer is about 10 mil with 100 ohm target impedance.
Thus, in theory, the return current has two paths : the adjacent trace and the
ground plane. But in real PCB, because the ground plane can make the
differential pair have least loop area, the return current almost concentrates on
the ground plane. The simulation result supports the statement as well.
.
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36. But, as mentioned above, the return current of differential signal, i.e. GND current,
is almost zero. Is there a contradiction ?
No! these two statements are both correct. One is transient state, and the other is
steady state. As illustrated in following figure, in transient state, the return
current is underneath the differential signal and on the ground plane. But in
steady state, because i1 and i2 will cancel each other, GND current is almost zero.
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37. Now that we realize that the return current almost concentrates on the ground
plane, the completeness of ground plane matters. As illustrated in following
figure, with solid ground plane, the return loss is at least -20 dB, and insertion
loss is small as well.
But, with a break in ground plane, the return loss becomes poor, and insertion
loss increases.
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38. As mentioned above, the spacing between the differential signal and ground
plane impacts impedance. In other words, with a break in ground plane, there
will be impedance discontinuity and reflection, which worsen return loss. And,
a break in ground plane is equivalent to a series inductor, which attenuates the
signal and increases insertion loss.
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39. According to [14], Ground Bounce distorts the signal waveform, affects the circuit
logic, and worsens the system stability.
As illustrated in following figure, with a break in ground plane, there will be
Ground Bounce.
Therefore, the ground plane should be as solid as possible.
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40. Although in steady state, the ground current is almost zero. Nevertheless, due to
crosstalk, there will still be an induced current flowing in a closed loop on the
ground plane under the differential pair, and produces noise emission [1].
According to [15], the 3W rule can further minimize 70% crosstalk. So, should
we increase the spacing between the differential pair and the ground plane to
reduce the induced current ?
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41. No! you can’t increase the spacing. Because in real PCB, the length of differential
pair is hardly equal. That is to say, more or less, there must be an extra length,
which is single-end signal with return path on the ground plane. Thus, the more
spacing is, the larger the loop area of single-end signal is. Undoubtedly, large
loop area causes strong noise emission.
According to[1], the loop area of induced current is the same as which of
differential pair. And as mentioned above, in real PCB, the return current almost
concentrates on the ground plane. In other words, instead of increasing the
spacing, you should decrease the spacing to minimize the loop area of induced
current and differential pair. Besides, for loop area reduction, you should shorten
the length of differential pair, and decrease the spacing between each other of the
differential pair (without affecting target impedance) as well.
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42. Conclusion
The differential signal has two major benefits :
1. Produce less interference
2. Be highly immune to interference
Three points that you should pay attention to :
1. Make the length of each other of the differential pair as equal as possible
2. Make the spacing between each other of the differential pair as constant as
possible
3. Make the spacing between each other of the differential pair as small as
possible(without affecting the target impedance)
For the bend, round corner is better than 45 degree, but sharp corner is
forbidden.
When selecting EMI filter, you should pay attention to :
1. Common-mode noise rejection
2. The internal resistance within the inductor
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43. Ground plane should be as solid as possible.
For loop area reduction, you should :
1. Shorten the length of differential pair
2. Minimize the the spacing between each other of the differential pair
(without affecting the target impedance)
3. Minimize the the spacing between the differential pair and the ground plane
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44. Reference
[1] Differential Signals:Rules to Live By
[2] LVDS Reduces EMI, FAIRCHILD
[3] Design For EMI, INTEL
[4] What is a Differential Signal? Lattice
[5] On the Extended Relationships Among EVM, BER and SNR as Performance
Metrics
[6] Signal Integrity Issues for High-Speed Serial Differential Interconnects
[7] INTERCONNECT SIGNAL INTEGRITY, SAMTEC
[8] Your layout is skewed
[9] Breaking Up A Pair
[10] EMI countermeasure for Smartphone, TAIYO YUDEN
[11] Emc & the Printed Circuit Board: Design, Theory, & Layout Made Simple
[12] Part 4 –PCB LAYOUT RULES FOR SIGNAL INTEGRITY
[13] The Truth about Differential Pairs in High Speed PCBs
[14] Understanding and Minimizing Ground Bounce, FAIRCHILD
[15] Designing for Board Level Electromagnetic Compatibility
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