This document discusses implementing a 32-bit floating point arithmetic unit on a Spartan3 FPGA board according to the IEEE 754 floating point standard. It will perform addition, subtraction, multiplication, division, and square root operations on floating point numbers. For this mini project, addition will be implemented. The unit will be synthesized for the FPGA board using Xilinx ISE software. Floating point operations require more resources than integer operations but FPGAs enable reduced development time compared to application-specific ICs. The document reviews floating point number representation and the addition algorithm to be implemented. The Spartan3 FPGA board and Xilinx software tools are identified for hardware interfacing and simulation.