This document provides instructions for an electronics lab experiment on voltage regulators. The objectives are to study the major parts of a voltage regulator and how they work, determine the load and line regulation of a voltage regulator, and study the operation of a voltage regulator with constant current limiting. The experiment involves building circuits with discrete components to demonstrate a basic linear voltage regulator and one with constant current limiting. Measurements will be taken to analyze the load and line regulation and generate voltage-current graphs to characterize the constant current limiting behavior.

1. EEN1046 Electronics III Experiment ECT2
FACULTY OF ENGINEERING
LAB SHEET
ELECTRONICS III
EEE1046
TRIMESTER 3 (2013/2014)
ECT2: Voltage Regulators

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EEE1046 Electronics III
Experiment ECT2: Voltage Regulators
1.0 Objective
i. To study the major parts of a voltage regulator and how they work
ii. To determine the load and line regulation of a voltage regulator
iii. To study the operation of a voltage regulator with constant current limiting
2.0 Apparatus
Equipment Required Components Required
Adjustable DC Power Supply 1 2N2222A BJT
[TO-92 plastic package]
3
Digital Multimeter 1 Resistor 10 [1/4W] 1
Breadboard 1 Resistor 47 [1/4W] 1
Resistor 1k [1/4W] 1
Resistor 3.9k [1/4W] 2
Resistor 10k [1/4W] 1
Resistor 220 [1/2W] 1
Potentiometer 1k [0.5W or 1W] 1
Potentiometer 10k [0.5W or 1W] 1
Ceramic capacitor 0.1F 1
Zener Diode 4.7V [0.5W]
[BZX55C4V7]
1
3.0 Introduction
Voltage regulator is used to provide a predetermined dc voltage VO which is not affected by
the amount of current drawn, temperature, nor the variation in the AC line voltage.
A linear series voltage regulator contains a control element [usually a transistor] which
always operates in the active region, hence the term “linear”. The control element is in
“series” between the unregulated line voltage and the regulated output voltage. When the
control element is a transistor, it is often referred to as the “pass transistor” as it “passes” the
required current to maintain the predetermined amount of regulated output voltage.
The main elements of a linear series voltage regulator include:
a) A control element
b) A reference voltage
c) An error detector
d) A sampling network

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Figure 3.1 below depicts the interconnection between these elements.
Control
element
Reference
voltage
Error detector
Sampling
network
Vin Vout
Figure 3.1 The major parts of a linear series voltage regulator
The basic operation of the linear series voltage regulator is as follows:
i. The error detector compares the reference voltage with a sample of the output voltage
ii. The output of the error detector is fed to the control element
iii. The control element causes the output voltage to increase or decrease until the sample
voltage equals the reference voltage
iv. When this occurs, the error voltage is zero and the control element is held in a stable
state
v. This will keep the output voltage relatively constant regardless of the load
requirements [within specific limits]
Figure 3.2 shows a linear series voltage regulator built with discrete components. A zener
diode is used to provide the reference voltage (VZ). The sampling network has a
potentiometer that acts as a variable voltage divider. A single transistor error detector [error
amplifier] amplifies the differential voltage between its inputs [VZ and VBQ2] causing an
immediate change in the base current of the pass transistor of the control element. When the
output voltage decreases for some reason, VBQ2 decreases. This reduces the differential
voltage of the error amplifier [since VZ is fixed], causing ICQ2 to decrease. A smaller ICQ2
reduces the voltage across R2 causing the base voltage of the pass transistor to increase. This
brings the output voltage back to its original level, as the control element allows more current
to pass through. On the other hand, if the output voltage increases for some reason, VBQ2
increases. This increases the differential voltage of the error amplifier causing its collector
current to increase. More collector current increases the voltage drop across R2, causing a
decrease in the base voltage of the pass transistor. This reduces the output voltage to its
original value as the control element limits the amount of current that can pass through.

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R1
R3
R4
Q1
Q2
R5
C1
D1
VS
R2
RL
+
–
VO
control
element
error
detector
reference
votlage sampling
netw ork
IO
Figure 3.2 Linear series voltage regulator with discrete components
Percent load regulation is one of the methods used to determine the relative quality or
effectiveness of a voltage regulator to maintain nominal or no-load regulation. The lower the
percent load regulation, the better the regulator is in keeping the output voltage at its nominal
value [the no-load voltage] for a particular load.
%100..% 


FL
FLNL
V
VV
RL Eqn (1)
where VNL = the no-load output voltage [the output voltage when the load is open]
VFL = the full-load output voltage [the output voltage when the load current
demand is at its maximum value]
Another method of measurement that is commonly used to determine the relative quality or
effectiveness of regulation is source or line regulation. Line regulation is the variation in
output voltage that occurs when the unregulated input voltage increases or decreases by a
specified amount. The lower the percent line regulation, the better the regulator is in keeping
the output voltage constant when changes in line voltage occur.
%100..% 



S
O
V
V
RS Eqn (2)
where VO = variation in output voltage
VS = variation in input voltage
3.1 Constant Current Limiting
Constant current limiting is a protection scheme that prevents damage to the pass transistor if
a short-circuit or large current demand occurs. Figure 3.3 shows a discrete series voltage
regulator with constant current limiting. The value of RSC is chosen to limit the pass transistor
current to a specified and safe level:
VBQ2
VZ

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(max)
)3(
(max)
)3(
RSC
QBE
PT
QBE
SC
I
V
I
V
R  Eqn (3)
where IPT(max) is the maximum limited current through the pass transistor (IPT = IC(Q1))
IRSC(max) is the maximum limited current through the current limiting resistor, RSC
R3
R4
Q1
Q2
R5
C1
D1
RSC
Q3
R2
R1
RL
VS
constant
current
limiting
+
–
VO
IO
Figure 3.3 Series voltage regulator with constant current limiting
When the pass transistor current reaches IPT(max), Q3 turns ON and the base current (of Q1) is
diverted away from the pass transistor Q1, limiting the current through it to IPT(max). Under
short-circuit condition (VO = 0V), the output current will be:
2
)3()1(
(max)
R
VVV
II
QBEQBES
PTSC

 - Eqn (4)
Since IPT(max) keeps Q3 ON with a base-emitter voltage of 0.7V, the current through RSC and
Q1 remains relatively constant.
The major disadvantage of constant current limiting is that a heatsink is usually required on
the pass transistor to prevent overheating damage. When a short-circuit occurs, almost the
entire line voltage is dropped across the pass transistor [VC(Q1) = VS, VE(Q1) = 0.7V]. Hence,
the power dissipation [PD = VCE(Q1)IPT(max)] of the pass transistor will be high. At large line
voltage, even small IPT(max) may require a heatsink. Heatsinking usually increases the cost and
board space of series voltage regulators. Figure 3.4 illustrates the relationship between the
output voltage and current when constant current limiting is employed. Note IO  IPT = IC(Q1).
VBQ2
VZ

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VO
VO(nom)
IPT(max)
ISC
IO
Note: Normally the f eedback current is negligible
Figure 3.4 VO vs. IO for constant-current limiting protection scheme
4.0 Experiments
1. Instructor’s checks : Student is responsible to ask the instructor to check your
experimental results before proceeding to the next experiment. On-The-Spot Evaluation
will be carried out in the first exp.
2. BJTs and Zener diode checks: perform go/no-go testing as mentioned in Appendix A.
3. Importance to check your BJTs: You must check your BJTs. The number of burned
BJT will be recorded by the lab staff and penalty will be applied for burning > 1 BJT.
4. BJT burned cautions: Any form of short circuit between the collector (C) pin and the
base (B) pin will burn the BJT emitter junction (JE).
5. Setting up the DC Power Supply:
(a) Set DC Power Supply to 15V (power supply output has not connected to the circuit)
(b) Set the current scale switch to LO (if any)
(c) Set the current adjustment knob to about ¼ turn from the min position
(d) On the DC power supply unit, connect the “” output terminal to the “GND” terminal
Experimental Circuits:
R2
R1
1k
3.9k
Q1C E
B
VO
D1
VS
VZ
4.7V
Note: Q1, Q2 and Q3 are 2N2222A
+15V
10k
potQ2 CE
B
RL2
B
1k
pot
RL1
220
X
Y
A
IO
R3 3.9k
C1
0.1uF
R5
10k
R4
Space
reserved for
Exp 4.2 and
Exp 4.3
{VL}
J
Figure 4.1 (for Exp 4.1)
VB,Q1
VC1

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R2
R1
1k
3.9k
RSC
47
RSIE
10
Q1C E
B
VO
D1
VS
VZ
4.7V
Note: Q 1, Q2 and Q3 are 2N2222A
+15V
10k
potQ2 CE
B
Q3C E
B
RL2
B
1k
pot
RL1
220
X
Y
A
IO
R3 3.9k
C1
0.1uF
R5
10k
R4
Figure 4.2 (for Exp 4.2)
4.1 Load and Line Regulation
1. Construct the circuit as shown in Figure 4.1.
PRECAUTIONS to prevent to burn BJT Q1:
The emitter junction (JE) or the whole transistor Q1 can be burned in a short duration
(e.g. by a transient touching of connections) if any mistake occurs.
(i) JE gets burned: if there is a short circuit between the collector leg (or metal case)
and the base leg. [The metal case of BJT is internally connected to the collector].
(ii) Whole BJT gets burned: if there is a short circuit between the points A and B or the
emitter leg is shorted to the ground (0V).
Prevention Steps:
(i) Use connecting wires to connect component legs to the BJT legs.
(ii) Avoid too compact or messy circuit.
(iii) Double-check the circuit connections and the resistors used.
(iv) Precautions (e.g. measure VB,Q1 at the R2 leg which is connected to the base leg)
2. Before connect the power supply output to the circuit, set VS = 15V.
3. Analyze the circuit to predict the values of VB,Q1 (respect to ground), VC1, Io(min) (when RL
= RL1+RL2 = 1220Ω) and Io(max) (RL = 220Ω) for VO = +9V. Show your analysis in the
column provided in the Discussion part. These values are used for checking purposes.
4. Measure VD1 (the voltage across D1). This value should be around 4.7V DC.
5. With jumper wire J removed, adjust R4 to get VO = +9V. Record as no-load voltage VNL.
Measure and record VB,Q1 and VC1. These values should be around those in Step 3.
6. Connect the jumper J. Turn RL2 to Y side (max resistance). Let this is 0o position.
7. Measure VO and VRL1. Record VO value as the loaded voltage VL in Table 4.1(a). Check
VS with multimeter so that it is the same at each set of VL and VRL1 measurement.
8. Turn RL2 about 60o and record VL and VRL1 values. Repeat for every 60o turn in the same
direction.
9. Calculate and record IO = VRL1/RL1 and RL = VL/IO .
Note: IO at 0o and (max) angle should be around those predicted values in Step 3.

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10. Using the measured values, calculate [with Eqn (1)] the percent load regulation (%L.R.)
for each RL value in Table 4.1(a).
11. Turn RL2 to 0o position and record the output voltage as VO(nom) (Nominal output voltage)
and the diode D1 voltage as VZ(nom) in Table 4.1(b).
12. Decrease the DC input voltage from +15V to +12V (a change of 20% in the line voltage).
13. Measure and record VO as VO(min) and the diode D1 voltage as VZ(min) in Table 4.1(b).
14. Using the measured values, calculate [with Eqn (2)] the percent line regulation (%S.R.).
15. Ask the instructor to check your results. Show your last multimeter reading to the
instructor. On-The-Spot Evaluation: to be part of the Lab Performance Evaluation.
On-The-Spot Evaluation references:
BJT gets burned: -10% of ECT2 total mark per burned BJT if burned > 1 BJT
Equip. setup: bad (> 1 wrong setup) / average (1 wrong setup) / good (no mistake setup)
Values: bad (> 1 wrong value) / average (1 wrong value) / good (no wrong value)
Equipment setup: any equipment (power supply, multimeter, breadboard) - can be evaluated
at anytime along the whole lab session
Setup: Any mistakes in equipment wiring-connections and settings
Values: Any much different between theory & Exp, bad/wrong records, errors in calculations
from exp results
Note: Circuit is not working but experimental results are correct – Cheating (0 marks)
4.2 ConstantCurrentLimiting
1. Modify the circuit in Figure 4.1 to that of Figure 4.2.
CAUTIONS: Use connecting wires to connect component legs to the BJT legs. Double-
check the circuit connections. Set VS = 15V before connect its outputs to the circuit.
2. Analyze the circuit to predict Io(min) and VB,Q1(RLmax) (when RL = 1220) for Vo = +9V.
Assume Io  IRSC. Show your analysis in the Discussion part.
3. Estimate IPT(max) based on Eqn (3). Assume VBE(Q3) = 0.7V. Show your analysis in the
Discussion part.
4. Analyze the circuit to predict Vo(RLmin) (RL = 220). Note Q3 has turned on causing Vo <
9V. Assume Io  IRSC. Show your analysis in the Discussion part.
5. Turn RL2 to Y side (max resistance). Adjust R4 to get VO = +9V. Measure and record VD1
and VB,Q1(RLmax). Check with the value in Step 2.
6. Measure and record VO, VC1, VRL1 and VRSIE in Table 4.2.
7. Calculate IO = VRL1/RL1 and IE,Q1 = VRSIE/RSIE . Check with the value in Step 2.
8. To plot Vo versus Io, Io or Vo is changed in step of Io (2mA) or Vo (2V), depending on
the portion of the graph as shown in Figure 4.3 below.
NO direct IO measurement is required, instead measure VRL1 change (VRL1). Steps:
(a) calculate VRL1 = IoRL1 and then VRL1(next) = VRL1(present) + VRL1.
(b) measure VRL1 while adjusting RL2 to get about the reference VRL1(next) value.
9. Begin to measure at Io(min) and end at Vo(RLmin). Make sure there are VO, VC1, VRL1 and
VRSIE measurements at the point when Vo begins to drop significantly (at IPT(max)). Adjust
RL2 from Y to X side to change Io or Vo. Check with the values in Step 3 and Step 4.

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VO
VO(nom)
IPT(max)
ISC
IO
8V
6V
4V
VO(RLmin)
IO(min)
ΔIO = 2mA
[Begin]
[End]
ΔVO = 2V
Figure 4.3 Vo versus Io for constant-current limiting protection scheme
10. Plot VO versus IO and IE,Q1 (share the same x-axis) on Graph 4.2.
11. Ask the instructor to check your results. Show your last multimeter reading to the
instructor.
Report Submission
You are to submit your report immediately upon completion of the laboratory session.
End of Lab Sheet