SlideShare a Scribd company logo
1 of 45
Download to read offline
By
Ms.J.Shiny Christobel, AP/ECE
Sri Ramakrishna Institute of Technology,
Coimbatore
 FIR filter is always stable because all its poles are at the origin.
09-05-2024 2
The conditions are
 Symmetric condition h(n)=h(N-1-n)
 Antisymmetric condition h(n)=-h(N-1-n)
09-05-2024 3
 A digital filter is causal if its impulse response h (n) =0 for n<0.
 A digital filter is stable if its impulse response is absolutely summable.
09-05-2024 4
 FIR filter is always stable.
 A realizable filter can always be obtained. FIR filter has a linear phase
response.
09-05-2024 5
 The cascade from realization is preferred when complex zeros with
absolute magnitude less than one.
09-05-2024 6
The desirable characteristics’ of the window are
 The central lobe of the frequency response of the window should contain
most of the energy and should be narrow.
 The highest side lobe level of the frequency response should be small.
 The side’s lobes of the frequency response should decrease in energy
rapidly as ω tends to π.
09-05-2024 7
 The necessary and sufficient condition for linear phase characteristics in
FIR filter is the impulse response h(n) of the system should have the
symmetry property,i.e,
H(n) = h(N-1-n)
Where N is the duration of the sequence.
09-05-2024 8
 In frequency sampling method the desired magnitude response is sampled
and a linear phase response is specified .
 The samples of desired frequency response are defined as DFT coefficients.
 The filter coefficients are then determined as the IDFT of this set of
samples.
09-05-2024 9
 Frequency sampling method is attractive for narrow band frequency
selective filters where only a few of the samples of the frequency response
are non-zero.
09-05-2024 10
 a) Computational requirements is less.
 b) Storage for filter coefficient is less.
 c) Finite arithmetic effect is less.
 d) Filter order required in multi-rate application is low.
09-05-2024 11
Given the analog filter H(s)=A/(S+a),find the equivalent digital filter
H(z) using impulse invariant transformation.
09-05-2024 12
09-05-2024 13
 The autocorrelation of a sequence is the correlation of a sequence with its
shifted version, and this indicates how fast the signal changes.

09-05-2024 14
 In fixed point arithmetic the position of the binary point is fixed.
 The bit to the right represents the fractional part of the number & those to
the left represent the integer part.
 For example, the binary number 01.1100 has the value 1.75 in decimal.
09-05-2024 15
 In block point arithmetic the set of signals to be handled is divided into
blocks.
 Each block has the same value for the exponent.
 The arithmetic operations within the block uses fixed point arithmetic &
only one exponent per block is stored thus saving memory.
 This representation of numbers is more suitable in certain FFT flow graph
& in digital audio applications.
09-05-2024 16
 1. Large dynamic range
 2. Over flow in floating point representation is unlike.
09-05-2024 17
 1. Input quantization error
 2. Coefficient quantization error
 3. Product quantization error
09-05-2024 18
 In floating point arithmetic, multiplication are carried out as follows, Let f1
= M1*2c1 and f2 = M2*2c2.
 Then f3 = f1*f2 = (M1*M2) 2(c1+c2)
 That is, mantissa is multiplied using fixed-point arithmetic and the
exponents are added.
 The sum of two floating-point numbers is carried out by shifting the bits of
the mantissa
 Of the smaller number to the right until the exponents of the two numbers
are equal and then adding the mantissas.
09-05-2024 19
 In digital signal processing, the continuous time input signals are converted
into digital using a b-bit ACD.
 The representation of continuous signal amplitude by a fixed digit produce
an error, which is known as input quantization error.
09-05-2024 20
 The addition of two fixed-point arithmetic numbers cause over flow the
sum exceeds the word size available to store the sum.
 This overflow caused by adder make the filter output to oscillate between
maximum amplitude limits.
 Such limit cycles have been referred to as over flow oscillations.
09-05-2024 21
 Quantization of coefficients in digital filters lead to slight changes in their
value.
 These changes in value of filter coefficients modify the pole-zero locations.
 Sometimes the pole locations will be changed in such a way that the system
may drive into instability.
09-05-2024 22
 Cascade form.
09-05-2024 23
 There are two methods used to prevent overflow
 1. Saturation arithmetic 2. Scaling
09-05-2024 24
 1.zero input limit cycle oscillations
 2.Overflow limit cycle oscillations
09-05-2024 25
09-05-2024 26
09-05-2024 27
09-05-2024 28
09-05-2024 29
09-05-2024 30
09-05-2024 31
09-05-2024 32
09-05-2024 33
09-05-2024 34
09-05-2024 35
09-05-2024 36
09-05-2024 37
09-05-2024 38
09-05-2024 39
09-05-2024 40
09-05-2024 41
09-05-2024 42
09-05-2024 43
 Prove that an FIR filter has linear phase if the unit sample response satisfies the condition h(n)= ±h(M-1-n),
n=0,1,….M-1. Also discuss symmetric and anti-symmetric cases of FIR filter.
09-05-2024 44
09-05-2024 45

More Related Content

Similar to DSP - Realization of Finite Impulse Response Filter

110232799-Final Year Thesis
110232799-Final Year Thesis110232799-Final Year Thesis
110232799-Final Year Thesis
Bhavishya Sehgal
 

Similar to DSP - Realization of Finite Impulse Response Filter (20)

Lr3421092114
Lr3421092114Lr3421092114
Lr3421092114
 
200 m hz flash adc
200 m hz flash adc200 m hz flash adc
200 m hz flash adc
 
ANALOG TO DIGITAL CONVERTOR
ANALOG TO DIGITAL CONVERTORANALOG TO DIGITAL CONVERTOR
ANALOG TO DIGITAL CONVERTOR
 
C011122428
C011122428C011122428
C011122428
 
Design and Analysis of Low Power Double Tail Comparator for 2-bit Fast ADC
Design and Analysis of Low Power Double Tail Comparator for 2-bit Fast ADCDesign and Analysis of Low Power Double Tail Comparator for 2-bit Fast ADC
Design and Analysis of Low Power Double Tail Comparator for 2-bit Fast ADC
 
A digital calibration algorithm with variable amplitude dithering for domain-...
A digital calibration algorithm with variable amplitude dithering for domain-...A digital calibration algorithm with variable amplitude dithering for domain-...
A digital calibration algorithm with variable amplitude dithering for domain-...
 
110232799-Final Year Thesis
110232799-Final Year Thesis110232799-Final Year Thesis
110232799-Final Year Thesis
 
Design of Counter Using SRAM
Design of Counter Using SRAMDesign of Counter Using SRAM
Design of Counter Using SRAM
 
A 8-bit high speed ADC using Intel μP 8085
A 8-bit high speed ADC using Intel μP 8085A 8-bit high speed ADC using Intel μP 8085
A 8-bit high speed ADC using Intel μP 8085
 
Digital Signal Processing Assignment Help
Digital Signal Processing Assignment HelpDigital Signal Processing Assignment Help
Digital Signal Processing Assignment Help
 
3BITFLASHADC
3BITFLASHADC3BITFLASHADC
3BITFLASHADC
 
Microprocessor-Compatible Quadrature Decoder/Counter Design
Microprocessor-Compatible Quadrature Decoder/Counter DesignMicroprocessor-Compatible Quadrature Decoder/Counter Design
Microprocessor-Compatible Quadrature Decoder/Counter Design
 
ANALOG TO DIGITALCONVERTOR FOR BLOOD-GLUCOSE MONITORING
ANALOG TO DIGITALCONVERTOR FOR  BLOOD-GLUCOSE MONITORING  ANALOG TO DIGITALCONVERTOR FOR  BLOOD-GLUCOSE MONITORING
ANALOG TO DIGITALCONVERTOR FOR BLOOD-GLUCOSE MONITORING
 
Analog to Digitalconvertor for Blood-Glucose Monitoring
Analog to Digitalconvertor for Blood-Glucose MonitoringAnalog to Digitalconvertor for Blood-Glucose Monitoring
Analog to Digitalconvertor for Blood-Glucose Monitoring
 
Performance Evaluation of Iterative Receiver using 16-QAM and 16-PSK Modulati...
Performance Evaluation of Iterative Receiver using 16-QAM and 16-PSK Modulati...Performance Evaluation of Iterative Receiver using 16-QAM and 16-PSK Modulati...
Performance Evaluation of Iterative Receiver using 16-QAM and 16-PSK Modulati...
 
Fundamental of MSD Module-III Part-a.ppt
Fundamental of MSD Module-III Part-a.pptFundamental of MSD Module-III Part-a.ppt
Fundamental of MSD Module-III Part-a.ppt
 
An Efficient Reconfigurable Filter Design for Reducing Dynamic Power
An Efficient Reconfigurable Filter Design for Reducing Dynamic PowerAn Efficient Reconfigurable Filter Design for Reducing Dynamic Power
An Efficient Reconfigurable Filter Design for Reducing Dynamic Power
 
IRJET- Single Precision Floating Point Arithmetic using VHDL Coding
IRJET-  	  Single Precision Floating Point Arithmetic using VHDL CodingIRJET-  	  Single Precision Floating Point Arithmetic using VHDL Coding
IRJET- Single Precision Floating Point Arithmetic using VHDL Coding
 
COMPARISON ANALYSIS OF SHUNT ACTIVE FILTER AND TRANSFORMERLESS PARALLEL HYBRI...
COMPARISON ANALYSIS OF SHUNT ACTIVE FILTER AND TRANSFORMERLESS PARALLEL HYBRI...COMPARISON ANALYSIS OF SHUNT ACTIVE FILTER AND TRANSFORMERLESS PARALLEL HYBRI...
COMPARISON ANALYSIS OF SHUNT ACTIVE FILTER AND TRANSFORMERLESS PARALLEL HYBRI...
 
Comparison analysis of shunt active filter and transformerless parallel hybri...
Comparison analysis of shunt active filter and transformerless parallel hybri...Comparison analysis of shunt active filter and transformerless parallel hybri...
Comparison analysis of shunt active filter and transformerless parallel hybri...
 

More from Shiny Christobel (7)

DSP Module-4 Finite Wordlength Effect and Zero Limit Cycle
DSP Module-4 Finite Wordlength Effect and Zero Limit CycleDSP Module-4 Finite Wordlength Effect and Zero Limit Cycle
DSP Module-4 Finite Wordlength Effect and Zero Limit Cycle
 
circular convolution and Linear convolution
circular convolution and Linear convolutioncircular convolution and Linear convolution
circular convolution and Linear convolution
 
DFT - Discrete Fourier Transform and its Properties
DFT - Discrete Fourier Transform and its PropertiesDFT - Discrete Fourier Transform and its Properties
DFT - Discrete Fourier Transform and its Properties
 
BJT - Bipolar Junction Transistor / Electron Devices
BJT -  Bipolar Junction Transistor /  Electron DevicesBJT -  Bipolar Junction Transistor /  Electron Devices
BJT - Bipolar Junction Transistor / Electron Devices
 
Transducers and Data Aquisition Systems.pdf
Transducers and Data Aquisition Systems.pdfTransducers and Data Aquisition Systems.pdf
Transducers and Data Aquisition Systems.pdf
 
Semiconductors
SemiconductorsSemiconductors
Semiconductors
 
DSP PPT
DSP PPTDSP PPT
DSP PPT
 

Recently uploaded

Online blood donation management system project.pdf
Online blood donation management system project.pdfOnline blood donation management system project.pdf
Online blood donation management system project.pdf
Kamal Acharya
 
一比一原版(UofT毕业证)多伦多大学毕业证成绩单
一比一原版(UofT毕业证)多伦多大学毕业证成绩单一比一原版(UofT毕业证)多伦多大学毕业证成绩单
一比一原版(UofT毕业证)多伦多大学毕业证成绩单
tuuww
 

Recently uploaded (20)

"United Nations Park" Site Visit Report.
"United Nations Park" Site  Visit Report."United Nations Park" Site  Visit Report.
"United Nations Park" Site Visit Report.
 
ONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdf
ONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdfONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdf
ONLINE CAR SERVICING SYSTEM PROJECT REPORT.pdf
 
BRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWING
BRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWINGBRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWING
BRAKING SYSTEM IN INDIAN RAILWAY AutoCAD DRAWING
 
Arduino based vehicle speed tracker project
Arduino based vehicle speed tracker projectArduino based vehicle speed tracker project
Arduino based vehicle speed tracker project
 
Peek implant persentation - Copy (1).pdf
Peek implant persentation - Copy (1).pdfPeek implant persentation - Copy (1).pdf
Peek implant persentation - Copy (1).pdf
 
RESORT MANAGEMENT AND RESERVATION SYSTEM PROJECT REPORT.pdf
RESORT MANAGEMENT AND RESERVATION SYSTEM PROJECT REPORT.pdfRESORT MANAGEMENT AND RESERVATION SYSTEM PROJECT REPORT.pdf
RESORT MANAGEMENT AND RESERVATION SYSTEM PROJECT REPORT.pdf
 
Supermarket billing system project report..pdf
Supermarket billing system project report..pdfSupermarket billing system project report..pdf
Supermarket billing system project report..pdf
 
Online blood donation management system project.pdf
Online blood donation management system project.pdfOnline blood donation management system project.pdf
Online blood donation management system project.pdf
 
Pharmacy management system project report..pdf
Pharmacy management system project report..pdfPharmacy management system project report..pdf
Pharmacy management system project report..pdf
 
Software Engineering - Modelling Concepts + Class Modelling + Building the An...
Software Engineering - Modelling Concepts + Class Modelling + Building the An...Software Engineering - Modelling Concepts + Class Modelling + Building the An...
Software Engineering - Modelling Concepts + Class Modelling + Building the An...
 
A CASE STUDY ON ONLINE TICKET BOOKING SYSTEM PROJECT.pdf
A CASE STUDY ON ONLINE TICKET BOOKING SYSTEM PROJECT.pdfA CASE STUDY ON ONLINE TICKET BOOKING SYSTEM PROJECT.pdf
A CASE STUDY ON ONLINE TICKET BOOKING SYSTEM PROJECT.pdf
 
Introduction to Machine Learning Unit-4 Notes for II-II Mechanical Engineering
Introduction to Machine Learning Unit-4 Notes for II-II Mechanical EngineeringIntroduction to Machine Learning Unit-4 Notes for II-II Mechanical Engineering
Introduction to Machine Learning Unit-4 Notes for II-II Mechanical Engineering
 
一比一原版(UofT毕业证)多伦多大学毕业证成绩单
一比一原版(UofT毕业证)多伦多大学毕业证成绩单一比一原版(UofT毕业证)多伦多大学毕业证成绩单
一比一原版(UofT毕业证)多伦多大学毕业证成绩单
 
Construction method of steel structure space frame .pptx
Construction method of steel structure space frame .pptxConstruction method of steel structure space frame .pptx
Construction method of steel structure space frame .pptx
 
Online book store management system project.pdf
Online book store management system project.pdfOnline book store management system project.pdf
Online book store management system project.pdf
 
Electrostatic field in a coaxial transmission line
Electrostatic field in a coaxial transmission lineElectrostatic field in a coaxial transmission line
Electrostatic field in a coaxial transmission line
 
Dairy management system project report..pdf
Dairy management system project report..pdfDairy management system project report..pdf
Dairy management system project report..pdf
 
2024 DevOps Pro Europe - Growing at the edge
2024 DevOps Pro Europe - Growing at the edge2024 DevOps Pro Europe - Growing at the edge
2024 DevOps Pro Europe - Growing at the edge
 
RM&IPR M4.pdfResearch Methodolgy & Intellectual Property Rights Series 4
RM&IPR M4.pdfResearch Methodolgy & Intellectual Property Rights Series 4RM&IPR M4.pdfResearch Methodolgy & Intellectual Property Rights Series 4
RM&IPR M4.pdfResearch Methodolgy & Intellectual Property Rights Series 4
 
KIT-601 Lecture Notes-UNIT-3.pdf Mining Data Stream
KIT-601 Lecture Notes-UNIT-3.pdf Mining Data StreamKIT-601 Lecture Notes-UNIT-3.pdf Mining Data Stream
KIT-601 Lecture Notes-UNIT-3.pdf Mining Data Stream
 

DSP - Realization of Finite Impulse Response Filter

  • 1. By Ms.J.Shiny Christobel, AP/ECE Sri Ramakrishna Institute of Technology, Coimbatore
  • 2.  FIR filter is always stable because all its poles are at the origin. 09-05-2024 2
  • 3. The conditions are  Symmetric condition h(n)=h(N-1-n)  Antisymmetric condition h(n)=-h(N-1-n) 09-05-2024 3
  • 4.  A digital filter is causal if its impulse response h (n) =0 for n<0.  A digital filter is stable if its impulse response is absolutely summable. 09-05-2024 4
  • 5.  FIR filter is always stable.  A realizable filter can always be obtained. FIR filter has a linear phase response. 09-05-2024 5
  • 6.  The cascade from realization is preferred when complex zeros with absolute magnitude less than one. 09-05-2024 6
  • 7. The desirable characteristics’ of the window are  The central lobe of the frequency response of the window should contain most of the energy and should be narrow.  The highest side lobe level of the frequency response should be small.  The side’s lobes of the frequency response should decrease in energy rapidly as ω tends to π. 09-05-2024 7
  • 8.  The necessary and sufficient condition for linear phase characteristics in FIR filter is the impulse response h(n) of the system should have the symmetry property,i.e, H(n) = h(N-1-n) Where N is the duration of the sequence. 09-05-2024 8
  • 9.  In frequency sampling method the desired magnitude response is sampled and a linear phase response is specified .  The samples of desired frequency response are defined as DFT coefficients.  The filter coefficients are then determined as the IDFT of this set of samples. 09-05-2024 9
  • 10.  Frequency sampling method is attractive for narrow band frequency selective filters where only a few of the samples of the frequency response are non-zero. 09-05-2024 10
  • 11.  a) Computational requirements is less.  b) Storage for filter coefficient is less.  c) Finite arithmetic effect is less.  d) Filter order required in multi-rate application is low. 09-05-2024 11
  • 12. Given the analog filter H(s)=A/(S+a),find the equivalent digital filter H(z) using impulse invariant transformation. 09-05-2024 12
  • 14.  The autocorrelation of a sequence is the correlation of a sequence with its shifted version, and this indicates how fast the signal changes.  09-05-2024 14
  • 15.  In fixed point arithmetic the position of the binary point is fixed.  The bit to the right represents the fractional part of the number & those to the left represent the integer part.  For example, the binary number 01.1100 has the value 1.75 in decimal. 09-05-2024 15
  • 16.  In block point arithmetic the set of signals to be handled is divided into blocks.  Each block has the same value for the exponent.  The arithmetic operations within the block uses fixed point arithmetic & only one exponent per block is stored thus saving memory.  This representation of numbers is more suitable in certain FFT flow graph & in digital audio applications. 09-05-2024 16
  • 17.  1. Large dynamic range  2. Over flow in floating point representation is unlike. 09-05-2024 17
  • 18.  1. Input quantization error  2. Coefficient quantization error  3. Product quantization error 09-05-2024 18
  • 19.  In floating point arithmetic, multiplication are carried out as follows, Let f1 = M1*2c1 and f2 = M2*2c2.  Then f3 = f1*f2 = (M1*M2) 2(c1+c2)  That is, mantissa is multiplied using fixed-point arithmetic and the exponents are added.  The sum of two floating-point numbers is carried out by shifting the bits of the mantissa  Of the smaller number to the right until the exponents of the two numbers are equal and then adding the mantissas. 09-05-2024 19
  • 20.  In digital signal processing, the continuous time input signals are converted into digital using a b-bit ACD.  The representation of continuous signal amplitude by a fixed digit produce an error, which is known as input quantization error. 09-05-2024 20
  • 21.  The addition of two fixed-point arithmetic numbers cause over flow the sum exceeds the word size available to store the sum.  This overflow caused by adder make the filter output to oscillate between maximum amplitude limits.  Such limit cycles have been referred to as over flow oscillations. 09-05-2024 21
  • 22.  Quantization of coefficients in digital filters lead to slight changes in their value.  These changes in value of filter coefficients modify the pole-zero locations.  Sometimes the pole locations will be changed in such a way that the system may drive into instability. 09-05-2024 22
  • 24.  There are two methods used to prevent overflow  1. Saturation arithmetic 2. Scaling 09-05-2024 24
  • 25.  1.zero input limit cycle oscillations  2.Overflow limit cycle oscillations 09-05-2024 25
  • 44.  Prove that an FIR filter has linear phase if the unit sample response satisfies the condition h(n)= ±h(M-1-n), n=0,1,….M-1. Also discuss symmetric and anti-symmetric cases of FIR filter. 09-05-2024 44