Direct Memory Access (DMA) allows for high-speed data transfer between external devices and main memory without continuous processor intervention. The DMA controller manages these transfers by maintaining memory addresses and bus signals, incrementing addresses, and tracking transfer counts. Upon completion, the DMA signals the processor via an interrupt, utilizing three registers for operation control and status.

1. DMA

2. Direct Memory Access
• To transfer large blocks of data at high speed, a special unit
may be provided to allow transfer of a block of data
directly.
• between an external device and the main memory without
continuous intervention by the processor.
• This approach is called Direct Memory Access(DMA).
• DMA is the part of the input/ output device called DMA
controller.
• For each word transfer, it provides the memory address and
all the bus signals that control data transfer.
• The DMA controller must increment the memory address
for successive words and keep track of the number of
transfers.

3. DMA controller can transfer data without intervention by the
processor.
Its operation under the control of a program executed by the
processor.
The processor sends the starting address, the no of words in the
block and direction of the transfer.
To receive this the DMA perform the required operation.
The entire blocks has been transferred the DMA informed to
the processor by raising the interrupt signal.

5. There are three registers.
The two registers are used for storing the starting address and
word count.
The third register contains status and control flag.
When R/W is set to 1, the controller perform read operation.
Done flag set to 1, then the control block done the work and
ready for another block of data.
IE is set to 1, it causes the controller to raise an interrupt after
it has completed transferring.