The document describes the design of a 64-bit error tolerant adder. The adder is divided into an accurate part and an inaccurate part to reduce power consumption and improve speed. The accurate part uses a 24-bit ripple carry adder constructed from 8-transistor full adders. The inaccurate part uses 40 modified XOR gates in a carry-free structure along with a control block to generate control signals. Simulation results show the proposed design has lower power consumption than conventional adders while maintaining acceptable accuracy for applications that can tolerate some errors.
This document discusses the design of a 64-bit error tolerant adder. It begins with an introduction to error tolerant adders and describes dividing the adder into an accurate part and inaccurate part. It then discusses the design of the accurate part using an 8-transistor ripple carry adder and the design of the inaccurate part using a carry-free addition block and control block. It also describes a 3-transistor XOR gate design and compares the power consumption of adders. The implementation of the 64-bit error tolerant adder is shown using Tanner EDA tool, including the waveform results. In summary, the document presents the circuit design and simulation results of a 64-bit low power error tolerant
This document proposes an error tolerant adder (ETA) that can provide approximate results at a higher speed than conventional adders. The ETA consists of an accurate part built with a ripple carry adder and an inaccurate part containing a carry-free addition block and control block. The inaccurate part determines the speed, power, and accuracy of the ETA. The ETA was designed, simulated, and synthesized, showing improvements in delay, power, and area at the cost of accuracy. Potential applications of the ETA include signal and image processing where exact results are not required.
Dc motor speed control with the presence of input disturbance using neural ne...Mustefa Jibril
This document describes controlling the speed of a DC motor using neural network-based model reference and predictive controllers. The controllers are tested with and without input torque disturbances. The DC motor model, controller designs, simulation setup, and results are presented. The key findings are:
1. The DC motor with the model reference controller shows that the actual speed matches the desired speed better than the predictive controller, both with and without disturbances.
2. With no input disturbances, both controllers perform well at tracking random and sinusoidal speed profiles.
3. With input disturbances, the model reference controller continues tracking the profiles well while the predictive controller performance degrades more.
4. The model reference controller demonstrates better performance and
Comparisons of fuzzy mras and pid controllers for ems maglev trainMustefa Jibril
This document compares the performance of fuzzy logic, PID, and MRAS controllers for controlling an electromagnetic suspension (EMS) system on a maglev train. It presents the mathematical models for the maglev train system and controller designs. Simulation results show that the MRAS controller has the shortest settling time and rise time, while the PID controller has the lowest percentage overshoot. The controllers are able to maintain stability of the train and track changes in the air gap over time. The fuzzy logic controller provides effective control but with longer settling and rise times than the MRAS controller.
Design & characterization of high speed power efficient cmos comparatorIAEME Publication
In this paper authors have design the High Speed Power Efficient CMOS Voltage
Comparator which can be realized in A/D Converters. The simulation is carried out in 130nm
and 90nm technologies. The supply voltage for this comparator is 1v and 0.9v for 130nm and
90nm respectively. The Characterization of comparator is done in terms of offset, ICMR,
propagation delay, power dissipation in both the technologies and the result has been
compared for both the technologies. The simulation results shows that the speed of 1.92GHz
and 2.44GHz with the power dissipation of 9.19µW and 7.45µW was achieved in 130nm and
90nm technologies respectively.
Hopfield neural network based selective harmonic elimination for h bridgeIAEME Publication
This document summarizes a research paper that proposes using a Hopfield neural network to generate switching angles for selective harmonic elimination (SHE) in an H-bridge inverter. The paper first describes the conventional Newton-Raphson method for calculating switching angles to eliminate specific harmonics. It then introduces using a Hopfield neural network as an alternative method that has advantages like faster response time and ability to dynamically adjust the switching angles. The paper outlines the Hopfield neural network algorithm and compares simulation results between the two methods, showing the neural network approach produces switching angles that achieve similar harmonic elimination as the conventional method.
Two innovative high-speed low power parallel 8-bit counter architectures are proposed. Then, High speed 8-bit frequency divider circuits using the proposed architectures are realized. The proposed parallel counter architectures consist of two sections – The Counting Path and the State Excitation Module. The counting path consists of three counting modules in which the first module (basic module) generates future states for the two remaining counting modules. The State Excitation Module decodes the count states of the basic module and carries this decoding over clock cycles through pipelined DFF to trigger the subsequent counting modules. The existing 8-bit parallel counter architecture [1] consumed a total transistor count of 442 whereas the proposed parallel counters consumed only 274 transistors. The power dissipation of the existing parallel counter architecture and the proposed parallel counter architecture were 4.21mW (PINT) and 3.60mW (PINT) respectively at 250MHz. The worst case delay observed for the 8-bit counter using existing parallel counter architecture [1] and the proposed parallel counter architectures were 7.481ns, 6.737ns and 6.677ns respectively using Altera Quartus II. A reduction in area (transistor count) by 27.45% and a reduction in power dissipation by 16.28% are achieved for the frequency dividers using proposed counter architectures. Also a reduction in delay by 10.75% and 7.62% is achieved for the 8-bit frequency divider circuits using proposed counter methods I & II respectively.
IRJET- Fuzzy Logic based Fault Detection in Induction Machines using CloudIRJET Journal
This document presents a system for online condition monitoring of induction motors using fuzzy logic and cloud computing. It involves two phases:
1) Developing a simulation model in MATLAB/Simulink to monitor motor parameters and detect faults.
2) Implementing an online condition monitoring system using a Raspberry Pi, sensors to measure motor vibrations, temperature etc., and a cloud platform to remotely store and access data in real-time.
Fuzzy logic is used to analyze sensor data and detect faults based on defined rules and membership functions. The system aims to monitor key parameters of induction motors and identify failures to enable safe and efficient operation in industrial applications.
This document discusses the design of a 64-bit error tolerant adder. It begins with an introduction to error tolerant adders and describes dividing the adder into an accurate part and inaccurate part. It then discusses the design of the accurate part using an 8-transistor ripple carry adder and the design of the inaccurate part using a carry-free addition block and control block. It also describes a 3-transistor XOR gate design and compares the power consumption of adders. The implementation of the 64-bit error tolerant adder is shown using Tanner EDA tool, including the waveform results. In summary, the document presents the circuit design and simulation results of a 64-bit low power error tolerant
This document proposes an error tolerant adder (ETA) that can provide approximate results at a higher speed than conventional adders. The ETA consists of an accurate part built with a ripple carry adder and an inaccurate part containing a carry-free addition block and control block. The inaccurate part determines the speed, power, and accuracy of the ETA. The ETA was designed, simulated, and synthesized, showing improvements in delay, power, and area at the cost of accuracy. Potential applications of the ETA include signal and image processing where exact results are not required.
Dc motor speed control with the presence of input disturbance using neural ne...Mustefa Jibril
This document describes controlling the speed of a DC motor using neural network-based model reference and predictive controllers. The controllers are tested with and without input torque disturbances. The DC motor model, controller designs, simulation setup, and results are presented. The key findings are:
1. The DC motor with the model reference controller shows that the actual speed matches the desired speed better than the predictive controller, both with and without disturbances.
2. With no input disturbances, both controllers perform well at tracking random and sinusoidal speed profiles.
3. With input disturbances, the model reference controller continues tracking the profiles well while the predictive controller performance degrades more.
4. The model reference controller demonstrates better performance and
Comparisons of fuzzy mras and pid controllers for ems maglev trainMustefa Jibril
This document compares the performance of fuzzy logic, PID, and MRAS controllers for controlling an electromagnetic suspension (EMS) system on a maglev train. It presents the mathematical models for the maglev train system and controller designs. Simulation results show that the MRAS controller has the shortest settling time and rise time, while the PID controller has the lowest percentage overshoot. The controllers are able to maintain stability of the train and track changes in the air gap over time. The fuzzy logic controller provides effective control but with longer settling and rise times than the MRAS controller.
Design & characterization of high speed power efficient cmos comparatorIAEME Publication
In this paper authors have design the High Speed Power Efficient CMOS Voltage
Comparator which can be realized in A/D Converters. The simulation is carried out in 130nm
and 90nm technologies. The supply voltage for this comparator is 1v and 0.9v for 130nm and
90nm respectively. The Characterization of comparator is done in terms of offset, ICMR,
propagation delay, power dissipation in both the technologies and the result has been
compared for both the technologies. The simulation results shows that the speed of 1.92GHz
and 2.44GHz with the power dissipation of 9.19µW and 7.45µW was achieved in 130nm and
90nm technologies respectively.
Hopfield neural network based selective harmonic elimination for h bridgeIAEME Publication
This document summarizes a research paper that proposes using a Hopfield neural network to generate switching angles for selective harmonic elimination (SHE) in an H-bridge inverter. The paper first describes the conventional Newton-Raphson method for calculating switching angles to eliminate specific harmonics. It then introduces using a Hopfield neural network as an alternative method that has advantages like faster response time and ability to dynamically adjust the switching angles. The paper outlines the Hopfield neural network algorithm and compares simulation results between the two methods, showing the neural network approach produces switching angles that achieve similar harmonic elimination as the conventional method.
Two innovative high-speed low power parallel 8-bit counter architectures are proposed. Then, High speed 8-bit frequency divider circuits using the proposed architectures are realized. The proposed parallel counter architectures consist of two sections – The Counting Path and the State Excitation Module. The counting path consists of three counting modules in which the first module (basic module) generates future states for the two remaining counting modules. The State Excitation Module decodes the count states of the basic module and carries this decoding over clock cycles through pipelined DFF to trigger the subsequent counting modules. The existing 8-bit parallel counter architecture [1] consumed a total transistor count of 442 whereas the proposed parallel counters consumed only 274 transistors. The power dissipation of the existing parallel counter architecture and the proposed parallel counter architecture were 4.21mW (PINT) and 3.60mW (PINT) respectively at 250MHz. The worst case delay observed for the 8-bit counter using existing parallel counter architecture [1] and the proposed parallel counter architectures were 7.481ns, 6.737ns and 6.677ns respectively using Altera Quartus II. A reduction in area (transistor count) by 27.45% and a reduction in power dissipation by 16.28% are achieved for the frequency dividers using proposed counter architectures. Also a reduction in delay by 10.75% and 7.62% is achieved for the 8-bit frequency divider circuits using proposed counter methods I & II respectively.
IRJET- Fuzzy Logic based Fault Detection in Induction Machines using CloudIRJET Journal
This document presents a system for online condition monitoring of induction motors using fuzzy logic and cloud computing. It involves two phases:
1) Developing a simulation model in MATLAB/Simulink to monitor motor parameters and detect faults.
2) Implementing an online condition monitoring system using a Raspberry Pi, sensors to measure motor vibrations, temperature etc., and a cloud platform to remotely store and access data in real-time.
Fuzzy logic is used to analyze sensor data and detect faults based on defined rules and membership functions. The system aims to monitor key parameters of induction motors and identify failures to enable safe and efficient operation in industrial applications.
Modeling & simulation of grid connected photovoltaic systemIAEME Publication
This document discusses modeling and simulation of a grid-connected photovoltaic system incorporating insolation and temperature variation. It summarizes:
1) The photovoltaic module is modeled based on a single diode equivalent circuit model and simulated in MATLAB/Simulink.
2) A boost converter is used to increase the voltage from the PV module to a level that can be fed to the grid.
3) An inverter converts the DC output to AC voltage at 220V and 50Hz frequency matching the grid requirements.
4) The complete system model in MATLAB/Simulink shows the voltage output meets grid specifications.
Simulation of photovoltaic system connected with full bridge inverter using m...eSAT Journals
Abstract
When sunlight shines on a PV cell, the absorbed light produces electricity. Though PV technologies use both direct and dispersed
sunlight to create electricity, harnessing efficiency is 68% eventually against the claim of 85% by the various manufacturers
worldwide. Power Electronics Interface are incorporated with Photovoltaic (PV) System to intensify the efficiency of the PV
system and undoubtedly we have reached to the goalmouth. There are two stages where power electronics converter are used.
First DC-DC converter stage in which lower level PV voltage is boosted-up at the required higher level; and second DC-AC
inverter stage in which increased DC link voltage is efficiently converted into AC. Purpose of this paper is to elaborate the Full-
Bridge inverter used in PV System and switching schemes adopted for the operation and to realize the best switching scheme.
Simulation results are taken at various stages to visualize the effect of interface. For whole PV system simulation, PV module is
connected to the converter system. The output of the Buck Boost converter is connected to the single-phase inverter and the
inverter output is fed to the AC grid.
Key Words: H- Bridge Inverter, Switching Scheme, PV module, Converter, Simulink block-sets.
IRJET - High Speed Approximation Error Tolerance Adders for Image Processing ...IRJET Journal
This document proposes and evaluates a significance approximation error tolerant carry select adder (SAET-CSLA) for image processing applications. The SAET-CSLA improves on existing error tolerant adders by using static segmentation and accuracy adjustment logic to divide the adder into an accurate upper part and inaccurate lower part. Simulation results show the SAET-CSLA offers improvements in speed, power and area over conventional ripple carry, carry lookahead and carry select adders while maintaining over 99.9% accuracy. The document concludes the SAET-CSLA is well-suited for applications like image blending that require fast, low-power addition with minimal error.
Efficient speed governor for blower motoreSAT Journals
Abstract This paper presents an efficient speed governor for the blower motor used in the air conditioning of electric vehicles (EV). Performance optimization of blowers offers tremendous potential for energy saving and hence the running cost. Pulse width modulation (PWM) technique is one of the most economical and widely used techniques in the motor control applications. SG 3525 device is used to generate the required PWM signals for the regulation of the blower motor speed. The PWM signal with 0-100% duty ratio control governs the semiconductor switches such as MOSFETs in controlling the supply voltage to the motor. The proposed control scheme governs the speed by varying the reference voltage to the SG 3525 and also protects the motor from high current as the scheme monitors the current flow through the motor indirectly via gate control signal of the semiconductor switches. Keywords: Pulse width modulation (PWM), Blower, Electric Vehicle (EV), SG 3525, MOSFET, Duty ratio.
Design and simulation of radio frequencyeSAT Journals
Abstract
Present day guided weapon systems, especially tactical class missiles use RF seeker, for target tracking towards terminal engagement. The seeker system including its antenna assembly will be onboard the missile. Due to the missile trajectory corrections, the seeker antenna pointing to the target may get disturbed resulting in track loss. To avoid this track loss, it becomes necessary to stabilize the antenna system in two planes. The fundamental role of stabilization loop in seeker application is to precisely follow the angular rate of the target. In order to achieve this requirement, it is essential to highly isolate the gimbaled antenna from the missile body motion due to the maneuvering of target or low frequency vibration during flight. However, the isolation ratio and stability margin of stabilization loop adopting the gimbaled platform with both low stiffness and heavy inertia are limited by mechanical characteristic such as low resonance frequency and its high magnitude. The selection of proper feedback sensors, modeling of the total system are key features of this project. In the end, the performance and the stability of designed stabilization loop are demonstrated using simulation in both frequency and time domain. The Hardware for the system is under realization by the Industry. The whole scheme is simulated in MATLAB off-line for this project.
Keywords: Missile, RF seeker, Track loss, Stabilization loop, Angular Rate Command, Bore-Sight Error, Maneuvering and Gimbaled Platform.
The document describes the design of a 2-bit magnitude comparator using different logic styles. It presents the logic diagram and truth table of a 2-bit magnitude comparator. It then discusses the design of the comparator using CMOS logic style and Transmission Gate (TG) logic style. Simulation results of power consumption, delay time, and power-delay product for both designs at varying supply voltages from 0.6V to 1.4V are presented. The CMOS design has higher power dissipation but provides full output voltage swing, while the TG design uses fewer transistors but the control signal requires both true and complementary forms.
Design and Implementation of an Electrical Lift Controlled using PLC IJECEIAES
This paper represents the possibility of controlling an electrical elevator model using PLC and studying some parameters to ensure its work, this model have been designed and constructed to perform a completed elevator work in an automating technique according to its programming and controlling method that making the connecting much more easier and safer than real relays and complicated wiring method. As well as the small DC motor drive (gear box) electrical motor that used to drive the elevator cabinet which made the transition from floor to floor much smoother and much efficient than the traditional elevators.
Cost and performance optimization of induction motor using geneticIAEME Publication
This document describes research on optimizing the design of induction motors using genetic algorithms. It presents three optimal motor designs that were compared to a classically designed motor with the same ratings. The genetic algorithm optimization considered three objective functions: efficiency, torque, and cost. Key design variables like stator and rotor dimensions were selected as variables to be optimized. Performance constraints like efficiency, power factor, and current densities were also defined. The optimal designs found by the genetic algorithm were intended to improve performance while reducing costs compared to the classical design approach.
Fuzzy Controller for Speed Control of BLDC motor using MATLABIRJET Journal
This document presents a fuzzy logic controller for speed control of a brushless DC motor (BLDC) using MATLAB/Simulink. It begins with an introduction to BLDC motors and their modeling. It then describes the MATLAB/Simulink model developed including electrical equations, mechanical equations, inverter model, and fuzzy inference system. Simulation results are shown for the motor speed at different reference speeds and load torques. The fuzzy logic controller is found to provide better speed control performance compared to PI controllers. The document concludes that adding current control could further improve the motor's performance.
This document summarizes a research paper that presents a digital speed control system for a permanent magnet brushless DC motor using a TMS320LF2407 digital signal processor (DSP) controller. The paper describes modeling the brushless DC motor in MATLAB/Simulink using classical modeling equations. A digital PI controller is implemented for closed-loop speed control. The DSP controller generates PWM pulses based on the control algorithm to drive a three-phase inverter that provides power to the motor. Hardware implementation on the TMS320LF2407 DSP controller is also discussed.
Design and implementation of antenna control servo system for satellite grouIAEME Publication
This document summarizes the design and implementation of an antenna control servo system for a satellite ground station. It describes the modeling and analysis of the system both theoretically and experimentally. Key aspects include designing the drive control system for the antenna, integrating drive chains for elevation and azimuth axes, optimizing the system through mathematical modeling and simulation, and testing the operational system by tracking real satellite passes. Both simulation and experimental results showed the system providing stable and accurate antenna positioning to receive satellite data as required.
IRJET - Flyback Converter based BLDC Motor Drives for Power Device ApplicationsIRJET Journal
This document discusses a brushless DC (BLDC) motor drive system using a flyback converter and fuzzy logic controller. BLDC motors have advantages over brushed DC motors like higher efficiency, higher power density, and less maintenance. A literature review covers different sensorless control methods for BLDC motors. A MATLAB/Simulink model is developed for a BLDC motor using a fuzzy logic speed controller. Simulation results show the motor speed is controlled to within 5 rpm of the reference speed using this method. The fuzzy logic controller provides better performance than traditional PID control. In conclusion, fuzzy logic control is effective for BLDC motor drives and this method can be implemented at low cost.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
This document describes modeling, simulation, and implementation of speed control for a DC motor using a PIC16F877A microcontroller. It includes:
1) Developing mathematical models for the DC motor based on torque equations and transfer functions.
2) Creating a Simulink model to simulate the motor's step and impulse responses.
3) Designing a hardware system using the PIC16F877A microcontroller to generate PWM signals to control the motor speed, along with other components like a driver circuit and optical encoder.
4) Implementing the control system and presenting results of experimental speed control at different setpoints.
Dynamic Simulation of Induction Motor Drive using Neuro Controlleridescitation
Induction Motors are widely used in Industries, because of the low maintenance
and robustness. Speed Control of Induction motor can be obtained by maximum torque and
efficiency. Apart from other techniques Artificial Intelligence (AI) techniques, particularly
the neural networks, improves the performance & operation of induction motor drives. This
paper presents dynamic simulation of induction motor drive using neuro controller. The
integrated environment allows users to compare simulation results between conventional,
Fuzzy and Neural Network controller (NNW).The performance of fuzzy logic and artificial
neural network based controller's are compared with that of the conventional proportional
integral controller. The dynamic Modeling and Simulation of Induction motor is done using
MATLAB/SIMULINK and the dynamic performance of induction motor drive has been
analyzed for artificial intelligent controller.
A study to explore scope of direct to consumer advertisement dtcaIAEME Publication
This document summarizes a research study on exploring the scope of direct-to-consumer advertising (DTCA) of prescription drugs in India. The study collected data through questionnaires from 50 customers, 50 marketing managers, and 50 doctors in Gujarat, India. The data was analyzed to understand perceptions of DTCA's impact on clinical issues, psycho-social issues, and the doctor-patient relationship. Marketers and doctors were skeptical DTCA could improve health outcomes, while customers believed it provided treatment information. Professionals agreed DTCA could empower patients but may also cause unnecessary fear. The study provides insight into Indian stakeholders' views on introducing DTCA for prescription drugs.
The document discusses using a genetic algorithm approach to optimize process parameters in laser beam welding of Inconel. Experiments were conducted varying pulse duration, pulse frequency, welding speed, and pulse energy. Response surface methodology was used to develop mathematical models relating the weld bead geometry (penetration, width, volume) to the process parameters. The models are then used with a genetic algorithm to optimize the total bead volume while keeping the other geometry parameters within constraints, in order to produce high quality welds efficiently. In summary, the proposed methodology enables determining optimal process settings for different production needs and potentially automating the welding process.
Job satisfaction in banking a study of private and public sector banksIAEME Publication
This study examines job satisfaction among employees in public and private sector banks in India. The document provides background on definitions of job satisfaction and factors that influence it. It outlines the study's objectives to measure and compare job satisfaction levels and contributing factors between public and private bank employees. The methodology section notes that surveys were conducted with 400 employees total across 6 banks to collect data on job satisfaction and its relationship to other variables. Prior literature found job satisfaction correlated with organizational commitment, justice perceptions, benefits offered, workforce size, and more.
Studies on geometrical featured metallic shell structures for inward inversionIAEME Publication
This document summarizes research on the inward inversion of metallic shell structures with various geometric features for energy absorption applications. Experiments were conducted using an Instron testing machine to apply loads and measure force-displacement responses for aluminum shell samples with different shapes, wall thicknesses, steps, and curvatures. Finite element simulations of the inversion process matched well with experimental force-displacement graphs and stress distributions. Key findings include frusta with 6-7 degree angles absorbed the most energy, while steps and uneven curvatures reduced energy absorption and caused unstable force responses. Thicker shells and straighter top portions also improved energy absorption performance during inversion.
Quality factor of seismic coda waves in garhwal himalayas 2IAEME Publication
This document analyzes seismic coda wave attenuation in the Garhwal Himalayan region using data from 75 earthquakes recorded between 2004-2006. Coda quality factor (QC) values were estimated at different frequencies using a lapse time of 50 seconds and four coda window lengths. QC was found to fit a power law relationship with frequency, with exponents ranging from 0.967 to 1.016. Lower QC values at lower frequencies indicate higher attenuation, while higher QC values at higher frequencies indicate lower attenuation, suggesting heterogeneity decreases with depth in the study region.
Face recognition across pose with estimation of pose parametersIAEME Publication
This document summarizes research on face recognition across pose using the eigenface and fisherface approaches. It compares the two methods on databases with different amounts of training data and levels of pose variation. Fisherface is shown to outperform eigenface when training data is sparse across pose. The work also presents a method to estimate face pose parameters using a patch-based representation, achieving promising results on uncontrolled images.
Modeling & simulation of grid connected photovoltaic systemIAEME Publication
This document discusses modeling and simulation of a grid-connected photovoltaic system incorporating insolation and temperature variation. It summarizes:
1) The photovoltaic module is modeled based on a single diode equivalent circuit model and simulated in MATLAB/Simulink.
2) A boost converter is used to increase the voltage from the PV module to a level that can be fed to the grid.
3) An inverter converts the DC output to AC voltage at 220V and 50Hz frequency matching the grid requirements.
4) The complete system model in MATLAB/Simulink shows the voltage output meets grid specifications.
Simulation of photovoltaic system connected with full bridge inverter using m...eSAT Journals
Abstract
When sunlight shines on a PV cell, the absorbed light produces electricity. Though PV technologies use both direct and dispersed
sunlight to create electricity, harnessing efficiency is 68% eventually against the claim of 85% by the various manufacturers
worldwide. Power Electronics Interface are incorporated with Photovoltaic (PV) System to intensify the efficiency of the PV
system and undoubtedly we have reached to the goalmouth. There are two stages where power electronics converter are used.
First DC-DC converter stage in which lower level PV voltage is boosted-up at the required higher level; and second DC-AC
inverter stage in which increased DC link voltage is efficiently converted into AC. Purpose of this paper is to elaborate the Full-
Bridge inverter used in PV System and switching schemes adopted for the operation and to realize the best switching scheme.
Simulation results are taken at various stages to visualize the effect of interface. For whole PV system simulation, PV module is
connected to the converter system. The output of the Buck Boost converter is connected to the single-phase inverter and the
inverter output is fed to the AC grid.
Key Words: H- Bridge Inverter, Switching Scheme, PV module, Converter, Simulink block-sets.
IRJET - High Speed Approximation Error Tolerance Adders for Image Processing ...IRJET Journal
This document proposes and evaluates a significance approximation error tolerant carry select adder (SAET-CSLA) for image processing applications. The SAET-CSLA improves on existing error tolerant adders by using static segmentation and accuracy adjustment logic to divide the adder into an accurate upper part and inaccurate lower part. Simulation results show the SAET-CSLA offers improvements in speed, power and area over conventional ripple carry, carry lookahead and carry select adders while maintaining over 99.9% accuracy. The document concludes the SAET-CSLA is well-suited for applications like image blending that require fast, low-power addition with minimal error.
Efficient speed governor for blower motoreSAT Journals
Abstract This paper presents an efficient speed governor for the blower motor used in the air conditioning of electric vehicles (EV). Performance optimization of blowers offers tremendous potential for energy saving and hence the running cost. Pulse width modulation (PWM) technique is one of the most economical and widely used techniques in the motor control applications. SG 3525 device is used to generate the required PWM signals for the regulation of the blower motor speed. The PWM signal with 0-100% duty ratio control governs the semiconductor switches such as MOSFETs in controlling the supply voltage to the motor. The proposed control scheme governs the speed by varying the reference voltage to the SG 3525 and also protects the motor from high current as the scheme monitors the current flow through the motor indirectly via gate control signal of the semiconductor switches. Keywords: Pulse width modulation (PWM), Blower, Electric Vehicle (EV), SG 3525, MOSFET, Duty ratio.
Design and simulation of radio frequencyeSAT Journals
Abstract
Present day guided weapon systems, especially tactical class missiles use RF seeker, for target tracking towards terminal engagement. The seeker system including its antenna assembly will be onboard the missile. Due to the missile trajectory corrections, the seeker antenna pointing to the target may get disturbed resulting in track loss. To avoid this track loss, it becomes necessary to stabilize the antenna system in two planes. The fundamental role of stabilization loop in seeker application is to precisely follow the angular rate of the target. In order to achieve this requirement, it is essential to highly isolate the gimbaled antenna from the missile body motion due to the maneuvering of target or low frequency vibration during flight. However, the isolation ratio and stability margin of stabilization loop adopting the gimbaled platform with both low stiffness and heavy inertia are limited by mechanical characteristic such as low resonance frequency and its high magnitude. The selection of proper feedback sensors, modeling of the total system are key features of this project. In the end, the performance and the stability of designed stabilization loop are demonstrated using simulation in both frequency and time domain. The Hardware for the system is under realization by the Industry. The whole scheme is simulated in MATLAB off-line for this project.
Keywords: Missile, RF seeker, Track loss, Stabilization loop, Angular Rate Command, Bore-Sight Error, Maneuvering and Gimbaled Platform.
The document describes the design of a 2-bit magnitude comparator using different logic styles. It presents the logic diagram and truth table of a 2-bit magnitude comparator. It then discusses the design of the comparator using CMOS logic style and Transmission Gate (TG) logic style. Simulation results of power consumption, delay time, and power-delay product for both designs at varying supply voltages from 0.6V to 1.4V are presented. The CMOS design has higher power dissipation but provides full output voltage swing, while the TG design uses fewer transistors but the control signal requires both true and complementary forms.
Design and Implementation of an Electrical Lift Controlled using PLC IJECEIAES
This paper represents the possibility of controlling an electrical elevator model using PLC and studying some parameters to ensure its work, this model have been designed and constructed to perform a completed elevator work in an automating technique according to its programming and controlling method that making the connecting much more easier and safer than real relays and complicated wiring method. As well as the small DC motor drive (gear box) electrical motor that used to drive the elevator cabinet which made the transition from floor to floor much smoother and much efficient than the traditional elevators.
Cost and performance optimization of induction motor using geneticIAEME Publication
This document describes research on optimizing the design of induction motors using genetic algorithms. It presents three optimal motor designs that were compared to a classically designed motor with the same ratings. The genetic algorithm optimization considered three objective functions: efficiency, torque, and cost. Key design variables like stator and rotor dimensions were selected as variables to be optimized. Performance constraints like efficiency, power factor, and current densities were also defined. The optimal designs found by the genetic algorithm were intended to improve performance while reducing costs compared to the classical design approach.
Fuzzy Controller for Speed Control of BLDC motor using MATLABIRJET Journal
This document presents a fuzzy logic controller for speed control of a brushless DC motor (BLDC) using MATLAB/Simulink. It begins with an introduction to BLDC motors and their modeling. It then describes the MATLAB/Simulink model developed including electrical equations, mechanical equations, inverter model, and fuzzy inference system. Simulation results are shown for the motor speed at different reference speeds and load torques. The fuzzy logic controller is found to provide better speed control performance compared to PI controllers. The document concludes that adding current control could further improve the motor's performance.
This document summarizes a research paper that presents a digital speed control system for a permanent magnet brushless DC motor using a TMS320LF2407 digital signal processor (DSP) controller. The paper describes modeling the brushless DC motor in MATLAB/Simulink using classical modeling equations. A digital PI controller is implemented for closed-loop speed control. The DSP controller generates PWM pulses based on the control algorithm to drive a three-phase inverter that provides power to the motor. Hardware implementation on the TMS320LF2407 DSP controller is also discussed.
Design and implementation of antenna control servo system for satellite grouIAEME Publication
This document summarizes the design and implementation of an antenna control servo system for a satellite ground station. It describes the modeling and analysis of the system both theoretically and experimentally. Key aspects include designing the drive control system for the antenna, integrating drive chains for elevation and azimuth axes, optimizing the system through mathematical modeling and simulation, and testing the operational system by tracking real satellite passes. Both simulation and experimental results showed the system providing stable and accurate antenna positioning to receive satellite data as required.
IRJET - Flyback Converter based BLDC Motor Drives for Power Device ApplicationsIRJET Journal
This document discusses a brushless DC (BLDC) motor drive system using a flyback converter and fuzzy logic controller. BLDC motors have advantages over brushed DC motors like higher efficiency, higher power density, and less maintenance. A literature review covers different sensorless control methods for BLDC motors. A MATLAB/Simulink model is developed for a BLDC motor using a fuzzy logic speed controller. Simulation results show the motor speed is controlled to within 5 rpm of the reference speed using this method. The fuzzy logic controller provides better performance than traditional PID control. In conclusion, fuzzy logic control is effective for BLDC motor drives and this method can be implemented at low cost.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
This document describes modeling, simulation, and implementation of speed control for a DC motor using a PIC16F877A microcontroller. It includes:
1) Developing mathematical models for the DC motor based on torque equations and transfer functions.
2) Creating a Simulink model to simulate the motor's step and impulse responses.
3) Designing a hardware system using the PIC16F877A microcontroller to generate PWM signals to control the motor speed, along with other components like a driver circuit and optical encoder.
4) Implementing the control system and presenting results of experimental speed control at different setpoints.
Dynamic Simulation of Induction Motor Drive using Neuro Controlleridescitation
Induction Motors are widely used in Industries, because of the low maintenance
and robustness. Speed Control of Induction motor can be obtained by maximum torque and
efficiency. Apart from other techniques Artificial Intelligence (AI) techniques, particularly
the neural networks, improves the performance & operation of induction motor drives. This
paper presents dynamic simulation of induction motor drive using neuro controller. The
integrated environment allows users to compare simulation results between conventional,
Fuzzy and Neural Network controller (NNW).The performance of fuzzy logic and artificial
neural network based controller's are compared with that of the conventional proportional
integral controller. The dynamic Modeling and Simulation of Induction motor is done using
MATLAB/SIMULINK and the dynamic performance of induction motor drive has been
analyzed for artificial intelligent controller.
A study to explore scope of direct to consumer advertisement dtcaIAEME Publication
This document summarizes a research study on exploring the scope of direct-to-consumer advertising (DTCA) of prescription drugs in India. The study collected data through questionnaires from 50 customers, 50 marketing managers, and 50 doctors in Gujarat, India. The data was analyzed to understand perceptions of DTCA's impact on clinical issues, psycho-social issues, and the doctor-patient relationship. Marketers and doctors were skeptical DTCA could improve health outcomes, while customers believed it provided treatment information. Professionals agreed DTCA could empower patients but may also cause unnecessary fear. The study provides insight into Indian stakeholders' views on introducing DTCA for prescription drugs.
The document discusses using a genetic algorithm approach to optimize process parameters in laser beam welding of Inconel. Experiments were conducted varying pulse duration, pulse frequency, welding speed, and pulse energy. Response surface methodology was used to develop mathematical models relating the weld bead geometry (penetration, width, volume) to the process parameters. The models are then used with a genetic algorithm to optimize the total bead volume while keeping the other geometry parameters within constraints, in order to produce high quality welds efficiently. In summary, the proposed methodology enables determining optimal process settings for different production needs and potentially automating the welding process.
Job satisfaction in banking a study of private and public sector banksIAEME Publication
This study examines job satisfaction among employees in public and private sector banks in India. The document provides background on definitions of job satisfaction and factors that influence it. It outlines the study's objectives to measure and compare job satisfaction levels and contributing factors between public and private bank employees. The methodology section notes that surveys were conducted with 400 employees total across 6 banks to collect data on job satisfaction and its relationship to other variables. Prior literature found job satisfaction correlated with organizational commitment, justice perceptions, benefits offered, workforce size, and more.
Studies on geometrical featured metallic shell structures for inward inversionIAEME Publication
This document summarizes research on the inward inversion of metallic shell structures with various geometric features for energy absorption applications. Experiments were conducted using an Instron testing machine to apply loads and measure force-displacement responses for aluminum shell samples with different shapes, wall thicknesses, steps, and curvatures. Finite element simulations of the inversion process matched well with experimental force-displacement graphs and stress distributions. Key findings include frusta with 6-7 degree angles absorbed the most energy, while steps and uneven curvatures reduced energy absorption and caused unstable force responses. Thicker shells and straighter top portions also improved energy absorption performance during inversion.
Quality factor of seismic coda waves in garhwal himalayas 2IAEME Publication
This document analyzes seismic coda wave attenuation in the Garhwal Himalayan region using data from 75 earthquakes recorded between 2004-2006. Coda quality factor (QC) values were estimated at different frequencies using a lapse time of 50 seconds and four coda window lengths. QC was found to fit a power law relationship with frequency, with exponents ranging from 0.967 to 1.016. Lower QC values at lower frequencies indicate higher attenuation, while higher QC values at higher frequencies indicate lower attenuation, suggesting heterogeneity decreases with depth in the study region.
Face recognition across pose with estimation of pose parametersIAEME Publication
This document summarizes research on face recognition across pose using the eigenface and fisherface approaches. It compares the two methods on databases with different amounts of training data and levels of pose variation. Fisherface is shown to outperform eigenface when training data is sparse across pose. The work also presents a method to estimate face pose parameters using a patch-based representation, achieving promising results on uncontrolled images.
New innovation of magnetic scales used in digital height masters and digital ...IAEME Publication
1) Magnetic scales are increasingly being used in digital readouts and height masters instead of glass or metal scales due to advantages like higher accuracy even in dirty environments.
2) Magnetic scales work by magnetizing a plastic-coated steel strip with alternating magnetic poles that are detected by a reader head for displacement measurements.
3) The reader head houses electronic sensors and circuitry to convert the changing magnetic field into output signals for determining distance, and it is designed to operate reliably even in conditions with vibrations, dirt or coolant present.
Challenges of managing mnc expatriates through crises a studyIAEME Publication
This document summarizes a study on the challenges of managing expatriate employees during crises. It discusses literature on expatriate selection, preparation, and repatriation. It then describes the methodology of interviewing 15 HR managers in India. Key findings from the interviews are summarized in three sections: expatriate selection process, preparation training, and repatriation process. The conclusion states that planning repatriation from the start of expatriation can help organizations better manage human resources globally and encourage employees to accept foreign assignments.
The document discusses using an Elman artificial neural network (ENN) to classify the degree of mitral valve stenosis in ultrasound images. The ENN is trained on M-mode echocardiography images labeled as mild, moderate, or severe stenosis. Kernel principal component analysis is used to extract features from the images by reducing the pixel dimensions. The ENN architecture includes input, hidden, connecting, and output layers to classify new images based on the training. The algorithm updates the weights between layers using error backpropagation. The goal is an automated system that can diagnose mitral valve stenosis from echocardiograms.
Codec Scheme for Power Optimization in VLSI InterconnectsIJEEE
This document summarizes a research paper that presents a codec scheme to optimize power in VLSI interconnects using bus encoding. The scheme detects different types of crosstalk couplings between wires and encodes the data to reduce switching activity. It was implemented using Cadence tools in 0.18um technology. Simulation results found a maximum power of 6.44uW for an input combination, showing a 38.89% power reduction over previous work. The scheme models the full custom design approach instead of semi-custom.
Low Power Full Adder using 9T Structureidescitation
In this paper, we propose a new 9T 1-bit full adder.
The main objective is full output voltage swing, low power
consumption and temperature sustainability. The proposed
design is more reliable in terms of power consumption, Power
Delay Product (PDP) and temperature sustainability as
compared to the existing full adder designs. The design has
been implemented 45nm technology on Tanner EDA Tool
version 13.0. The simulation results demonstrate the power
consumption, delay and power delay product at different input
voltages ranging 0.4V to 1.4V.
Linearity enhancement of operational transconductance amplifier using sourceIAEME Publication
This paper proposes a source degeneration technique to improve the linearity of operational transconductance amplifiers (OTAs). OTAs are commonly used as building blocks in analog and mixed-signal integrated circuits, but their performance can be limited by inherent non-linearities in MOS transistors. The proposed source degenerated OTA (SDOTA) achieves improved third-order intermodulation distortion of -62dB compared to a conventional OTA, while maintaining a transconductance of 655.8 μA/V and gain of 14dB up to 4.7 GHz. The SDOTA is implemented in a 180nm CMOS process and shows enhanced linearity for applications requiring high frequency operation such as sigma-delta analog-to-digital
Design of area and power efficient half adder using transmission gateeSAT Journals
Abstract This paper gives an idea to reduce power and surface area of half adder circuit using very popular technique i.e. transmission gate. An adder is a digital circuit that performs addition of two numbers. In many computers and other kind of processors, adders are used not only in arithmetic logic unit but also in other parts of the processors where they are used to calculate addresses, table indices and similar operations .in this paper two bit addition has been done using conventional and transmission gate level and power, area and number of transistors are the scope of comparison. According to the simulation result, power and area are reduced by 55.35 % and 40.269% respectively when the circuit is implemented by transmission gate .thus transmission gate has become a very popular and useful technique to implement digital circuits which help to reduce power, surface area as well as number of transistors. Keywords: Transmission gate (TG), Half adder, CMOS logic gates, Surface area, Power.
Optimization of Threshold Voltage for 65nm PMOS Transistor using Silvaco TCAD...IOSR Journals
This document summarizes research optimizing the threshold voltage (VTH) for a 65nm PMOS transistor using Silvaco TCAD simulation tools. The researchers varied three fabrication factors - gate oxide thickness, channel doping concentration, and channel implantation concentration - in the simulation. The simulation results showed a VTH value of -2.55427V for a 65nm PMOS transistor with a gate oxide thickness of 0.0025um, boron channel doping of 2x1015, and phosphorus implantation of 3.5x1013 atom/cm-1. Thicker gate oxides, higher channel doping, and increased implantation concentrations each caused higher VTH values in the simulation, consistent with theoretical expectations.
This document describes a proposed distributed power factor correction system and an automated power factor correction system design using a microcontroller.
The proposed distributed system would install small power factor correction devices at the user level rather than just at substations. This would inject reactive power closer to the load to improve efficiency. The design uses an ATmega16 microcontroller to measure the phase angle between voltage and current using a zero crossing detector. It also measures the load current using an current sensor and ADC. Based on these measurements, it calculates the required capacitance and controls a capacitor bank to improve the power factor.
Comparisons of fuzzy mras and pid controllers for ems maglev trainMustefa Jibril
This document compares fuzzy, PID, and MRAS controllers for controlling the vertical position of an electromagnetic suspension (EMS) maglev train system. It presents the mathematical model of the maglev train and discusses the stability analysis. Fuzzy, PID, and MRAS controller designs are described. Simulation results show the output response of each controller to a step input and the train position over different time periods. The fuzzy controller provided the best performance based on rise time, settling time, and overshoot.
Fuzzy logic based direct torque control of induction motor with space vector ...ijscai
The induction motors have wide range of applications for due to its well-known advantages like brushless
structures, low costs and robust performances. Over the past years, many kind of control methods are
proposed for the induction motors and direct torque control has gained huge importance inside of them due
to fast dynamic torque responses and simple control structures. However, the direct torque control method
has still some handicaps against the other control methods and most of the important of these handicaps is
high torque ripple. This paper suggests a new approach, Fuzzy logic based space vector modulation, on
the direct torque controlled induction motors and aim of the approach is to overcome high torque ripple
disadvantages of conventional direct torque control. In order to test and compare the proposed direct
torque control method with conventional direct torque control method simulations, in Matlab/Simulink,
have been carried out in different working conditions. The simulation results showed that a significant
improvement in the dynamic torque and speed responses when compared to the conventional direct torque
control method.
Split set data weighted averaging – an efficient approach for removal of peri...IAEME Publication
This document discusses periodic noise in data converters that results from component mismatch when using the Data Weighted Averaging (DWA) dynamic element matching technique. DWA effectively reduces mismatch noise, but can generate unwanted periodic noise for slow or DC inputs. The document proposes a Split-Set Data Weighted Averaging (SDWA) technique that eliminates this inband noise while still providing mismatch noise shaping. SDWA partitions the unit elements into sets and averages within sets to remove tones while maintaining the benefits of DWA. Hardware implementation of SDWA has low latency and cost, making it suitable for high-speed applications.
Efficient implementation of full adder for power analysis in cmos technologyIJARIIT
In recent days, the real-time application and fast arithmetic operations require highly efficient arithmetic hardware
architecture to improve the system performances. The adder plays a vital role in digital circuits, the earlier hardware
architecture using conventional CMOS and transmission logic gate based full adder design. Moreover, the techniques using
more number of transistors and consume larger power and delay so we proposed the techniques pass-transistor logic and
transmission gate based hybrid pass logic. The hybrid technique is used to reduce the number of the transistor, so the delay
and power consumption will be reduced when compared with the earlier techniques. The proposed technique design was
implemented using 16 transistors in 180nm CMOS technology and it consumes 8.2075nW power and the delay reduced to
5.0146ns.
Fuzzy logic based direct torque control of induction motor with space vector ...ijscai
This document summarizes a research paper that proposes a new fuzzy logic based direct torque control (DTC) method for induction motors. The proposed method uses fuzzy logic to determine the optimal space vector for DTC with space vector modulation (SVM) to reduce torque ripple compared to conventional DTC. Simulations show the proposed fuzzy logic SVM-DTC method significantly reduces torque ripple and speed fluctuations at both low and rated speeds under different load conditions.
In this paper, we propose a new technique for implementing a low power high speed multiplier based on Sleepy Stack Technique and consisting of
minimum number of transistors. Multiplier circuits are used comprehensively in Application Specific Integrated Circuits (ASICs). An 4 bit x 4 bit
multiplier has also been implemented using the design of only using basic combinational circuits and its performance has been analyzed and
compared with similar multipliers designed with peer combinational design available in literature. The explored method of implementation achieves
a high speed low power design for the multiplier. Simulated results indicate the superior performance of the proposed technique over conventional
CMOS multiplier. Detailed comparison of simulated results for the conventional and present method of implementation is presented.
SPEED CONTROL OF INDUCTION MACHINE WITH REDUCTION IN TORQUE RIPPLE USING ROBU...IAEME Publication
In this paper a novel and simple algorithm for three-phase induction motor(IM) under Direct Torque Control (DTC) scheme using Classic DTC switching table for dynamic torque ripple reduction and space-vector modulation scheme for steady state torque and flux control is proposed. The proposed scheme having the advantages of low torque ripples as well as constant switching frequency.
Simulation results are given to prove the ability of the proposed method obtaining good speed control bandwidth while overcoming classic DTC and DTC-SVM drawbacks.
Addition is a fundamental arithmetic operation and acts as a building block for synthesizing of all other operations. A high-performance adder is one of the key components in the design of Application Specific Integrated Circuits (ASIC). In this work, three low power full adders are designed with full swing AND, OR and XOR gates to reduce threshold voltage problem which is commonly encountered in Gate Diffusion Input (GDI) logic. This problem usually does not allow the full adder circuits to operate without additional inverters. However, the three full adders are successfully realized using full swing gates with the significant improvement in their performance. The performance of the proposed design is simulated through SPICE simulations using 45 nm technology models.
LOW POWER-AREA DESIGNS OF 1BIT FULL ADDER IN CADENCE VIRTUOSO PLATFORMVLSICS Design
The document describes several proposed low-power, area-efficient 1-bit full adder designs implemented using Cadence Virtuoso. It summarizes previous work on full adder designs and introduces three new proposed designs: a 12-transistor design that generates the carry using GDI technique and sum using a 3T XOR module; a 10-transistor design that generates the carry using a pass transistor logic multiplexer; and an 8-transistor design that generates the carry using pass transistors. The designs aim to reduce power consumption by utilizing tri-state inverters and pass transistor logic. Simulation results on a 180nm process show up to 93.1% power savings compared to a conventional 28-trans
Designing a Novel High Performance Four-to-Two Compressor Cell Based on CNTFE...IJECEIAES
The document describes a novel four-to-two compressor cell designed using Carbon Nanotube Field Effect Transistor (CNTFET) technology. The proposed cell uses Majority Function, NOR, and NAND gates. Simulations show it has lower delay, power consumption, and power-delay product compared to previous designs. The main advantage is the CARRY output is easily obtained using a Majority function. The cell shows good performance across variations in voltage, frequency, temperature, and load compared to other state-of-the-art compressor cells.
Design of Low-Power High-Speed Truncation-Error-Tolerant Adder Sravankumar Samboju
The document proposes a novel error-tolerant adder (ETA) that can improve power consumption and speed over conventional adders by relaxing accuracy requirements. The ETA has two parts - an accurate part that uses a conventional adder, and an inaccurate part with a carry-free addition block and control block. The ETA was shown to outperform ripple carry adders, carry lookahead adders, carry select adders, and carry skip adders in terms of power and speed. Potential applications of the ETA include digital signal processing workloads where high accuracy is not required, such as image and speech processing on mobile devices.
Design & Simulation of Half Adder Circuit using AVL Technique Based on CMOS T...IRJET Journal
The document describes the design and simulation of a half adder circuit using an adaptive voltage level (AVL) technique based on 65nm CMOS technology. It summarizes that the AVL technique can significantly reduce the power consumption of half adder circuits compared to conventional CMOS and transmission gate-based designs. Specifically, simulation results show that an AVL design using an adaptive voltage level at the supply achieves the lowest power consumption of 0.321μW, fastest propagation delay of 0.54ns, and smallest power-delay product of 0.1734fJ compared to other techniques. The AVL supply technique provides the most efficient half adder design in terms of speed, area, power, and routing.
IRJET - High Speed Inexact Speculative Adder using Carry Look Ahead Adder...IRJET Journal
This document presents a novel architecture for a high-speed inexact speculative adder using carry lookahead adder and Brent Kung adder. The proposed adder splits the critical path into shorter paths using fine-grain pipelining to improve speed. It uses a carry lookahead adder and Brent Kung adder in 4-bit blocks to speculate the carry and calculate sums, with error compensation. The design is implemented using a 5-stage pipeline to further reduce delay. Implementation in MAGIC shows the proposed adder achieves higher speed through optimized pipelining of key components in the speculative and compensation blocks.
A high speed dynamic ripple carry addereSAT Journals
Abstract Adder, which is one of the basic building blocks of a processor affect the performance of the processor. There are many adder architectures each of them have their own advantage. Ripple Carry Adder (RCA) architecture occupies the minimum area among the other architectures with lesser power dissipation. RCA experiences more delay due to its carry propagation in critical path; apart from the delay it also experiences glitches. Constant delay (CD) logic solves both the delay problems and glitch related problems. CD logic, due to its pre-evaluated characteristics delivers high speed but due its bulkier nature it is used only in the critical path. In this paper two new techniques are presented which modifies the conventional timing block (requires ten transistors) in CD logic and two new timing blocks one with eight transistors and other with nine transistors are developed. The CD logic with the two new timing block is used in critical path of RCA to achieve higher speed performance with lesser area compared to conventional CD logic. The CD logic with 9-transistor timing block achieves 70% and 39% delay reduction compared to Static and Domino logics. It also achieves 21% and 5% reduction in power dissipation and delay. The 8-transistor version also achieves reduction of delay by 65% and 29% compared to Static and dynamic logic. The two versions of timing blocks have their own advantages where 9-transistor version provides high speed and 8- transistor version provides lesser power dissipation. Simulations are carried out in 130 nm at 1V power supply using mentor graphics tools. Key Words: Critical Path, Feed Through Logic, Constant Delay logic, Pre-evaluated logic, and Timing block.
Similar to Design of 64 bit error tolerant adder (20)
Submission Deadline: 30th September 2022
Acceptance Notification: Within Three Days’ time period
Online Publication: Within 24 Hrs. time Period
Expected Date of Dispatch of Printed Journal: 5th October 2022
MODELING AND ANALYSIS OF SURFACE ROUGHNESS AND WHITE LATER THICKNESS IN WIRE-...IAEME Publication
White layer thickness (WLT) formed and surface roughness in wire electric discharge turning (WEDT) of tungsten carbide composite has been made to model through response surface methodology (RSM). A Taguchi’s standard Design of experiments involving five input variables with three levels has been employed to establish a mathematical model between input parameters and responses. Percentage of cobalt content, spindle speed, Pulse on-time, wire feed and pulse off-time were changed during the experimental tests based on the Taguchi’s orthogonal array L27 (3^13). Analysis of variance (ANOVA) revealed that the mathematical models obtained can adequately describe performance within the parameters of the factors considered. There was a good agreement between the experimental and predicted values in this study.
A STUDY ON THE REASONS FOR TRANSGENDER TO BECOME ENTREPRENEURSIAEME Publication
The study explores the reasons for a transgender to become entrepreneurs. In this study transgender entrepreneur was taken as independent variable and reasons to become as dependent variable. Data were collected through a structured questionnaire containing a five point Likert Scale. The study examined the data of 30 transgender entrepreneurs in Salem Municipal Corporation of Tamil Nadu State, India. Simple Random sampling technique was used. Garrett Ranking Technique (Percentile Position, Mean Scores) was used as the analysis for the present study to identify the top 13 stimulus factors for establishment of trans entrepreneurial venture. Economic advancement of a nation is governed upon the upshot of a resolute entrepreneurial doings. The conception of entrepreneurship has stretched and materialized to the socially deflated uncharted sections of transgender community. Presently transgenders have smashed their stereotypes and are making recent headlines of achievements in various fields of our Indian society. The trans-community is gradually being observed in a new light and has been trying to achieve prospective growth in entrepreneurship. The findings of the research revealed that the optimistic changes are taking place to change affirmative societal outlook of the transgender for entrepreneurial ventureship. It also laid emphasis on other transgenders to renovate their traditional living. The paper also highlights that legislators, supervisory body should endorse an impartial canons and reforms in Tamil Nadu Transgender Welfare Board Association.
BROAD UNEXPOSED SKILLS OF TRANSGENDER ENTREPRENEURSIAEME Publication
Since ages gender difference is always a debatable theme whether caused by nature, evolution or environment. The birth of a transgender is dreadful not only for the child but also for their parents. The pain of living in the wrong physique and treated as second class victimized citizen is outrageous and fully harboured with vicious baseless negative scruples. For so long, social exclusion had perpetuated inequality and deprivation experiencing ingrained malign stigma and besieged victims of crime or violence across their life spans. They are pushed into the murky way of life with a source of eternal disgust, bereft sexual potency and perennial fear. Although they are highly visible but very little is known about them. The common public needs to comprehend the ravaged arrogance on these insensitive souls and assist in integrating them into the mainstream by offering equal opportunity, treat with humanity and respect their dignity. Entrepreneurship in the current age is endorsing the gender fairness movement. Unstable careers and economic inadequacy had inclined one of the gender variant people called Transgender to become entrepreneurs. These tiny budding entrepreneurs resulted in economic transition by means of employment, free from the clutches of stereotype jobs, raised standard of living and handful of financial empowerment. Besides all these inhibitions, they were able to witness a platform for skill set development that ignited them to enter into entrepreneurial domain. This paper epitomizes skill sets involved in trans-entrepreneurs of Thoothukudi Municipal Corporation of Tamil Nadu State and is a groundbreaking determination to sightsee various skills incorporated and the impact on entrepreneurship.
DETERMINANTS AFFECTING THE USER'S INTENTION TO USE MOBILE BANKING APPLICATIONSIAEME Publication
The banking and financial services industries are experiencing increased technology penetration. Among them, the banking industry has made technological advancements to better serve the general populace. The economy focused on transforming the banking sector's system into a cashless, paperless, and faceless one. The researcher wants to evaluate the user's intention for utilising a mobile banking application. The study also examines the variables affecting the user's behaviour intention when selecting specific applications for financial transactions. The researcher employed a well-structured questionnaire and a descriptive study methodology to gather the respondents' primary data utilising the snowball sampling technique. The study includes variables like performance expectations, effort expectations, social impact, enabling circumstances, and perceived risk. Each of the aforementioned variables has a major impact on how users utilise mobile banking applications. The outcome will assist the service provider in comprehending the user's history with mobile banking applications.
ANALYSE THE USER PREDILECTION ON GPAY AND PHONEPE FOR DIGITAL TRANSACTIONSIAEME Publication
Technology upgradation in banking sector took the economy to view that payment mode towards online transactions using mobile applications. This system enabled connectivity between banks, Merchant and user in a convenient mode. there are various applications used for online transactions such as Google pay, Paytm, freecharge, mobikiwi, oxygen, phonepe and so on and it also includes mobile banking applications. The study aimed at evaluating the predilection of the user in adopting digital transaction. The study is descriptive in nature. The researcher used random sample techniques to collect the data. The findings reveal that mobile applications differ with the quality of service rendered by Gpay and Phonepe. The researcher suggest the Phonepe application should focus on implementing the application should be user friendly interface and Gpay on motivating the users to feel the importance of request for money and modes of payments in the application.
VOICE BASED ATM FOR VISUALLY IMPAIRED USING ARDUINOIAEME Publication
The prototype of a voice-based ATM for visually impaired using Arduino is to help people who are blind. This uses RFID cards which contain users fingerprint encrypted on it and interacts with the users through voice commands. ATM operates when sensor detects the presence of one person in the cabin. After scanning the RFID card, it will ask to select the mode like –normal or blind. User can select the respective mode through voice input, if blind mode is selected the balance check or cash withdraw can be done through voice input. Normal mode procedure is same as the existing ATM.
IMPACT OF EMOTIONAL INTELLIGENCE ON HUMAN RESOURCE MANAGEMENT PRACTICES AMONG...IAEME Publication
There is increasing acceptability of emotional intelligence as a major factor in personality assessment and effective human resource management. Emotional intelligence as the ability to build capacity, empathize, co-operate, motivate and develop others cannot be divorced from both effective performance and human resource management systems. The human person is crucial in defining organizational leadership and fortunes in terms of challenges and opportunities and walking across both multinational and bilateral relationships. The growing complexity of the business world requires a great deal of self-confidence, integrity, communication, conflict and diversity management to keep the global enterprise within the paths of productivity and sustainability. Using the exploratory research design and 255 participants the result of this original study indicates strong positive correlation between emotional intelligence and effective human resource management. The paper offers suggestions on further studies between emotional intelligence and human capital development and recommends for conflict management as an integral part of effective human resource management.
VISUALISING AGING PARENTS & THEIR CLOSE CARERS LIFE JOURNEY IN AGING ECONOMYIAEME Publication
Our life journey, in general, is closely defined by the way we understand the meaning of why we coexist and deal with its challenges. As we develop the "inspiration economy", we could say that nearly all of the challenges we have faced are opportunities that help us to discover the rest of our journey. In this note paper, we explore how being faced with the opportunity of being a close carer for an aging parent with dementia brought intangible discoveries that changed our insight of the meaning of the rest of our life journey.
A STUDY ON THE IMPACT OF ORGANIZATIONAL CULTURE ON THE EFFECTIVENESS OF PERFO...IAEME Publication
The main objective of this study is to analyze the impact of aspects of Organizational Culture on the Effectiveness of the Performance Management System (PMS) in the Health Care Organization at Thanjavur. Organizational Culture and PMS play a crucial role in present-day organizations in achieving their objectives. PMS needs employees’ cooperation to achieve its intended objectives. Employees' cooperation depends upon the organization’s culture. The present study uses exploratory research to examine the relationship between the Organization's culture and the Effectiveness of the Performance Management System. The study uses a Structured Questionnaire to collect the primary data. For this study, Thirty-six non-clinical employees were selected from twelve randomly selected Health Care organizations at Thanjavur. Thirty-two fully completed questionnaires were received.
Living in 21st century in itself reminds all of us the necessity of police and its administration. As more and more we are entering into the modern society and culture, the more we require the services of the so called ‘Khaki Worthy’ men i.e., the police personnel. Whether we talk of Indian police or the other nation’s police, they all have the same recognition as they have in India. But as already mentioned, their services and requirements are different after the like 26th November, 2008 incidents, where they without saving their own lives has sacrificed themselves without any hitch and without caring about their respective family members and wards. In other words, they are like our heroes and mentors who can guide us from the darkness of fear, militancy, corruption and other dark sides of life and so on. Now the question arises, if Gandhi would have been alive today, what would have been his reaction/opinion to the police and its functioning? Would he have some thing different in his mind now what he had been in his mind before the partition or would he be going to start some Satyagraha in the form of some improvement in the functioning of the police administration? Really these questions or rather night mares can come to any one’s mind, when there is too much confusion is prevailing in our minds, when there is too much corruption in the society and when the polices working is also in the questioning because of one or the other case throughout the India. It is matter of great concern that we have to thing over our administration and our practical approach because the police personals are also like us, they are part and parcel of our society and among one of us, so why we all are pin pointing towards them.
A STUDY ON TALENT MANAGEMENT AND ITS IMPACT ON EMPLOYEE RETENTION IN SELECTED...IAEME Publication
The goal of this study was to see how talent management affected employee retention in the selected IT organizations in Chennai. The fundamental issue was the difficulty to attract, hire, and retain talented personnel who perform well and the gap between supply and demand of talent acquisition and retaining them within the firms. The study's main goals were to determine the impact of talent management on employee retention in IT companies in Chennai, investigate talent management strategies that IT companies could use to improve talent acquisition, performance management, career planning and formulate retention strategies that the IT firms could use. The respondents were given a structured close-ended questionnaire with the 5 Point Likert Scale as part of the study's quantitative research design. The target population consisted of 289 IT professionals. The questionnaires were distributed and collected by the researcher directly. The Statistical Package for Social Sciences (SPSS) was used to collect and analyse the questionnaire responses. Hypotheses that were formulated for the various areas of the study were tested using a variety of statistical tests. The key findings of the study suggested that talent management had an impact on employee retention. The studies also found that there is a clear link between the implementation of talent management and retention measures. Management should provide enough training and development for employees, clarify job responsibilities, provide adequate remuneration packages, and recognise employees for exceptional performance.
ATTRITION IN THE IT INDUSTRY DURING COVID-19 PANDEMIC: LINKING EMOTIONAL INTE...IAEME Publication
Globally, Millions of dollars were spent by the organizations for employing skilled Information Technology (IT) professionals. It is costly to replace unskilled employees with IT professionals possessing technical skills and competencies that aid in interconnecting the business processes. The organization’s employment tactics were forced to alter by globalization along with technological innovations as they consistently diminish to remain lean, outsource to concentrate on core competencies along with restructuring/reallocate personnel to gather efficiency. As other jobs, organizations or professions have become reasonably more appropriate in a shifting employment landscape, the above alterations trigger both involuntary as well as voluntary turnover. The employee view on jobs is also afflicted by the COVID-19 pandemic along with the employee-driven labour market. So, having effective strategies is necessary to tackle the withdrawal rate of employees. By associating Emotional Intelligence (EI) along with Talent Management (TM) in the IT industry, the rise in attrition rate was analyzed in this study. Only 303 respondents were collected out of 350 participants to whom questionnaires were distributed. From the employees of IT organizations located in Bangalore (India), the data were congregated. A simple random sampling methodology was employed to congregate data as of the respondents. Generating the hypothesis along with testing is eventuated. The effect of EI and TM along with regression analysis between TM and EI was analyzed. The outcomes indicated that employee and Organizational Performance (OP) were elevated by effective EI along with TM.
INFLUENCE OF TALENT MANAGEMENT PRACTICES ON ORGANIZATIONAL PERFORMANCE A STUD...IAEME Publication
By implementing talent management strategy, organizations would have the option to retain their skilled professionals while additionally working on their overall performance. It is the course of appropriately utilizing the ideal individuals, setting them up for future top positions, exploring and dealing with their performance, and holding them back from leaving the organization. It is employee performance that determines the success of every organization. The firm quickly obtains an upper hand over its rivals in the event that its employees having particular skills that cannot be duplicated by the competitors. Thus, firms are centred on creating successful talent management practices and processes to deal with the unique human resources. Firms are additionally endeavouring to keep their top/key staff since on the off chance that they leave; the whole store of information leaves the firm's hands. The study's objective was to determine the impact of talent management on organizational performance among the selected IT organizations in Chennai. The study recommends that talent management limitedly affects performance. On the off chance that this talent is appropriately management and implemented properly, organizations might benefit as much as possible from their maintained assets to support development and productivity, both monetarily and non-monetarily.
A STUDY OF VARIOUS TYPES OF LOANS OF SELECTED PUBLIC AND PRIVATE SECTOR BANKS...IAEME Publication
Banking regulations act of India, 1949 defines banking as “acceptance of deposits for the purpose of lending or investment from the public, repayment on demand or otherwise and withdrawable through cheques, drafts order or otherwise”, the major participants of the Indian financial system are commercial banks, the financial institution encompassing term lending institutions. Investments institutions, specialized financial institution and the state level development banks, non banking financial companies (NBFC) and other market intermediaries such has the stock brokers and money lenders are among the oldest of the certain variants of NBFC and the oldest market participants. The asset quality of banks is one of the most important indicators of their financial health. The Indian banking sector has been facing severe problems of increasing Non- Performing Assets (NPAs). The NPAs growth directly and indirectly affects the quality of assets and profitability of banks. It also shows the efficiency of banks credit risk management and the recovery effectiveness. NPA do not generate any income, whereas, the bank is required to make provisions for such as assets that why is a double edge weapon. This paper outlines the concept of quality of bank loans of different types like Housing, Agriculture and MSME loans in state Haryana of selected public and private sector banks. This study is highlighting problems associated with the role of commercial bank in financing Small and Medium Scale Enterprises (SME). The overall objective of the research was to assess the effect of the financing provisions existing for the setting up and operations of MSMEs in the country and to generate recommendations for more robust financing mechanisms for successful operation of the MSMEs, in turn understanding the impact of MSME loans on financial institutions due to NPA. There are many research conducted on the topic of Non- Performing Assets (NPA) Management, concerning particular bank, comparative study of public and private banks etc. In this paper the researcher is considering the aggregate data of selected public sector and private sector banks and attempts to compare the NPA of Housing, Agriculture and MSME loans in state Haryana of public and private sector banks. The tools used in the study are average and Anova test and variance. The findings reveal that NPA is common problem for both public and private sector banks and is associated with all types of loans either that is housing loans, agriculture loans and loans to SMES. NPAs of both public and private sector banks show the increasing trend. In 2010-11 GNPA of public and private sector were at same level it was 2% but after 2010-11 it increased in many fold and at present there is GNPA in some more than 15%. It shows the dark area of Indian banking sector.
EXPERIMENTAL STUDY OF MECHANICAL AND TRIBOLOGICAL RELATION OF NYLON/BaSO4 POL...IAEME Publication
An experiment conducted in this study found that BaSO4 changed Nylon 6's mechanical properties. By changing the weight ratios, BaSO4 was used to make Nylon 6. This Researcher looked into how hard Nylon-6/BaSO4 composites are and how well they wear. Experiments were done based on Taguchi design L9. Nylon-6/BaSO4 composites can be tested for their hardness number using a Rockwell hardness testing apparatus. On Nylon/BaSO4, the wear behavior was measured by a wear monitor, pinon-disc friction by varying reinforcement, sliding speed, and sliding distance, and the microstructure of the crack surfaces was observed by SEM. This study provides significant contributions to ultimate strength by increasing BaSO4 content up to 16% in the composites, and sliding speed contributes 72.45% to the wear rate
ROLE OF SOCIAL ENTREPRENEURSHIP IN RURAL DEVELOPMENT OF INDIA - PROBLEMS AND ...IAEME Publication
The majority of the population in India lives in villages. The village is the back bone of the country. Village or rural industries play an important role in the national economy, particularly in the rural development. Developing the rural economy is one of the key indicators towards a country’s success. Whether it be the need to look after the welfare of the farmers or invest in rural infrastructure, Governments have to ensure that rural development isn’t compromised. The economic development of our country largely depends on the progress of rural areas and the standard of living of rural masses. Village or rural industries play an important role in the national economy, particularly in the rural development. Rural entrepreneurship is based on stimulating local entrepreneurial talent and the subsequent growth of indigenous enterprises. It recognizes opportunity in the rural areas and accelerates a unique blend of resources either inside or outside of agriculture. Rural entrepreneurship brings an economic value to the rural sector by creating new methods of production, new markets, new products and generate employment opportunities thereby ensuring continuous rural development. Social Entrepreneurship has the direct and primary objective of serving the society along with the earning profits. So, social entrepreneurship is different from the economic entrepreneurship as its basic objective is not to earn profits but for providing innovative solutions to meet the society needs which are not taken care by majority of the entrepreneurs as they are in the business for profit making as a sole objective. So, the Social Entrepreneurs have the huge growth potential particularly in the developing countries like India where we have huge societal disparities in terms of the financial positions of the population. Still 22 percent of the Indian population is below the poverty line and also there is disparity among the rural & urban population in terms of families living under BPL. 25.7 percent of the rural population & 13.7 percent of the urban population is under BPL which clearly shows the disparity of the poor people in the rural and urban areas. The need to develop social entrepreneurship in agriculture is dictated by a large number of social problems. Such problems include low living standards, unemployment, and social tension. The reasons that led to the emergence of the practice of social entrepreneurship are the above factors. The research problem lays upon disclosing the importance of role of social entrepreneurship in rural development of India. The paper the tendencies of social entrepreneurship in India, to present successful examples of such business for providing recommendations how to improve situation in rural areas in terms of social entrepreneurship development. Indian government has made some steps towards development of social enterprises, social entrepreneurship, and social in- novation, but a lot remains to be improved.
OPTIMAL RECONFIGURATION OF POWER DISTRIBUTION RADIAL NETWORK USING HYBRID MET...IAEME Publication
Distribution system is a critical link between the electric power distributor and the consumers. Most of the distribution networks commonly used by the electric utility is the radial distribution network. However in this type of network, it has technical issues such as enormous power losses which affect the quality of the supply. Nowadays, the introduction of Distributed Generation (DG) units in the system help improve and support the voltage profile of the network as well as the performance of the system components through power loss mitigation. In this study network reconfiguration was done using two meta-heuristic algorithms Particle Swarm Optimization and Gravitational Search Algorithm (PSO-GSA) to enhance power quality and voltage profile in the system when simultaneously applied with the DG units. Backward/Forward Sweep Method was used in the load flow analysis and simulated using the MATLAB program. Five cases were considered in the Reconfiguration based on the contribution of DG units. The proposed method was tested using IEEE 33 bus system. Based on the results, there was a voltage profile improvement in the system from 0.9038 p.u. to 0.9594 p.u.. The integration of DG in the network also reduced power losses from 210.98 kW to 69.3963 kW. Simulated results are drawn to show the performance of each case.
APPLICATION OF FRUGAL APPROACH FOR PRODUCTIVITY IMPROVEMENT - A CASE STUDY OF...IAEME Publication
Manufacturing industries have witnessed an outburst in productivity. For productivity improvement manufacturing industries are taking various initiatives by using lean tools and techniques. However, in different manufacturing industries, frugal approach is applied in product design and services as a tool for improvement. Frugal approach contributed to prove less is more and seems indirectly contributing to improve productivity. Hence, there is need to understand status of frugal approach application in manufacturing industries. All manufacturing industries are trying hard and putting continuous efforts for competitive existence. For productivity improvements, manufacturing industries are coming up with different effective and efficient solutions in manufacturing processes and operations. To overcome current challenges, manufacturing industries have started using frugal approach in product design and services. For this study, methodology adopted with both primary and secondary sources of data. For primary source interview and observation technique is used and for secondary source review has done based on available literatures in website, printed magazines, manual etc. An attempt has made for understanding application of frugal approach with the study of manufacturing industry project. Manufacturing industry selected for this project study is Mahindra and Mahindra Ltd. This paper will help researcher to find the connections between the two concepts productivity improvement and frugal approach. This paper will help to understand significance of frugal approach for productivity improvement in manufacturing industry. This will also help to understand current scenario of frugal approach in manufacturing industry. In manufacturing industries various process are involved to deliver the final product. In the process of converting input in to output through manufacturing process productivity plays very critical role. Hence this study will help to evolve status of frugal approach in productivity improvement programme. The notion of frugal can be viewed as an approach towards productivity improvement in manufacturing industries.
A MULTIPLE – CHANNEL QUEUING MODELS ON FUZZY ENVIRONMENTIAEME Publication
In this paper, we investigated a queuing model of fuzzy environment-based a multiple channel queuing model (M/M/C) ( /FCFS) and study its performance under realistic conditions. It applies a nonagonal fuzzy number to analyse the relevant performance of a multiple channel queuing model (M/M/C) ( /FCFS). Based on the sub interval average ranking method for nonagonal fuzzy number, we convert fuzzy number to crisp one. Numerical results reveal that the efficiency of this method. Intuitively, the fuzzy environment adapts well to a multiple channel queuing models (M/M/C) ( /FCFS) are very well.