In this paper comparison of Selective Harmonic Elimination (SHE) method with different Pulse Width
Modulation (PWM) technique which are used as gate pulse for firing the IGBT‟s. Higher order harmonics are
easily eliminated by selecting a proper tuned value filters but lower order harmonics such as 3rd, 5th, 7th, and
9th are not easily eliminated. This paper includes Newton- Rapson method with random initial guess is used for
SHE reduction and shows where the solution can exit by solving transcendental non linear equations. With the
use of this method lower order harmonics as well as Total Harmonic Distortion (THD) will get reduce. In this
paper a cascaded H-bridge Multilevel Inverter using MATLAB/Simulink blocks is presented.
in this PPT i gave introductions of the dc chopper . basic principle and working of dc chopper. and all the contents are in ps bimbhra power electronics book.
Torque Production & Control of Speed in Synchronous Motor.
Speed of synchronous motors can be controlled using two methods called open loop and close loop control.
Open loop contol is the simplest scalar control method where motor speed is controlled by independent frequency control of the converter.
In case of close loop self control mode, instead of controlling the inverter frequency independentaly, the frequency and the phase of the output waveform are controlled by an absolute position encoder mounted on the machine shaft giving an account of position of the rotor.
in this PPT i gave introductions of the dc chopper . basic principle and working of dc chopper. and all the contents are in ps bimbhra power electronics book.
Torque Production & Control of Speed in Synchronous Motor.
Speed of synchronous motors can be controlled using two methods called open loop and close loop control.
Open loop contol is the simplest scalar control method where motor speed is controlled by independent frequency control of the converter.
In case of close loop self control mode, instead of controlling the inverter frequency independentaly, the frequency and the phase of the output waveform are controlled by an absolute position encoder mounted on the machine shaft giving an account of position of the rotor.
Speed Control of Induction Motor using Variable Frequency DriveSandeep Kaushal
Induction motor is constant speed motor at a particular frequency and consumes almost same power irrespective of load demand. Let's talk about two different load one is high load and other low load. AT low load motor is delivering the load with some current and thereby torque is maintained. If load goes high, to maintain the same speed and developed torqued, motor will draw extra current and will corresponds to more losses. If speed of motor is reduced corresponding too low load and is increased corresponding to high load, then substantial amount of power can be saved. And speed can be changed by changing the frequency of input supply.
V/F control of Induction Motor - Variable voltage and Variable frequencyCitharthan Durairaj
This presentation describes Principle of Variable voltage and Variable frequency- the open loop & closed loop Voltage/Frequency (V/F) control of Induction motor with torque speed characteristics -
LOAD FREQUENCY AND VOLTAGE GENERATION CONTROLPreet_patel
LOAD FREQUENCY AND VOLTAGE GENERATION CONTROL
Load frequency control
Automatic Generation Control
Voltage Control
Primary regulation.
Secondary regulation
real power
Why voltage control is important?
Speed Control of Induction Motor using Variable Frequency DriveSandeep Kaushal
Induction motor is constant speed motor at a particular frequency and consumes almost same power irrespective of load demand. Let's talk about two different load one is high load and other low load. AT low load motor is delivering the load with some current and thereby torque is maintained. If load goes high, to maintain the same speed and developed torqued, motor will draw extra current and will corresponds to more losses. If speed of motor is reduced corresponding too low load and is increased corresponding to high load, then substantial amount of power can be saved. And speed can be changed by changing the frequency of input supply.
V/F control of Induction Motor - Variable voltage and Variable frequencyCitharthan Durairaj
This presentation describes Principle of Variable voltage and Variable frequency- the open loop & closed loop Voltage/Frequency (V/F) control of Induction motor with torque speed characteristics -
LOAD FREQUENCY AND VOLTAGE GENERATION CONTROLPreet_patel
LOAD FREQUENCY AND VOLTAGE GENERATION CONTROL
Load frequency control
Automatic Generation Control
Voltage Control
Primary regulation.
Secondary regulation
real power
Why voltage control is important?
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
THD Minimisation for Phase Voltage of Multilevel Inverters Using Genetic Algo...theijes
The International Journal of Engineering & Science is aimed at providing a platform for researchers, engineers, scientists, or educators to publish their original research results, to exchange new ideas, to disseminate information in innovative designs, engineering experiences and technological skills. It is also the Journal's objective to promote engineering and technology education. All papers submitted to the Journal will be blind peer-reviewed. Only original articles will be published.
Harmonic elimination at the fundamental frequency is very much appropriate for high and medium range of power generation and applications. This paper considers a new technique for selective harmonic elimination (SHE), in which the total harmonic distortion (THD) is minimized when compared with that of the conventional one. With this technique, the harmonics at lower order are eliminated, which are more predominant than the higher ones.Cascaded H-Bridge inverter fed by a single DC is considered which is simulated with the switching angles generated by both the conventional method of SHE and the new method of SHE. The simulated results of the load voltage and the waveforms of the harmonic analysis are shown. The THD values are compared for the two techniques. The experimental results are also shown for the new technique. The switching angles are generated with the help of field programmable gated array (FPGA) in the hardware. The value of experimental THD of voltage is compared with that of simulated THD and the comparison prove that the results are satisfactory.
A Novel Topology of Multilevel Inverter with Reduced Number of Switches and D...IAES-IJPEDS
This paper introduces new topology of cascaded multilevel inverter, with considerable reduction in the number of switches and DC voltage sources. The proposed topology is based on asymmetrical multilevel inverter which produces 21 levels of output with the use of 11 unidirectional switches, 3 diodes and 4 DC voltage sources. The advantages of this topology are reduction in the number of switches (2 nos.) and gate driver circuits (2 nos.), reduction in the number of DC sources (2 nos.) also cost, complexity, and space required for hardware is reduced without sacrificing the quality output of the inverter. To reduce the THD further Level shifting SPWM techniques such as PD, POD & APOD are used and comparison is shown on the basis of THDs obtained from the above SPWM techniques. Frequency of carrier waves is 1KHz, and modulation index is 1.0. To validate the proposed topology the circuit is simulated and verified by using MATLAB/Simulink.
Closed Loop Analysis of Multilevel Inverter Fed Drives IJPEDS-IAES
This paper deals with the simulation and implementation of multilevel inverter for drives application. Here the focuses will be onimproving the efficiency of the multilevel inverter and quality of output voltage waveform. The circuit is developed towards high efficiency, high performance, and low cost, simple control scheme. Harmonics Elimination was implemented to reduce the Total Harmonics Distortion (THD) value which is achieved by selecting appropriate switching angles. In this paper to determine the performance of rectifier, steady state analysis is done. Furthermore, the merits of multilevel inverter topology are inherited.Closed loop control is done to analysis the stability of the system.
Study and Simulation of Seven Level - Ten Switch Inverter TopologyMohd Esa
Compared to conventional two-level inverter, multilevel inverter
performance is high because of their reduced harmonic distortion, less
electromagnetic interference, reduced common mode voltage and higher dc link
voltages. However complex pulse width modulation control, balancing of
capacitor voltages & increased number of switches are main drawbacks of
multilevel inverter.This paper focuses on study and simulation of single phase
seven level inverter topology using only ten switches. This paper also presents
two different control techniques for seven level-ten switch inverter topology.Rload
is connected to inverter and simulation is performed using
MATLAB/Simulink Software.
In recent research, there has been an extensive increase in interest to multilevel power
conversion. The introduction of new inverter topologies & unique modulation
techniques was involved in recent research studies. However, the most commonly
used multi-level inverter topologies are multi-cell inverter [1], diode clamped inverter
[2]-[5] and capacitor clamped inverter [6]. Some applications for these inverters
include industrial drives, flexible ac transmission systems [7], traction applications in
the transport industry and grid integration of non-conventional energy sources.
The seven level-ten switch topology is a symmetrical topology since the values of
all voltage sources are the same. However, there are several asymmetrical topologies
that need voltage sources of different values. This asymmetry results in the need of dc
voltage sources having a specific relation between them and also the difference in
rating of the semiconductor switches. This paper, presents study and simulation of a
new multilevel inverter topology named reversing voltage (RV) [8]. This topology
requires less number of components compared to conventional topologies. It is also
more efficient since the inverter has a component which operates the switching power
devices at line frequency. Therefore, there is no need for all switches to work in high
frequency which leads to simpler and more reliable control of the inverter. Two
different control techniques are used in this paper to drive the inverter .The simulation
results of the seven level-ten switch inverter topology are presented.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
A novel optimization harmonic elimination technique for cascaded multilevel i...journalBEEI
The main goal of utilizing Selective Harmonic Elimination (SHE) techniques in Multilevel Inverters (MLI) is to produce a high-quality output voltage signal with a minimum Total Harmonic Distortion (THD). By calculating N switching angles, SHE technique can eliminate (N-1) low order odd harmonics of the output voltage waveform. To optimized and obtained these switching angles, N of nonlinear equations should be solved using a numerical method. Modulation index (m) and duty cycle play a big role in selective harmonic elimination technique to obtain a minimum harmonic distortion and desired fundamental component voltage. In this paper, a novel Optimization Harmonic Elimination Technique (OHET) based on SHE scheme is proposed to re-mitigate Total Harmonic Distortion. The performance of seven-level H-bridge cascade inverter is evaluated using PSIM and validated experimentally by developing a purposely built microcontroller-based printed circuit board.
Total Harmonic Distortion Analysis of Multilevel Inverter Fed To Induction Mo...IJERA Editor
This paper presents the control of a multilevel inverter supplied by a Photovoltaic (PV) panel and a batteries
bank. It is well known that the power quality of multilevel inverter signals depends on their number of levels.
However, the question that arises is whether there is a limit beyond which it is not necessary to increase the
number of level. This question is addressed in this paper. Three, nine and fifteen-level converters are studied.
The harmonics content of the output signals are analyzed. A simplified Pulse Width Modulation (SPWM)
method for a multilevel inverter that supplied an induction motor is developed. The controller equations are such
that the SPWM pulses are generated automatically for any number of levels. The effectiveness of the propose
method is evaluated in simulation. Matlab®/ Simulink is used to implement the control algorithm and simulate
the system.
Fuzzy Logic Controlled Harmonic Suppressor in Cascaded Multilevel InverterIJPEDS-IAES
This paper presents an investigation of seven level cascaded H-bridge (CHB)
inverter in power system for compensation of harmonics. For power quality
control a Fuzzy Logic Control (FLC) giving comparatively better harmonic
reduction than the conventional controllers. Harmonic distortion is the most
important power quality problem stirring in multilevel inverter; the
harmonics can be eliminated by an optimal selection of switching angles. A
hybrid evaluation technique evaluates the obtained optimal switching angles
that are attained from the fuzzy inference system as well as neural network.
The proposed method will be implemented in MATLAB working platform
and the harmonic elimination performance will be evaluated.
Multi Carrier based Multilevel Inverter with Minimal Harmonic DistortionIJPEDS-IAES
This paper presents performance features of Asymmetric Cascaded
Multilevel inverter. Multilevel inverters are commonly modulated by using
multicarrier pulse width modulation (MCPWM) techniques such as phaseshifted
multicarrier modulation and level-shifted multicarrier modulation.
Amongst these, level-shifted multicarrier modulation technique produces the
best harmonic performance. This work studies about multilevel inverter with
unequal DC sources using level shifting MCPWM technique. The
Performances indices like Total Harmonic Distortion (THD), number of
switches and DC Sources are considered. A procedure to achieve an
appropriate level shifting is also presented is this paper.
Close Loop V/F Control of Voltage Source Inverter using Sinusoidal PWM, Third...IAES-IJPEDS
The aim of this paper to presents a comparative analysis of Voltage Source
Inverter using Sinusoidal Pulse Width Modulation Method, Third Harmonic
Injection Pulse Width Modulation Method and Space Vector Pulse Width
Modulation Two level inverter for Induction Motor. In this paper we have
designed the Simulink model of Inverter for different technique. An above
technique is used to reduce the Total Harmonic Distortion (THD) on the AC
side of the Inverter. The Simulink model is close loop. Results are analyzed
using Fast Fourier Transformation (FFT) which is for analysis of the Total
Harmonic Distortion. All simulations are performed in the MATLAB
Simulink / Simulink environment of MATLAB.
This is collection of First Dozen of papers published by Mohd Esa
Mohd Esa, completed M.E. (Power Electronics systems) from Muffakham Jah College of Engineering and Technology, Banjarahills, Hyderabad in 2018. He received his B.E degree from Osmania University, Hyderabad. He was awarded gold medal twice for standing first in B.E. III/IV and B.E. IV/IV from Matrusri Engineering College, Sayeedabad, Hyderabad. He has published 12 research papers in various journals and conferences. He is Member of International Association of Engineers (IAENG), Hong Kong. His research of interests includes Multi level inverters and Multipliers. He is currently working as Junior Research Fellow.
Common Mode Voltage Control in Three Level Diode Clamped InverterIJERA Editor
This paper presents simple sinusoidal PWM technique to reduced common mode voltage (CMV) at output terminal of the inverter. Multilevel inverter (MLI) is more suitable in high & medium power application, CMV is produced at the time of operation in output terminal of inverter. In this paper, an approach to reduced CMV at output terminal of MLI by using SPWM technique in three level diode clamped inverter (DCMLI) is proposed. A good transaction between the quality of the output voltage & the magnitude of CMV is achieved in this paper. The paper presents phase opposition & phase opposition disposition SPWM technique to reduced CMV in DCMLI. Simulation & experimental result presented to confirm the effectiveness of the proposed technique to control CMV.
International Journal of Engineering and Science Invention (IJESI)inventionjournals
International Journal of Engineering and Science Invention (IJESI) is an international journal intended for professionals and researchers in all fields of computer science and electronics. IJESI publishes research articles and reviews within the whole field Engineering Science and Technology, new teaching methods, assessment, validation and the impact of new technologies and it will continue to provide information on the latest trends and developments in this ever-expanding subject. The publications of papers are selected through double peer reviewed to ensure originality, relevance, and readability. The articles published in our journal can be accessed online.
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KuberTENes Birthday Bash Guadalajara - K8sGPT first impressionsVictor Morales
K8sGPT is a tool that analyzes and diagnoses Kubernetes clusters. This presentation was used to share the requirements and dependencies to deploy K8sGPT in a local environment.
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Comparison of PWM Techniques and Selective Harmonic Elimination for 3-Level Inverter
1. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 16|P a g e
Comparison of PWM Techniques and Selective Harmonic
Elimination for 3-Level Inverter
Ms. Surabhi Patil1
, Mrs. Sarika D Patil2
, Prof. Prashant Debre3
1
Rajiv Gandhi College of Engineering & Research, Nagpur, India
2
Department of Electrical Engineering Rajiv Gandhi College of Engineering & Research, Nagpur, India
3
Department of Electrical Engineering Rajiv Gandhi College of Engineering & Research, Nagpur, India
ABSTRACT
In this paper comparison of Selective Harmonic Elimination (SHE) method with different Pulse Width
Modulation (PWM) technique which are used as gate pulse for firing the IGBT‟s. Higher order harmonics are
easily eliminated by selecting a proper tuned value filters but lower order harmonics such as 3rd, 5th, 7th, and
9th are not easily eliminated. This paper includes Newton- Rapson method with random initial guess is used for
SHE reduction and shows where the solution can exit by solving transcendental non linear equations. With the
use of this method lower order harmonics as well as Total Harmonic Distortion (THD) will get reduce. In this
paper a cascaded H-bridge Multilevel Inverter using MATLAB/Simulink blocks is presented.
Keywords-Flexible AC Transmission System, Multilevel Inverter, Power Electronics, Selective Harmonic
Elimination, SPWM-Sinusoidal Pulse Width Modulation
I. INTRODUCTION
Multilevel Inverter is most popular power
electronics converters and is widely used in many
industrial applications, where the requirement is
medium voltage and high power applications. These
are widely used in chemical, oil, and liquefied
natural gas plants, water plants, marine propulsion,
power generation, energy transmission, and power-
quality devices, FACTS Devices [1-3]. Here,
Cascaded H-bridge converter topology is used and
particularly useful for renewable energy and
DSTATCOM applications [4-5], [9]. While in
comparison with l two-level voltage source
inverters, multilevel inverters have several
advantages. The main advantage is that of its
stepwise output voltage. This advantage results in
higher power quality, lower switching losses, higher
voltage capability, it has low distortion, and low
dv/dt and can operate with a lower switching
frequency. With several number of dc voltages as
inputs desired output can be obtained from
multilevel inverter. By increasing the number of
levels the output voltage and current waveform
approaches to the sinusoidal waveform. Different
topologies, control strategies and modulation
techniques used for multilevel inverters have been
presented in [6-7].
The generalized formulation of Selective
Harmonic Elimination of multilevel inverter is
presented in literature recently. SHE involves
nonlinear equations which can be solved by
different methods like Newton Rapson, genetic
algorithm, particle swarm optimization, bee
algorithm and bacterial foraging. This paper
involves solving of nonlinear equations by using
Newton-Rapson method and MATLAB/Simulink.
II. REVIEW OF GENERALIZED SHE FOR
MULTILEVEL INVERTER
The A multilevel cascade inverter
consists a number of H-bridge cells that are
connected in series per phase, and each module
needs separate DC source for generation of voltage
levels at the output of inverter.
+Vdc In1, In4 ON
Vout = 0 In1, In3 ON ... (1)
-Vdc In2, In3 ON
The switching inputs shown as Si, i=1 to 4
in the Fig. 1 allows obtaining output voltage as per
(1). The H-bridge cells are serially connected over
AC outputs to obtain expanded phase voltage
levels. Cascade Multilevel Inverter (CMLI) is one
of the most important topology.
RESEARCH ARTICLE OPEN ACCESS
2. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 17|P a g e
Fig.1 Cascaded H-Bridge Multilevel Inverter
As compared to diode-clamped and
flying capacitors it requires least number of
components. The minimum number of levels and
the voltage rating of the active devices (IGBTs,
GTOs, power MOSFETs, etc.) are inversely
proportional to each other. A higher voltage rating
of the devices will require minimum number of
levels and vice versa. The cascaded multilevel
inverter consists of a number of H-bridge inverter
units which require separate dc source for each
unit and is connected in cascade as shown in
Fig. 1. The output voltage levels as seen from Fig.
2.
m = 2s + 1 …….. (2)
Switching devices = 2(m-1)
DC Bus capacitors = (m-1)/2……. (3)
Where„s‟ is the number of bridges, „m‟ is
the number of levels. The Fourier series expansion
of the general multilevel stepped output voltage is
given in (4), where n is the harmonic number of the
output voltage of inverter.
𝑉 𝑤𝑡 = 𝑉𝑛 sin(𝑛𝑤𝑡)∞
𝑛=1
………………(4)
Where
𝑉 𝑛 =
4𝑉𝑑𝑐
𝑛𝜋
cos 𝑛𝜃𝑖 𝑓𝑜𝑟 𝑜𝑑𝑑 𝑛𝑠
0 𝑓𝑜𝑟 𝑒𝑣𝑒𝑛 𝑛𝑠
∞
𝑛=1
Fig. 2 Output voltage waveform of 7-level Cascaded
Multilevel Inverter
The switching angles can be chosen so
that minimum voltage harmonics is obtained.
Normally, these angles are chosen so as to reduce
lower frequency harmonics. The selective
harmonic elimination method is also called
fundamental switching frequency method based on
the harmonic elimination theory proposed in this
paper. The major difficulty for selective harmonic
elimination methods is to include the fundamental
switching frequency method and methods to solve
the transcendental equations for switching angles.
To obtain fundamental voltage and to
eliminate 5th and 7th harmonics, three nonlinear
equations are as follows.
𝑉1 =
4𝑉𝑑𝑐
𝜋
cos 𝜃1 + cos 𝜃2 + cos 𝜃3 = 𝑉1
∗
…......... (5)
𝑉5 =
4𝑉𝑑𝑐
5𝜋
cos 5𝜃1 + cos 5𝜃2 + cos 5𝜃3
= 0
…………. (6)
𝑉7 =
4𝑉𝑑𝑐
7𝜋
cos 7𝜃1 + cos 7𝜃2 + cos 7𝜃3
= 0
……… (7)
Subject to 0 < 𝜃1 < 𝜃2 < 𝜃3 <
π
2
These equations are nonlinear
transcendental equations are solved by Newton-
Raphson method using Random Initial Guess, as
the solution doesn‟t depend upon the guess. This
paper presents a multilevel inverter model with
mathematical model for SPWM modulator to
minimize THD.
III. DIFFERENT TOPOLOGIES OF PWM
METHOD
PWM methods are classified in three parts
1) Single-pulse-width modulation.
2) Multiple-pulse-width modulation.
3) Sinusoidal pulse-width modulation.
3. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 18|P a g e
Single pulse width modulation
Single pulse width modulation involves
only one pulse per half cycle and the width is
varied to control inverter output voltage. The
gating signals are generated by comparing a
rectangle reference signal with a triangular
reference signal. Fig shows generation of gating
signals:-
Fig- Gate pulse generation of Single Pulse Width
Modulation
Fig. 3 Voltage waveform of single pulse width modulation
method
Voltage Equations
Modulation index is given as
AcArM /
The rms output voltage can be found from
2/)(
2/)(
1
2/12
1
/)](2/2[
VtdVVo
By varying Ar from 0 to Ac, pulse width δ can be
modified from 0 to 180 and the rms output voltage
Vo from 0 to Vs.
Multiple-pulse-width modulation
Multiple-pulse-width modulation multiple
pulse per half cycle is used. The gating signals are
generated by comparing reference signal with a
triangular reference signal.
Harmonic content is reducing in this technique.
Fig shows generation of gating signals:-
Fig- Gate pulse generation of Multiple Pulse Width
Modulation
Voltage Equations
The number of pulses per half cycle is
given as
2/2/ roc
mffp
Where
ocf
ffm /
The rms output voltage can be found from
2/)/(
2/)/(
2/12
/)](2/2[
p
p
sso
pVtdVpV
Fig- Voltage Waveform of Multiple Pulse Width Modulation
method
Sinusoidal pulse-width modulation
The number of pulses per half cycle
depends on carries frequency and width of each
pulse is varied in proportion to the amplitude of
sine wave. The gating signals are generated by
comparing sinusoidal wave as reference signal with
a triangular reference signal. Harmonic content is
reducing in this technique.
The rms output voltage can be varied by
varying the modulation index M.
If δm is the width of mth pulse the rms output
voltage
p
m
mso
VV
2
1
2/1
)/(
0 0.002 0.004 0.006 0.008 0.01
-100
-50
0
50
100
Time
Voltage
0 0.002 0.004 0.006 0.008 0.01
-100
-50
0
50
100
Time
Voltage
4. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
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Fig- Voltage Waveform of SPWM method
Fig- FFT analysis of SPWM Technique
IV. SELECTIVE HARMONIC
ELIMINATION METHOD
In this technique sinusoidal wave is
compared with a constant. Intersection points of
sinusoidal wave n constant generate the gate signal.
This gate signal is given to trigger the
IGBT/MOSFET. SHE technique contains
transcendental equation which can be solved by
This method is used to find the switching
angles. The switching angles lie between 0 to
2/ producing fundamental voltage with
elimination of 5th
& 7th
harmonic component. The
N-R method is basically based on trial and error
method with random initial guess and modulation
index m1 for which solution exists. Initial guess
ranges from 0 to 2/ and switching angles along
with the error are computed for complete range of
m1 by increasing its value in small steps (let
0.0001).
Algorithm for N-R method is given as
1) Assume any random initial guess for switching
angles (say 0
) such as 0 2/21
.
2) Set m1
= 0.
3) Calculate F( 0
), B(m1
) and Jacobian J( 0
).s
4) Compute during the iteration using
following equation,
)).()()(( 010
1
FmBJ
5) Update the switching angles i.e.
).()()1( kkk
6) To bring switching angles in range solve the
following equation
)))).1((cos((cos)1(
1
kabsk
7) Repeat steps (3) to (6) for number of iterations
to attain error goal.
8) Increment m1
by a fixed step.
9) Repeat steps (2) to (8) for range of m1
.
10) Plot the switching angle as a function of m1
and different solution sets would be obtained.
11) Take one solution sets at a time and compute
complete solutions set for the range of m1
,
where it exists.
The output equation with switching angles
/4
)]cos(..)cos()cos()[cos(/4
max1
1321
dc
sdc
sVV
where
VV
Modulation index is given as
dc
sVVm 4/11
Fig- Voltage waveform of SHE technique
By using the algorithm of N-R method
switching angles is calculated. With respect to
these switching angles respective THD and 3rd
harmonic is also calculated. These switching angles
and harmonic are shown in below table.
0 0.02 0.04 0.06 0.08 0.1
-100
-50
0
50
100
Time
Voltage
0 2 4 6 8 10 12 14 16 18 20
0
5
10
15
20
25
30
35
Harmonic order
Fundamental (50Hz) = 117.65 , THD= 78.00%
Mag(%ofFundamental)
0 0.02 0.04 0.06 0.08 0.1
-100
-50
0
50
100
Time
Voltage
5. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
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TABLE 1- Switching Angles and % of Harmonics
M Switching
angle(deg)
3rd
Harmonic
%
THD
%
0.8 29.475 0.30 31.17
By inserting notches at a particular instant,
total THD is reduced to 31.17%.
0 2 4 6 8 10 12 14 16 18 20
0
5
10
15
20
Harmonic order
Fundamental (50Hz) = 109.9 , THD= 31.17%
Mag(%of
Fundamental)
Fig- FFT analysis of SHE Technique
Comparison of PWM Techniques And She
Technique
V. CONCLUSION
The results obtained from simulation of
MATLAB/Simulink shows that the harmonic THD
contents and also third, fifth and seventh harmonics
are within 3% tolerance and other higher order
harmonics are eliminated by filter. From above
comparison of PWM Technique and SHE-PWM
Technique we can conclude that SHE-PWM
technique contains less % of harmonic compared to
other PWM techniques.
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