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Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 16|P a g e
Comparison of PWM Techniques and Selective Harmonic
Elimination for 3-Level Inverter
Ms. Surabhi Patil1
, Mrs. Sarika D Patil2
, Prof. Prashant Debre3
1
Rajiv Gandhi College of Engineering & Research, Nagpur, India
2
Department of Electrical Engineering Rajiv Gandhi College of Engineering & Research, Nagpur, India
3
Department of Electrical Engineering Rajiv Gandhi College of Engineering & Research, Nagpur, India
ABSTRACT
In this paper comparison of Selective Harmonic Elimination (SHE) method with different Pulse Width
Modulation (PWM) technique which are used as gate pulse for firing the IGBT‟s. Higher order harmonics are
easily eliminated by selecting a proper tuned value filters but lower order harmonics such as 3rd, 5th, 7th, and
9th are not easily eliminated. This paper includes Newton- Rapson method with random initial guess is used for
SHE reduction and shows where the solution can exit by solving transcendental non linear equations. With the
use of this method lower order harmonics as well as Total Harmonic Distortion (THD) will get reduce. In this
paper a cascaded H-bridge Multilevel Inverter using MATLAB/Simulink blocks is presented.
Keywords-Flexible AC Transmission System, Multilevel Inverter, Power Electronics, Selective Harmonic
Elimination, SPWM-Sinusoidal Pulse Width Modulation
I. INTRODUCTION
Multilevel Inverter is most popular power
electronics converters and is widely used in many
industrial applications, where the requirement is
medium voltage and high power applications. These
are widely used in chemical, oil, and liquefied
natural gas plants, water plants, marine propulsion,
power generation, energy transmission, and power-
quality devices, FACTS Devices [1-3]. Here,
Cascaded H-bridge converter topology is used and
particularly useful for renewable energy and
DSTATCOM applications [4-5], [9]. While in
comparison with l two-level voltage source
inverters, multilevel inverters have several
advantages. The main advantage is that of its
stepwise output voltage. This advantage results in
higher power quality, lower switching losses, higher
voltage capability, it has low distortion, and low
dv/dt and can operate with a lower switching
frequency. With several number of dc voltages as
inputs desired output can be obtained from
multilevel inverter. By increasing the number of
levels the output voltage and current waveform
approaches to the sinusoidal waveform. Different
topologies, control strategies and modulation
techniques used for multilevel inverters have been
presented in [6-7].
The generalized formulation of Selective
Harmonic Elimination of multilevel inverter is
presented in literature recently. SHE involves
nonlinear equations which can be solved by
different methods like Newton Rapson, genetic
algorithm, particle swarm optimization, bee
algorithm and bacterial foraging. This paper
involves solving of nonlinear equations by using
Newton-Rapson method and MATLAB/Simulink.
II. REVIEW OF GENERALIZED SHE FOR
MULTILEVEL INVERTER
The A multilevel cascade inverter
consists a number of H-bridge cells that are
connected in series per phase, and each module
needs separate DC source for generation of voltage
levels at the output of inverter.
+Vdc In1, In4 ON
Vout = 0 In1, In3 ON ... (1)
-Vdc In2, In3 ON
The switching inputs shown as Si, i=1 to 4
in the Fig. 1 allows obtaining output voltage as per
(1). The H-bridge cells are serially connected over
AC outputs to obtain expanded phase voltage
levels. Cascade Multilevel Inverter (CMLI) is one
of the most important topology.
RESEARCH ARTICLE OPEN ACCESS
Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 17|P a g e
Fig.1 Cascaded H-Bridge Multilevel Inverter
As compared to diode-clamped and
flying capacitors it requires least number of
components. The minimum number of levels and
the voltage rating of the active devices (IGBTs,
GTOs, power MOSFETs, etc.) are inversely
proportional to each other. A higher voltage rating
of the devices will require minimum number of
levels and vice versa. The cascaded multilevel
inverter consists of a number of H-bridge inverter
units which require separate dc source for each
unit and is connected in cascade as shown in
Fig. 1. The output voltage levels as seen from Fig.
2.
m = 2s + 1 …….. (2)
Switching devices = 2(m-1)
DC Bus capacitors = (m-1)/2……. (3)
Where„s‟ is the number of bridges, „m‟ is
the number of levels. The Fourier series expansion
of the general multilevel stepped output voltage is
given in (4), where n is the harmonic number of the
output voltage of inverter.
𝑉 𝑤𝑡 = 𝑉𝑛 sin(𝑛𝑤𝑡)∞
𝑛=1
………………(4)
Where
𝑉 𝑛 =
4𝑉𝑑𝑐
𝑛𝜋
cos 𝑛𝜃𝑖 𝑓𝑜𝑟 𝑜𝑑𝑑 𝑛𝑠
0 𝑓𝑜𝑟 𝑒𝑣𝑒𝑛 𝑛𝑠
∞
𝑛=1
Fig. 2 Output voltage waveform of 7-level Cascaded
Multilevel Inverter
The switching angles can be chosen so
that minimum voltage harmonics is obtained.
Normally, these angles are chosen so as to reduce
lower frequency harmonics. The selective
harmonic elimination method is also called
fundamental switching frequency method based on
the harmonic elimination theory proposed in this
paper. The major difficulty for selective harmonic
elimination methods is to include the fundamental
switching frequency method and methods to solve
the transcendental equations for switching angles.
To obtain fundamental voltage and to
eliminate 5th and 7th harmonics, three nonlinear
equations are as follows.
𝑉1 =
4𝑉𝑑𝑐
𝜋
cos 𝜃1 + cos 𝜃2 + cos 𝜃3 = 𝑉1
∗
…......... (5)
𝑉5 =
4𝑉𝑑𝑐
5𝜋
cos 5𝜃1 + cos 5𝜃2 + cos 5𝜃3
= 0
…………. (6)
𝑉7 =
4𝑉𝑑𝑐
7𝜋
cos 7𝜃1 + cos 7𝜃2 + cos 7𝜃3
= 0
……… (7)
Subject to 0 < 𝜃1 < 𝜃2 < 𝜃3 <
π
2
These equations are nonlinear
transcendental equations are solved by Newton-
Raphson method using Random Initial Guess, as
the solution doesn‟t depend upon the guess. This
paper presents a multilevel inverter model with
mathematical model for SPWM modulator to
minimize THD.
III. DIFFERENT TOPOLOGIES OF PWM
METHOD
PWM methods are classified in three parts
1) Single-pulse-width modulation.
2) Multiple-pulse-width modulation.
3) Sinusoidal pulse-width modulation.
Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 18|P a g e
Single pulse width modulation
Single pulse width modulation involves
only one pulse per half cycle and the width is
varied to control inverter output voltage. The
gating signals are generated by comparing a
rectangle reference signal with a triangular
reference signal. Fig shows generation of gating
signals:-
Fig- Gate pulse generation of Single Pulse Width
Modulation
Fig. 3 Voltage waveform of single pulse width modulation
method
Voltage Equations
Modulation index is given as
AcArM /
The rms output voltage can be found from




2/)(
2/)(
1
2/12
1
/)](2/2[


 VtdVVo
By varying Ar from 0 to Ac, pulse width δ can be
modified from 0 to 180 and the rms output voltage
Vo from 0 to Vs.
Multiple-pulse-width modulation
Multiple-pulse-width modulation multiple
pulse per half cycle is used. The gating signals are
generated by comparing reference signal with a
triangular reference signal.
Harmonic content is reducing in this technique.
Fig shows generation of gating signals:-
Fig- Gate pulse generation of Multiple Pulse Width
Modulation
Voltage Equations
The number of pulses per half cycle is
given as
2/2/ roc
mffp 
Where
ocf
ffm /
The rms output voltage can be found from




2/)/(
2/)/(
2/12
/)](2/2[



p
p
sso
pVtdVpV
Fig- Voltage Waveform of Multiple Pulse Width Modulation
method
Sinusoidal pulse-width modulation
The number of pulses per half cycle
depends on carries frequency and width of each
pulse is varied in proportion to the amplitude of
sine wave. The gating signals are generated by
comparing sinusoidal wave as reference signal with
a triangular reference signal. Harmonic content is
reducing in this technique.
The rms output voltage can be varied by
varying the modulation index M.
If δm is the width of mth pulse the rms output
voltage



p
m
mso
VV
2
1
2/1
)/( 
0 0.002 0.004 0.006 0.008 0.01
-100
-50
0
50
100
Time
Voltage
0 0.002 0.004 0.006 0.008 0.01
-100
-50
0
50
100
Time
Voltage
Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 19|P a g e
Fig- Voltage Waveform of SPWM method
Fig- FFT analysis of SPWM Technique
IV. SELECTIVE HARMONIC
ELIMINATION METHOD
In this technique sinusoidal wave is
compared with a constant. Intersection points of
sinusoidal wave n constant generate the gate signal.
This gate signal is given to trigger the
IGBT/MOSFET. SHE technique contains
transcendental equation which can be solved by
This method is used to find the switching
angles. The switching angles lie between 0 to
2/ producing fundamental voltage with
elimination of 5th
& 7th
harmonic component. The
N-R method is basically based on trial and error
method with random initial guess and modulation
index m1 for which solution exists. Initial guess
ranges from 0 to 2/ and switching angles along
with the error are computed for complete range of
m1 by increasing its value in small steps (let
0.0001).
Algorithm for N-R method is given as
1) Assume any random initial guess for switching
angles (say 0
 ) such as 0 2/21
  .
2) Set m1
= 0.
3) Calculate F( 0
 ), B(m1
) and Jacobian J( 0
 ).s
4) Compute  during the iteration using
following equation,
)).()()(( 010
1
 FmBJ 

5) Update the switching angles i.e.
).()()1( kkk  
6) To bring switching angles in range solve the
following equation
)))).1((cos((cos)1(
1


kabsk 
7) Repeat steps (3) to (6) for number of iterations
to attain error goal.
8) Increment m1
by a fixed step.
9) Repeat steps (2) to (8) for range of m1
.
10) Plot the switching angle as a function of m1
and different solution sets would be obtained.
11) Take one solution sets at a time and compute
complete solutions set for the range of m1
,
where it exists.
The output equation with switching angles


/4
)]cos(..)cos()cos()[cos(/4
max1
1321
dc
sdc
sVV
where
VV


Modulation index is given as
dc
sVVm 4/11

Fig- Voltage waveform of SHE technique
By using the algorithm of N-R method
switching angles is calculated. With respect to
these switching angles respective THD and 3rd
harmonic is also calculated. These switching angles
and harmonic are shown in below table.
0 0.02 0.04 0.06 0.08 0.1
-100
-50
0
50
100
Time
Voltage
0 2 4 6 8 10 12 14 16 18 20
0
5
10
15
20
25
30
35
Harmonic order
Fundamental (50Hz) = 117.65 , THD= 78.00%
Mag(%ofFundamental)
0 0.02 0.04 0.06 0.08 0.1
-100
-50
0
50
100
Time
Voltage
Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com
ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20
www.ijera.com 20|P a g e
TABLE 1- Switching Angles and % of Harmonics
M Switching
angle(deg)
3rd
Harmonic
%
THD
%
0.8 29.475 0.30 31.17
By inserting notches at a particular instant,
total THD is reduced to 31.17%.
0 2 4 6 8 10 12 14 16 18 20
0
5
10
15
20
Harmonic order
Fundamental (50Hz) = 109.9 , THD= 31.17%
Mag(%of
Fundamental)
Fig- FFT analysis of SHE Technique
Comparison of PWM Techniques And She
Technique
V. CONCLUSION
The results obtained from simulation of
MATLAB/Simulink shows that the harmonic THD
contents and also third, fifth and seventh harmonics
are within 3% tolerance and other higher order
harmonics are eliminated by filter. From above
comparison of PWM Technique and SHE-PWM
Technique we can conclude that SHE-PWM
technique contains less % of harmonic compared to
other PWM techniques.
REFERENCES
[1]. S.Kouro, M. Malinowski, K Gopakumar ,
J. Pou, L.G. Franquelo, Wu Bin ; J
Rodriguez, M.A Pérez, J.I.Leon, “ Recent
Advances and Industrial Applications of
Multilevel Converters”, IEEE Trans on
Industrial Electronics, Vol 57 , Issue: 8, ,
Page(s): 2553 – 2580, 2010
[2]. T.A. Meynard, H. Foch, P. Thomas, J.
Courault, R. Jakob, and M. Nahrstaedt, “
Multicell Converters: Basic concepts and
Industry applications”, IEEE Trans on
Industial Application, Vol.49, No. 5, pp
955-964, Oct.2002.
[3]. Mariusz Malinowski, K. Gopakumar,
Jose Rodriguez, Marcelo A. Pérez, “A
Survey on Cascaded Multilevel Inverters”,
IEEE Trans on Industrial Electronics.,
Vol. 57, No. 7, July 2010.
[4]. J. Rodriguez, J.S. lai, and F.Z. Peng, “
Multilevel Inverters: A Survey of
topologies, controls , and applications”,
IEEE Trans on Industrial Electronics, Vol.
49, No. 4, pp 724-738, Aug 2002.
[5]. Jose Rodriguez,Steffen Bernet, Peter K.
Steimer, Ignacio E. Lizama, “A Survey on
Neutral-Point-Clamped Inverters”, IEEE
Trans on Industrial Electronics Vol. 57,
No. 7, July 2010.
[6]. K. Corzine and Y. Familiant, “A new
cascaded multilevel H-bridge drive,”
IEEE Trans on Power Electron., Vol. 17,
No. 1, pp. 125–131, Jan. 2002.
[7]. Jing Huang; K.A. Corzine, “Extended
Operation of Flying Capacitor Multilevel
Inverters”, IEEE Trans on Industrial
Electronics Vol. 21, Issue 1, pp. 140 –
147, 2006.
[8]. Jagdish Kumar, Biswarup Das and
Pramod Agarwal, “Selective Harmonic
Elimination Technique for a Multilevel
Inverter,” Fifteenth National Power
Systems Conference (NPSC), IIT
Bombay, December 2008.
[9]. Muhammad H. Rashid, “Power
Electronics Circuits, Devices and
Applications”.

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Comparison of PWM Techniques and Selective Harmonic Elimination for 3-Level Inverter

  • 1. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20 www.ijera.com 16|P a g e Comparison of PWM Techniques and Selective Harmonic Elimination for 3-Level Inverter Ms. Surabhi Patil1 , Mrs. Sarika D Patil2 , Prof. Prashant Debre3 1 Rajiv Gandhi College of Engineering & Research, Nagpur, India 2 Department of Electrical Engineering Rajiv Gandhi College of Engineering & Research, Nagpur, India 3 Department of Electrical Engineering Rajiv Gandhi College of Engineering & Research, Nagpur, India ABSTRACT In this paper comparison of Selective Harmonic Elimination (SHE) method with different Pulse Width Modulation (PWM) technique which are used as gate pulse for firing the IGBT‟s. Higher order harmonics are easily eliminated by selecting a proper tuned value filters but lower order harmonics such as 3rd, 5th, 7th, and 9th are not easily eliminated. This paper includes Newton- Rapson method with random initial guess is used for SHE reduction and shows where the solution can exit by solving transcendental non linear equations. With the use of this method lower order harmonics as well as Total Harmonic Distortion (THD) will get reduce. In this paper a cascaded H-bridge Multilevel Inverter using MATLAB/Simulink blocks is presented. Keywords-Flexible AC Transmission System, Multilevel Inverter, Power Electronics, Selective Harmonic Elimination, SPWM-Sinusoidal Pulse Width Modulation I. INTRODUCTION Multilevel Inverter is most popular power electronics converters and is widely used in many industrial applications, where the requirement is medium voltage and high power applications. These are widely used in chemical, oil, and liquefied natural gas plants, water plants, marine propulsion, power generation, energy transmission, and power- quality devices, FACTS Devices [1-3]. Here, Cascaded H-bridge converter topology is used and particularly useful for renewable energy and DSTATCOM applications [4-5], [9]. While in comparison with l two-level voltage source inverters, multilevel inverters have several advantages. The main advantage is that of its stepwise output voltage. This advantage results in higher power quality, lower switching losses, higher voltage capability, it has low distortion, and low dv/dt and can operate with a lower switching frequency. With several number of dc voltages as inputs desired output can be obtained from multilevel inverter. By increasing the number of levels the output voltage and current waveform approaches to the sinusoidal waveform. Different topologies, control strategies and modulation techniques used for multilevel inverters have been presented in [6-7]. The generalized formulation of Selective Harmonic Elimination of multilevel inverter is presented in literature recently. SHE involves nonlinear equations which can be solved by different methods like Newton Rapson, genetic algorithm, particle swarm optimization, bee algorithm and bacterial foraging. This paper involves solving of nonlinear equations by using Newton-Rapson method and MATLAB/Simulink. II. REVIEW OF GENERALIZED SHE FOR MULTILEVEL INVERTER The A multilevel cascade inverter consists a number of H-bridge cells that are connected in series per phase, and each module needs separate DC source for generation of voltage levels at the output of inverter. +Vdc In1, In4 ON Vout = 0 In1, In3 ON ... (1) -Vdc In2, In3 ON The switching inputs shown as Si, i=1 to 4 in the Fig. 1 allows obtaining output voltage as per (1). The H-bridge cells are serially connected over AC outputs to obtain expanded phase voltage levels. Cascade Multilevel Inverter (CMLI) is one of the most important topology. RESEARCH ARTICLE OPEN ACCESS
  • 2. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20 www.ijera.com 17|P a g e Fig.1 Cascaded H-Bridge Multilevel Inverter As compared to diode-clamped and flying capacitors it requires least number of components. The minimum number of levels and the voltage rating of the active devices (IGBTs, GTOs, power MOSFETs, etc.) are inversely proportional to each other. A higher voltage rating of the devices will require minimum number of levels and vice versa. The cascaded multilevel inverter consists of a number of H-bridge inverter units which require separate dc source for each unit and is connected in cascade as shown in Fig. 1. The output voltage levels as seen from Fig. 2. m = 2s + 1 …….. (2) Switching devices = 2(m-1) DC Bus capacitors = (m-1)/2……. (3) Where„s‟ is the number of bridges, „m‟ is the number of levels. The Fourier series expansion of the general multilevel stepped output voltage is given in (4), where n is the harmonic number of the output voltage of inverter. 𝑉 𝑤𝑡 = 𝑉𝑛 sin(𝑛𝑤𝑡)∞ 𝑛=1 ………………(4) Where 𝑉 𝑛 = 4𝑉𝑑𝑐 𝑛𝜋 cos 𝑛𝜃𝑖 𝑓𝑜𝑟 𝑜𝑑𝑑 𝑛𝑠 0 𝑓𝑜𝑟 𝑒𝑣𝑒𝑛 𝑛𝑠 ∞ 𝑛=1 Fig. 2 Output voltage waveform of 7-level Cascaded Multilevel Inverter The switching angles can be chosen so that minimum voltage harmonics is obtained. Normally, these angles are chosen so as to reduce lower frequency harmonics. The selective harmonic elimination method is also called fundamental switching frequency method based on the harmonic elimination theory proposed in this paper. The major difficulty for selective harmonic elimination methods is to include the fundamental switching frequency method and methods to solve the transcendental equations for switching angles. To obtain fundamental voltage and to eliminate 5th and 7th harmonics, three nonlinear equations are as follows. 𝑉1 = 4𝑉𝑑𝑐 𝜋 cos 𝜃1 + cos 𝜃2 + cos 𝜃3 = 𝑉1 ∗ …......... (5) 𝑉5 = 4𝑉𝑑𝑐 5𝜋 cos 5𝜃1 + cos 5𝜃2 + cos 5𝜃3 = 0 …………. (6) 𝑉7 = 4𝑉𝑑𝑐 7𝜋 cos 7𝜃1 + cos 7𝜃2 + cos 7𝜃3 = 0 ……… (7) Subject to 0 < 𝜃1 < 𝜃2 < 𝜃3 < π 2 These equations are nonlinear transcendental equations are solved by Newton- Raphson method using Random Initial Guess, as the solution doesn‟t depend upon the guess. This paper presents a multilevel inverter model with mathematical model for SPWM modulator to minimize THD. III. DIFFERENT TOPOLOGIES OF PWM METHOD PWM methods are classified in three parts 1) Single-pulse-width modulation. 2) Multiple-pulse-width modulation. 3) Sinusoidal pulse-width modulation.
  • 3. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20 www.ijera.com 18|P a g e Single pulse width modulation Single pulse width modulation involves only one pulse per half cycle and the width is varied to control inverter output voltage. The gating signals are generated by comparing a rectangle reference signal with a triangular reference signal. Fig shows generation of gating signals:- Fig- Gate pulse generation of Single Pulse Width Modulation Fig. 3 Voltage waveform of single pulse width modulation method Voltage Equations Modulation index is given as AcArM / The rms output voltage can be found from     2/)( 2/)( 1 2/12 1 /)](2/2[    VtdVVo By varying Ar from 0 to Ac, pulse width δ can be modified from 0 to 180 and the rms output voltage Vo from 0 to Vs. Multiple-pulse-width modulation Multiple-pulse-width modulation multiple pulse per half cycle is used. The gating signals are generated by comparing reference signal with a triangular reference signal. Harmonic content is reducing in this technique. Fig shows generation of gating signals:- Fig- Gate pulse generation of Multiple Pulse Width Modulation Voltage Equations The number of pulses per half cycle is given as 2/2/ roc mffp  Where ocf ffm / The rms output voltage can be found from     2/)/( 2/)/( 2/12 /)](2/2[    p p sso pVtdVpV Fig- Voltage Waveform of Multiple Pulse Width Modulation method Sinusoidal pulse-width modulation The number of pulses per half cycle depends on carries frequency and width of each pulse is varied in proportion to the amplitude of sine wave. The gating signals are generated by comparing sinusoidal wave as reference signal with a triangular reference signal. Harmonic content is reducing in this technique. The rms output voltage can be varied by varying the modulation index M. If δm is the width of mth pulse the rms output voltage    p m mso VV 2 1 2/1 )/(  0 0.002 0.004 0.006 0.008 0.01 -100 -50 0 50 100 Time Voltage 0 0.002 0.004 0.006 0.008 0.01 -100 -50 0 50 100 Time Voltage
  • 4. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20 www.ijera.com 19|P a g e Fig- Voltage Waveform of SPWM method Fig- FFT analysis of SPWM Technique IV. SELECTIVE HARMONIC ELIMINATION METHOD In this technique sinusoidal wave is compared with a constant. Intersection points of sinusoidal wave n constant generate the gate signal. This gate signal is given to trigger the IGBT/MOSFET. SHE technique contains transcendental equation which can be solved by This method is used to find the switching angles. The switching angles lie between 0 to 2/ producing fundamental voltage with elimination of 5th & 7th harmonic component. The N-R method is basically based on trial and error method with random initial guess and modulation index m1 for which solution exists. Initial guess ranges from 0 to 2/ and switching angles along with the error are computed for complete range of m1 by increasing its value in small steps (let 0.0001). Algorithm for N-R method is given as 1) Assume any random initial guess for switching angles (say 0  ) such as 0 2/21   . 2) Set m1 = 0. 3) Calculate F( 0  ), B(m1 ) and Jacobian J( 0  ).s 4) Compute  during the iteration using following equation, )).()()(( 010 1  FmBJ   5) Update the switching angles i.e. ).()()1( kkk   6) To bring switching angles in range solve the following equation )))).1((cos((cos)1( 1   kabsk  7) Repeat steps (3) to (6) for number of iterations to attain error goal. 8) Increment m1 by a fixed step. 9) Repeat steps (2) to (8) for range of m1 . 10) Plot the switching angle as a function of m1 and different solution sets would be obtained. 11) Take one solution sets at a time and compute complete solutions set for the range of m1 , where it exists. The output equation with switching angles   /4 )]cos(..)cos()cos()[cos(/4 max1 1321 dc sdc sVV where VV   Modulation index is given as dc sVVm 4/11  Fig- Voltage waveform of SHE technique By using the algorithm of N-R method switching angles is calculated. With respect to these switching angles respective THD and 3rd harmonic is also calculated. These switching angles and harmonic are shown in below table. 0 0.02 0.04 0.06 0.08 0.1 -100 -50 0 50 100 Time Voltage 0 2 4 6 8 10 12 14 16 18 20 0 5 10 15 20 25 30 35 Harmonic order Fundamental (50Hz) = 117.65 , THD= 78.00% Mag(%ofFundamental) 0 0.02 0.04 0.06 0.08 0.1 -100 -50 0 50 100 Time Voltage
  • 5. Ms. Surabhi Patil. Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 6, Issue 4, (Part - 5) April 2016, pp.16-20 www.ijera.com 20|P a g e TABLE 1- Switching Angles and % of Harmonics M Switching angle(deg) 3rd Harmonic % THD % 0.8 29.475 0.30 31.17 By inserting notches at a particular instant, total THD is reduced to 31.17%. 0 2 4 6 8 10 12 14 16 18 20 0 5 10 15 20 Harmonic order Fundamental (50Hz) = 109.9 , THD= 31.17% Mag(%of Fundamental) Fig- FFT analysis of SHE Technique Comparison of PWM Techniques And She Technique V. CONCLUSION The results obtained from simulation of MATLAB/Simulink shows that the harmonic THD contents and also third, fifth and seventh harmonics are within 3% tolerance and other higher order harmonics are eliminated by filter. From above comparison of PWM Technique and SHE-PWM Technique we can conclude that SHE-PWM technique contains less % of harmonic compared to other PWM techniques. REFERENCES [1]. S.Kouro, M. Malinowski, K Gopakumar , J. Pou, L.G. Franquelo, Wu Bin ; J Rodriguez, M.A Pérez, J.I.Leon, “ Recent Advances and Industrial Applications of Multilevel Converters”, IEEE Trans on Industrial Electronics, Vol 57 , Issue: 8, , Page(s): 2553 – 2580, 2010 [2]. T.A. Meynard, H. Foch, P. Thomas, J. Courault, R. Jakob, and M. Nahrstaedt, “ Multicell Converters: Basic concepts and Industry applications”, IEEE Trans on Industial Application, Vol.49, No. 5, pp 955-964, Oct.2002. [3]. Mariusz Malinowski, K. Gopakumar, Jose Rodriguez, Marcelo A. Pérez, “A Survey on Cascaded Multilevel Inverters”, IEEE Trans on Industrial Electronics., Vol. 57, No. 7, July 2010. [4]. J. Rodriguez, J.S. lai, and F.Z. Peng, “ Multilevel Inverters: A Survey of topologies, controls , and applications”, IEEE Trans on Industrial Electronics, Vol. 49, No. 4, pp 724-738, Aug 2002. [5]. Jose Rodriguez,Steffen Bernet, Peter K. Steimer, Ignacio E. Lizama, “A Survey on Neutral-Point-Clamped Inverters”, IEEE Trans on Industrial Electronics Vol. 57, No. 7, July 2010. [6]. K. Corzine and Y. Familiant, “A new cascaded multilevel H-bridge drive,” IEEE Trans on Power Electron., Vol. 17, No. 1, pp. 125–131, Jan. 2002. [7]. Jing Huang; K.A. Corzine, “Extended Operation of Flying Capacitor Multilevel Inverters”, IEEE Trans on Industrial Electronics Vol. 21, Issue 1, pp. 140 – 147, 2006. [8]. Jagdish Kumar, Biswarup Das and Pramod Agarwal, “Selective Harmonic Elimination Technique for a Multilevel Inverter,” Fifteenth National Power Systems Conference (NPSC), IIT Bombay, December 2008. [9]. Muhammad H. Rashid, “Power Electronics Circuits, Devices and Applications”.