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07-06-2021 Arpan Deyasi, RCCIIT, India 1
Carbon Nanotube Field
Effect Transistor
Arpan Deyasi
RCCIIT, India
Setback of MOSFET
07-06-2021 Arpan Deyasi, RCCIIT, India 2
Continuous downscaling of MOSFET leads to ……………………
➢ Short-channel effect
➢ Higher leakage current
➢ Closeness of ON and OFF level in digital circuit due to reduction of
saturation current at higher rate compared with reduction rate of
threshold voltage
➢ Excessive variation of process technology
07-06-2021 Arpan Deyasi, RCCIIT, India 3
Solutions to Overcome
➢ High-K dielectric, highly conductive gate electrode,
different substrate material replacing Si
➢ Novel geometries
➢ New architectures
Why MOSFET can be replaced via CNTFET?
1-D ballistic transport of electrons and holes
High drive current and large transconductance
High temperature resilience and strong covalent bond
Comparison with MOSFET
Switching takes place in MOSFET by altering channel resistivity, but for
CNTFET, it occurs through modulation of channel resistance
Higher drive currents of CNTFET compared with MOSFET
Higher transconductance
Higher carrier mobility
Higher gate capacitance leads to improved carrier transport, which provides
better ON-current performance
Coaxial Gate
Classification of CNTFET
Based on geometry
MOSFET
Based on operation
CNTFET
Top Gate Bottom Gate Schottky barrier
Bottom-gate CNTFET
Metal contact for back side
Silicon Oxide Substrate
Source Drain
CNT
Bottom-gate CNTFET
Preliminary CNTFET
❑ high on-state resistance
❑ low transconductance
❑ no current saturation
❑ required high gate voltages to turn ON
Top gate CNTFET
Substrate Doped Silicon
Insulator
Source Drain
CNT
Top Gate
Gate Dielectric
07-06-2021 Arpan Deyasi, RCCIIT, India 10
Improved architecture than bottom-gate CNTFET
Top gate CNTFET
❑ better subthreshold slope
❑ Higher transconductance
❑ negligible hysteresis in terms of threshold voltage shift
Coaxial gate CNTFET
Better electrostatic control over channel
Drain Source
Gate
Schottky Barrier CNTFET
Gate
Gate
Source
Drain
CNT
Dielectric
Dielectric
07-06-2021 Arpan Deyasi, RCCIIT, India 13
SB-CNFET works on the principle of direct tunneling through the Schottky
barrier at the source channel junction
The barrier width is controlled by the gate voltage and hence the
transconductance of the device depends on the gate voltage
Schottky Barrier CNTFET
At low gate bias, large barrier limits the current in the channel . As gate bias is
increased, it reduces the barrier width, which increases quantum mechanical
tunneling through the barrier , and therefore increases current flow in transistor
channel
In SBCNFET, the transistor action occurs by modulating the transmission coefficient
of the device
MOSFET like CNTFET
overcome problems in SB-CNFET by operating like normal MOSFET
operates on the principle of modulation the barrier height by gate
voltage application
Drain current is controlled by number of charge that is induced in
the channel by gate terminal
GS GC CS
  
= +
ΦGS: work function difference between gate and substrate
ΦGC: work function difference between gate and carbon nanotube channel
ΦCS: work function difference between carbon nanotube channel
and substrate
I-V characteristic
,
1
cnt
GB cnt s fb
ox
Q
V V
C

= − +
Potential balance equation
VGB: gate-to-body bias
Ψcnt,s: potential at interface of gate oxide and carbon nanotube channel
Qcnt: total charge in carbon nanotube
Vfb: flatband voltage
Cox1: oxide capacitance at front-gate
I-V characteristic
1
1
1 1 1
2
2
2
ln
ox
ox
ox ox ox
l
C
t r t t r
r

=
 
+ + +
 
 
 
tox1: gate oxide thickness at front surface
l: channel length
r: channel radius
I-V characteristic
Using carrier concentration modeling and charge modeling equations
, ,
( , )
GB cnt s cnt s CB fb
V f V V
  
= + +
VCB: channel to back-gate bias
I-V characteristic
( )
, 0
, 2 2
, 0
( )
exp
( , )
F C cnt s cb
B
cnt s cb
F cnt s cb C
B
E E q V
I
k T
f V
E q qV q E
k T
 

 
  − + − −
 
  
 



= 
 + − − −





for ψcnt,s<(VCB+φ0)
for ψcnt,s>=(VCB+φ0)
1
C
ox
qlN
C
 =
I-V characteristic
, 0
, 0
( (0)
ln 1 exp
( ( )
ln 1 exp
F C cnt s SB
B
B
DS
F C cnt s DB
B
E E q V
k T
qk T
I
h E E q l V
k T
 
  
 
 
 − + − −
 
+
 
 
 
 
 
 
 
=  
 
 − + − −
 
 
− +
 
 
 
 
 
 
 
I-V characteristic
07-06-2021 Arpan Deyasi, RCCIIT, India 21
Comparison of n-FET and p-FET
Palladium (Pd) is the best contact metal found for p-FETS (no Schottky
Barrier at the interface)
Aluminium is used to create near Ohmic contacts with the SNT in n-FET
Small SBs exist at the interface between Al and CNT
Overall performance of p-FET is better than n-FETS
07-06-2021 Arpan Deyasi, RCCIIT, India 22
Advantage of CNTFET
Better control over channel formation
Higher transconductance
Lower threshold voltage
Lower subthreshold slope
Higher electron mobility
Higher current density
Applications of CNTFET
Memory design
Biosensor
RF circuits
Interconnect with very low loss: Logic circuits: multiple level interconnects
with negligible parasitic effects
Energy source in battery and solar cell
07-06-2021 Arpan Deyasi, RCCIIT, India 24
Drawbacks of CNTFET
Higher production cost owing to difficulties in mass production
Defect and failure rate at device and circuit level is higher than traditional
CMOS based circuits
Degrades when exposed to Oxygen, which decreases its lifetime

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CNTFET

  • 1. 07-06-2021 Arpan Deyasi, RCCIIT, India 1 Carbon Nanotube Field Effect Transistor Arpan Deyasi RCCIIT, India
  • 2. Setback of MOSFET 07-06-2021 Arpan Deyasi, RCCIIT, India 2 Continuous downscaling of MOSFET leads to …………………… ➢ Short-channel effect ➢ Higher leakage current ➢ Closeness of ON and OFF level in digital circuit due to reduction of saturation current at higher rate compared with reduction rate of threshold voltage ➢ Excessive variation of process technology
  • 3. 07-06-2021 Arpan Deyasi, RCCIIT, India 3 Solutions to Overcome ➢ High-K dielectric, highly conductive gate electrode, different substrate material replacing Si ➢ Novel geometries ➢ New architectures
  • 4. Why MOSFET can be replaced via CNTFET? 1-D ballistic transport of electrons and holes High drive current and large transconductance High temperature resilience and strong covalent bond
  • 5. Comparison with MOSFET Switching takes place in MOSFET by altering channel resistivity, but for CNTFET, it occurs through modulation of channel resistance Higher drive currents of CNTFET compared with MOSFET Higher transconductance Higher carrier mobility Higher gate capacitance leads to improved carrier transport, which provides better ON-current performance
  • 6. Coaxial Gate Classification of CNTFET Based on geometry MOSFET Based on operation CNTFET Top Gate Bottom Gate Schottky barrier
  • 7. Bottom-gate CNTFET Metal contact for back side Silicon Oxide Substrate Source Drain CNT
  • 8. Bottom-gate CNTFET Preliminary CNTFET ❑ high on-state resistance ❑ low transconductance ❑ no current saturation ❑ required high gate voltages to turn ON
  • 9. Top gate CNTFET Substrate Doped Silicon Insulator Source Drain CNT Top Gate Gate Dielectric
  • 10. 07-06-2021 Arpan Deyasi, RCCIIT, India 10 Improved architecture than bottom-gate CNTFET Top gate CNTFET ❑ better subthreshold slope ❑ Higher transconductance ❑ negligible hysteresis in terms of threshold voltage shift
  • 11. Coaxial gate CNTFET Better electrostatic control over channel Drain Source Gate
  • 13. 07-06-2021 Arpan Deyasi, RCCIIT, India 13 SB-CNFET works on the principle of direct tunneling through the Schottky barrier at the source channel junction The barrier width is controlled by the gate voltage and hence the transconductance of the device depends on the gate voltage Schottky Barrier CNTFET At low gate bias, large barrier limits the current in the channel . As gate bias is increased, it reduces the barrier width, which increases quantum mechanical tunneling through the barrier , and therefore increases current flow in transistor channel In SBCNFET, the transistor action occurs by modulating the transmission coefficient of the device
  • 14. MOSFET like CNTFET overcome problems in SB-CNFET by operating like normal MOSFET operates on the principle of modulation the barrier height by gate voltage application Drain current is controlled by number of charge that is induced in the channel by gate terminal
  • 15. GS GC CS    = + ΦGS: work function difference between gate and substrate ΦGC: work function difference between gate and carbon nanotube channel ΦCS: work function difference between carbon nanotube channel and substrate I-V characteristic
  • 16. , 1 cnt GB cnt s fb ox Q V V C  = − + Potential balance equation VGB: gate-to-body bias Ψcnt,s: potential at interface of gate oxide and carbon nanotube channel Qcnt: total charge in carbon nanotube Vfb: flatband voltage Cox1: oxide capacitance at front-gate I-V characteristic
  • 17. 1 1 1 1 1 2 2 2 ln ox ox ox ox ox l C t r t t r r  =   + + +       tox1: gate oxide thickness at front surface l: channel length r: channel radius I-V characteristic
  • 18. Using carrier concentration modeling and charge modeling equations , , ( , ) GB cnt s cnt s CB fb V f V V    = + + VCB: channel to back-gate bias I-V characteristic
  • 19. ( ) , 0 , 2 2 , 0 ( ) exp ( , ) F C cnt s cb B cnt s cb F cnt s cb C B E E q V I k T f V E q qV q E k T        − + − −           =   + − − −      for ψcnt,s<(VCB+φ0) for ψcnt,s>=(VCB+φ0) 1 C ox qlN C  = I-V characteristic
  • 20. , 0 , 0 ( (0) ln 1 exp ( ( ) ln 1 exp F C cnt s SB B B DS F C cnt s DB B E E q V k T qk T I h E E q l V k T           − + − −   +               =      − + − −     − +               I-V characteristic
  • 21. 07-06-2021 Arpan Deyasi, RCCIIT, India 21 Comparison of n-FET and p-FET Palladium (Pd) is the best contact metal found for p-FETS (no Schottky Barrier at the interface) Aluminium is used to create near Ohmic contacts with the SNT in n-FET Small SBs exist at the interface between Al and CNT Overall performance of p-FET is better than n-FETS
  • 22. 07-06-2021 Arpan Deyasi, RCCIIT, India 22 Advantage of CNTFET Better control over channel formation Higher transconductance Lower threshold voltage Lower subthreshold slope Higher electron mobility Higher current density
  • 23. Applications of CNTFET Memory design Biosensor RF circuits Interconnect with very low loss: Logic circuits: multiple level interconnects with negligible parasitic effects Energy source in battery and solar cell
  • 24. 07-06-2021 Arpan Deyasi, RCCIIT, India 24 Drawbacks of CNTFET Higher production cost owing to difficulties in mass production Defect and failure rate at device and circuit level is higher than traditional CMOS based circuits Degrades when exposed to Oxygen, which decreases its lifetime