The document outlines the challenges and solutions related to on-chip interconnect buses in System on Chip (SoC) architectures, emphasizing the need for a common framework in the upstream Linux kernel. It proposes a new interconnect framework with vendor-specific drivers and a consumer API for managing data flow and resource allocation effectively. Future work includes incorporating feedback for enhancements, exploring additional Quality of Service (QoS) constraints, and extending support for specific interconnect drivers.

1. Bus scaling QoS update
Georgi Djakov

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Agenda
● Background
● The problem
● The solution
● Next steps

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Background
● Challenges of SoC architecture
○ More and more features (IP cores)
○ Many components talking to each other
○ Multiple sources of traffic
○ Concurrent transfers
○ Predictability
● Evolution of on-chip interconnects
○ Buses, crossbars, network-on-chip
● Benefits
○ Scalability - packet communication
○ Power efficiency - shorter wires

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An example NoC topology

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The problem
● On-chip interconnect buses can handle high throughput
data transfers, but most of the time they may be idle.
● Simultaneous data flows across the SoC with different
sources and destinations, interleaved traffic.
● Interconnect buses can be configured according to the
use-case and demand.
● Each SoC vendor has its own custom implementation in
the downstream kernel.
● Need a common solution in the upstream Linux kernel.

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Requirements
● Description of the topology.
● Expose path between endpoints as resources. The path is claimed by
consumer drivers and they set constraints on it.
● A common framework for that can traverse the topology and allow a consumer
driver to get() a path.
● Track and aggregate requests received from drivers.
● Update constraints and set hardware to most optimal configuration.
● The vendor specific interconnect controller drivers register the topology with
the framework and implements low-level operations.

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The solution
● A new framework - interconnect framework
● Vendor specific low-level drivers that control the hardware
● Consumer API to set constraints from drivers

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Device-Tree binding
● Interconnect provider
snoc: snoc@0580000 {
compatible = "qcom,msm-bus-snoc";
#interconnect-cells = <1>;
interconnect-port = <&bimc MAS_SNOC_CFG>,
<&bimc SNOC_BIMC_0_MAS>,
<&bimc SNOC_BIMC_1_MAS>,
<&pnoc SNOC_PNOC_SLV>;

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Device-Tree binding
● Interconnect consumer
sdhc_1: sdhci@07824000 {
…
interconnect-port = <&pnoc MAS_PNOC_SDCC_1>;
interconnect-path = <&mem>, <&usb_otg>;
interconnect-path-names = "mem", "usb";

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Interconnect API
● struct interconnect_path *interconnect_get(struct device *dev, const char *id);
● int interconnect_set(struct interconnect_path *path, u32 bandwidth);
● void interconnect_put(struct interconnect_path *path);

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Interconnect API
● Currently works only with device-tree and platform drivers
● Use device-tree to denote path endpoints
● Types of constraints
● PM QoS

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The first vendor specific driver
● Dragonboard 410c as a test platform.
● Test scenarios
○ Data transfers between peripherals
○ Data transfers from/to memory

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Future work
● Feedback
○ LKML
○ Should we use PM QoS?
○ Remove dependency on DT
○ Support for ACPI?
○ Use integers instead of string ids for the binding
● Add support for other types of QoS constraints
○ Average bandwidth
○ Peak bandwidth
○ Round-trip latency
○ Priority
● Extend the Qualcomm msm8916 interconnect driver
○ Include the full topology
● Practical and easy example for testing

14. Thank You
#BUD17
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