This document provides an overview of Boolean algebra, which describes logical relations and operations in digital circuits. It discusses: 1) George Boole's rules that describe logical propositions as either true or false, which can represent digital circuit states of 1 or 0. 2) Basic Boolean operations like AND, OR, and NOT and how they are represented by logic gates. Truth tables show all possible input/output combinations for each gate. 3) Laws of Boolean algebra like commutativity, association, distribution, and others. Karnaugh maps provide a way to simplify Boolean expressions into sum-of-products form.

1. Boolean Algebra
Boolean algebra
Introduction
The most obvious way to simplify Boolean expressions is to manipulate them in the same way as normal
algebraic expressions are manipulated. With regards to logic relations in digital forms, a set of rules for
symbolic manipulation is needed in order to solve for the unknowns.
A set of rules formulated by the English mathematician George Boole describe certain propositions whose
outcome would be either true or false. With regard to digital logic, these rules are used to describe circuits
whose state can be either, 1 (true) or 0 (false). In order to fully understand this, the relation between
the AND gate, OR gate and NOT gate operations should be appreciated. A number of rules can be derived
from these relations as Table 1 demonstrates.
P1: X = 0 or X = 1
P2: 0 . 0 = 0
P3: 1 + 1 = 1
P4: 0 + 0 = 0
P5: 1. 1 = 1
P6: 1. 0 = 0. 1 = 0
P7: 1 + 0 = 0 + 1 = 1
Table 1: Boolean Postulates
Laws of Boolean Algebra
Table 2 shows the basic Boolean laws. Note that every law has two expressions, (a) and (b). This is known
as duality. These are obtained by changing every AND(.) to OR(+), every OR(+) to AND(.) and all 1's to
0's and vice-versa. It has become conventional to drop the . (AND symbol) i.e. A.B is written as AB.
T1 : Commutative Law
(a) A + B = B + A
(b) A B = B A
T2 : Associate Law
(a) (A + B) + C = A + (B + C)
(b) (A B) C = A (B C)
T3 : Distributive Law
(a) A (B + C) = A B + A C
(b) A + (B C) = (A + B) (A + C)
T4 : Identity Law
(a) A + A = A
(b) A A = A
T5 :
(a)
(b)
T6 : Redundance Law
(a) A + A B = A
(b) A (A + B) = A
T7 :
(a) 0 + A = A
(b) 0 A = 0
T8 :
(a) 1 + A = 1
(b) 1 A = A
T9 :
(a)
(b)
T10 :
(a)
(b)
T11 : De Morgan's Theorem
(a)
(b)
Examples
Prove T10 : (a)
(1) Algebraically:
K. Adisesha Page 1

2. Boolean Algebra
(2) Using the truth table:
Using the laws given above, complicated expressions can be simplified.
Logic gates
Digital systems are said to be constructed by using logic gates. These gates are the AND, OR, NOT,
NAND, NOR, EXOR and EXNOR gates. The basic operations are described below with the aid of truth
tables.
AND gate
The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high. A dot (.) is
used to show the AND operation i.e. A.B. Bear in mind that this dot is sometimes omitted i.e. AB
OR gate
The OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs are high. A
plus (+) is used to show the OR operation.
NOT gate
The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is also
known as an inverter. If the input variable is A, the inverted output is known as NOT A. This is also
shown as A', or A with a bar over the top, as shown at the outputs. The diagrams below show two ways
that the NAND logic gate can be configured to produce a NOT gate. It can also be done using NOR logic
gates in the same way.
NAND gate
K. Adisesha Page 2

3. Boolean Algebra
This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all
NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the
output. The small circle represents inversion.
NOR gate
This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR
gates are low if any of the inputs are high.
The symbol is an OR gate with a small circle on the output. The small circle represents inversion.
EXOR gate
The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both, of its two inputs
are high. An encircled plus sign ( ) is used to show the EOR operation.
EXNOR gate
The 'Exclusive-NOR' gate circuit does the opposite to the EOR gate. It will give a low output if either, but
not both, of its two inputs are high. The symbol is an EXOR gate with a small circle on the output. The
small circle represents inversion.
The NAND and NOR gates are called universal functions since with either one the AND and OR
functions and NOT can be generated.
Note:A function in sum of products form can be implemented using NAND gates by replacing all AND
and OR gates by NAND gates.
A function in product of sums form can be implemented using NOR gates by replacing all AND and OR
gates by NOR gates.
Table 1: Logic gate symbols
Table 2 is a summary truth table of the input/output combinations for the NOT gate together with all
possible input/output combinations for the other gate functions. Also note that a truth table with 'n' inputs
has 2n rows. You can compare the outputs of different gates.
Table 2: Logic gates representation using the Truth table
K. Adisesha Page 3

4. Boolean Algebra
Karnaugh Maps
Karnaugh maps provide a systematic method to obtain simplified sum-of-products (SOPs) Boolean
expressions. This is a compact way of representing a truth table and is a technique that is used to simplify
logic expressions. It is ideally suited for four or less variables, becoming cumbersome for five or more
variables. Each square represents either a minterm or maxterm. A K-map of n variables will have 2
squares. For a Boolean expression, product terms are denoted by 1's, while sum terms are denoted by 0's -
but 0's are often left blank. A K-map consists of a grid of squares, each square representing one canonical
minterm combination of the variables or their inverse. The map is arranged so that squares representing
minterms which differ by only one variable are adjacent both vertically and horizontally. Therefore XY'Z'
would be adjacent to X'Y'Z' and would also adjacent to XY'Z and XYZ'.
Minimization Technique
Based on the Unifying Theorem: X + X' = 1
The expression to be minimized should generally be in sum-of-product form (If necessary, the
conversion process is applied to create the sum-of-product form).
The function is mapped onto the K-map by marking a 1 in those squares corresponding to the
terms in the expression to be simplified (The other squares may be filled with 0's).
Pairs of 1's on the map which are adjacent are combined using the theorem Y(X+X') = Y where Y
is any Boolean expression (If two pairs are also adjacent, then these can also be combined using
the same theorem).
The minimization procedure consists of recognizing those pairs and multiple pairs.
o These are circled indicating reduced terms.
1 2 3
o Groups which can be circled are those which have two (2 ) 1's, four (2 ) 1's, eight (2 ) 1's,
and so on.
o Note that because squares on one edge of the map are considered adjacent to those on the
opposite edge, group can be formed with these squares.
o Groups are allowed to overlap.
The objective is to cover all the 1's on the map in the fewest number of groups and to create the
largest groups to do this.
Once all possible groups have been formed, the corresponding terms are identified.
o A group of two 1's eliminates one variable from the original minterm.
o A group of four 1's eliminates two variables from the original minterm.
o A group of eight 1's eliminates three variables from the original minterm, and so on.
o The variables eliminated are those which are different in the original minterms of the
group.
2-Variable K-Map
n any K-Map, each square represents a minterm. Adjacent squares always differ by just one literal (So that
the unifying theorem may apply: X + X' = 1). For the 2-variable case (e.g.: variables X, Y), the map can
be drawn as below. Two variable map is the one which has got only two variables as input
Example- Carry and Sum of a half adder
K. Adisesha Page 4

5. Boolean Algebra
Example- Carry and Sum of a half adder
In this example we have the truth table as input, and we have two output functions. Generally we may
have n output functions for m input variables. Since we have two output functions, we need to draw two k-
maps (i.e. one for each function). Truth table of 1 bit adder is shown below. Draw the k-map for Carry and
Sum as shown below.
X Y Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
K. Adisesha Page 5