This document summarizes a software implementation of USB (Universal Serial Bus) protocol on 8-bit AVR microcontrollers. It requires few external components and allows for low-cost USB-enabled devices. The implementation receives USB data packets through I/O pins and decodes the USB protocol in firmware to communicate with a PC. It supports low-speed USB communication through emulation of the USB protocol in microcontroller firmware.
This presentation discusses the details of the I2C protocol and interfacing of EEPROM with 8051 based on I2C protocol. It also discusses the other applications of I2C protocol
This document summarizes an internship final presentation on verifying an I2C protocol design using the Universal Verification Methodology. It describes the internship details, objectives of verifying the I2C protocol using UVM, testbench workflow, key aspects of the I2C protocol, the RTL design, UVM components used in the testbench architecture, simulation results showing the scoreboard passing two test cases for the master transmitter and receiver modes, and future applications of the I2C protocol.
The document discusses the I2C communication bus protocol. It describes the I2C bus concept of using two bi-directional lines (SDA and SCL) to allow devices with unique addresses to communicate as masters or slaves. The document outlines the I2C communication protocol including START/STOP conditions, byte format, acknowledgment, synchronization, arbitration, and 7-bit and 10-bit addressing schemes. Key aspects of the I2C bus such as typical transfer rates, hardware connections, and terminology are also summarized.
The document describes the I2C (Inter-Integrated Circuit) bus interface. I2C is a digital communication protocol used to connect integrated circuits on the same circuit board. It uses just two bidirectional open-drain lines - serial data (SDA) and serial clock (SCL). Devices on the I2C bus can operate as either a master or slave. The master device initiates and controls data transfers. Slave devices respond to the master's commands. The document outlines the electrical considerations, addressing schemes, data transfer protocols, and how to implement I2C on a PIC18F25K22 microcontroller.
The document discusses the I2C (Inter-Integrated Circuit) protocol, which is a serial communication standard used to connect low-speed peripherals to embedded systems and other devices. It describes the basic I2C protocol including data transfer methods, components, and modes. It also provides code examples from an iBoot project that implement I2C read and write functionality using registers, state machines, and GPIO interfaces.
The summary provides an overview of the key points about interfacing with the DS1307 real-time clock (RTC) chip using the I2C protocol:
1) The document discusses the I2C protocol signals and components used to interface with the DS1307 RTC, which stores time and date data.
2) It describes initializing the I2C bus, addressing the DS1307 slave device, and transmitting/receiving data to read from and write to the RTC registers.
3) The DS1307 has registers to store seconds, minutes, hours, date, and other time/date fields in BCD format and can output a square wave time signal on its SQW pin at different frequencies.
I2c protocol - Inter–Integrated Circuit Communication ProtocolAnkur Soni
This document provides an overview of the I2C communication protocol. It describes how I2C uses only two wires (SDA and SCL) to allow data transmission between an I2C master and multiple I2C slave devices. The document explains the I2C message structure, including the start condition, address frame, read/write bit, data frames, ACK/NACK bits, and stop condition. It also discusses the advantages of I2C, such as supporting multiple masters/slaves and error checking, and disadvantages like slower speeds compared to SPI. Real-life uses of I2C include connections to OLED displays, sensors, and other peripherals.
This presentation discusses the details of the I2C protocol and interfacing of EEPROM with 8051 based on I2C protocol. It also discusses the other applications of I2C protocol
This document summarizes an internship final presentation on verifying an I2C protocol design using the Universal Verification Methodology. It describes the internship details, objectives of verifying the I2C protocol using UVM, testbench workflow, key aspects of the I2C protocol, the RTL design, UVM components used in the testbench architecture, simulation results showing the scoreboard passing two test cases for the master transmitter and receiver modes, and future applications of the I2C protocol.
The document discusses the I2C communication bus protocol. It describes the I2C bus concept of using two bi-directional lines (SDA and SCL) to allow devices with unique addresses to communicate as masters or slaves. The document outlines the I2C communication protocol including START/STOP conditions, byte format, acknowledgment, synchronization, arbitration, and 7-bit and 10-bit addressing schemes. Key aspects of the I2C bus such as typical transfer rates, hardware connections, and terminology are also summarized.
The document describes the I2C (Inter-Integrated Circuit) bus interface. I2C is a digital communication protocol used to connect integrated circuits on the same circuit board. It uses just two bidirectional open-drain lines - serial data (SDA) and serial clock (SCL). Devices on the I2C bus can operate as either a master or slave. The master device initiates and controls data transfers. Slave devices respond to the master's commands. The document outlines the electrical considerations, addressing schemes, data transfer protocols, and how to implement I2C on a PIC18F25K22 microcontroller.
The document discusses the I2C (Inter-Integrated Circuit) protocol, which is a serial communication standard used to connect low-speed peripherals to embedded systems and other devices. It describes the basic I2C protocol including data transfer methods, components, and modes. It also provides code examples from an iBoot project that implement I2C read and write functionality using registers, state machines, and GPIO interfaces.
The summary provides an overview of the key points about interfacing with the DS1307 real-time clock (RTC) chip using the I2C protocol:
1) The document discusses the I2C protocol signals and components used to interface with the DS1307 RTC, which stores time and date data.
2) It describes initializing the I2C bus, addressing the DS1307 slave device, and transmitting/receiving data to read from and write to the RTC registers.
3) The DS1307 has registers to store seconds, minutes, hours, date, and other time/date fields in BCD format and can output a square wave time signal on its SQW pin at different frequencies.
I2c protocol - Inter–Integrated Circuit Communication ProtocolAnkur Soni
This document provides an overview of the I2C communication protocol. It describes how I2C uses only two wires (SDA and SCL) to allow data transmission between an I2C master and multiple I2C slave devices. The document explains the I2C message structure, including the start condition, address frame, read/write bit, data frames, ACK/NACK bits, and stop condition. It also discusses the advantages of I2C, such as supporting multiple masters/slaves and error checking, and disadvantages like slower speeds compared to SPI. Real-life uses of I2C include connections to OLED displays, sensors, and other peripherals.
I2C is a popular serial bus standard developed by Philips for connecting integrated circuits. There are three I2C standards with different speeds. The I2C bus uses two lines - one for a clock signal and one for bidirectional data. Communication on the I2C bus follows a specific protocol with defined fields for the start bit, address, read/write control bits, data, and acknowledgement bits. A master device generates the clock signal and initiates data transfers by addressing slave devices to read from or write to.
Serial peripheral Interface - Embedded System ProtocolAditya Porwal
Serial Peripheral Interface (SPI) is a synchronous serial data protocol used by micro-controllers for communicating with one or more peripheral devices quickly over short distances. It can also be used for communication between two micro-controllers.
This document provides an overview of the I2C communication protocol. It describes that I2C is a serial communication protocol used to connect slow devices like EEPROMs and ADCs. It can operate at speeds from 100 kbps to 5 Mbps and supports both single master-multi slave and multi master-multi slave configurations. The document outlines the electrical characteristics, bus features, data frame structure, data transfer process, clock synchronization, arbitration and advantages of the I2C protocol.
The document discusses the I2C protocol, which uses just two bidirectional serial data lines (SDA and SCL) to allow multiple devices to communicate on the same bus. It supports synchronous communication at various speeds up to 5 Mbps. Devices are addressed using 7- or 10-bit addresses. Data is transferred in bytes, with start and stop conditions defining the beginning and end of each transmission. All data transitions must occur when the clock signal SCL is low.
I2C is a serial communication protocol used to connect low-speed peripherals to processors and microcontrollers. It was developed by Philips in the 1980s for use in televisions. I2C uses just two bidirectional open-drain lines: serial data line (SDA) and serial clock line (SCL). Devices can operate as master or slave devices and have a 7-bit address. Communication is initiated by the master which controls the clock signal. Data is transferred in one byte packets with acknowledgement from the receiver.
This document provides an overview of the Inter-Integrated Circuit (I2C) bus. It describes the key features and evolution of I2C buses, including their simplicity, flexibility, addressing schemes, and ability to support multiple masters. The document also details the I2C bus architecture, protocol for data communication including start/stop conditions and bit transfers, and how the Microchip Master Synchronous Serial Port module is used to implement I2C functionality.
This document discusses the I2C bus which is commonly used to link microcontrollers into industrial control systems. It provides an overview of the key aspects of the I2C bus including its structure, electrical interface using an open drain configuration, physical protocol using start and stop sequences, device addressing, and typical bus transactions. The I2C bus allows for communication between processing elements that may be physically separated, enabling improved debugging and diagnosis of issues across a distributed network.
This document summarizes the key characteristics and protocol of the I2C bus, which is a serial communication protocol used in embedded systems. It operates at speeds up to 5Mbps and uses just two bidirectional open-drain lines: a serial data line and a serial clock line. The I2C protocol uses a master-slave architecture, where the master device initiates data transfers by sending a start signal and addressing a slave device to read or write data. Transfers use 7 or 10-bit addressing and are acknowledged by the slave after each byte. The protocol supports multiple masters that must synchronize clocks and arbitrate access to the data line.
I2C is a serial protocol for two-wire interface to connect low-speed devices like microcontrollers, EEPROMs, A/D and D/A converters, I/O interfaces and other similar peripherals in embedded systems. It was invented by Philips and now it is used by almost all major IC manufacturers. Each I2C slave device needs an address – they must still be obtained from NXP (formerly Philips semiconductors).
Serial communication involves transmitting data one bit at a time over a communication channel. It requires fewer cables than parallel communication and has lower costs. Serial communication uses a transmitter to convert data to a serial bit stream and a receiver to reassemble the data. Common serial interfaces for embedded systems include UART, SPI, and I2C. These interfaces are used to connect microcontrollers to devices like sensors, displays and memory.
This document discusses serial vs parallel data transfer and describes serial communication methods. It explains that serial communication requires converting data to serial bits and transmitting them one bit at a time over a single line, while parallel communication transfers all bits at once over multiple lines. It also describes synchronous and asynchronous serial communication, UART/USART chips used for serial interfaces, and registers involved in serial data transfer on the 8051 microcontroller.
SPI is a serial bus standard established by Motorola and supported in silicon products from various manufacturers.
It is a synchronous serial data link that operates in full duplex (signals carrying data go in both directions simultaneously).
Devices communicate using a master/slave relationship, in which the master initiates the data frame. When the master generates a clock and selects a slave device, data may be transferred in either or both directions simultaneously.
Slow peripheral interfaces (i2 c spi uart)PREMAL GAJJAR
The Serial Peripheral Interface or SPI bus is a synchronous serial data link, a de facto standard, named by Motorola, that operates in full duplex mode. It is used for short distance, single master communication, for example in embedded systems, sensors, and SD cards.
I²C (Inter-Integrated Circuit), pronounced I-squared-C, is a multi-master, multi-slave, single-ended, serial computer bus invented by Philips Semiconductor (now NXP Semiconductors). It is typically used for attaching lower-speed peripheral ICs to processors and microcontrollers. Alternatively I²C is spelled I2C (pronounced I-two-C) or IIC (pronounced I-I-C).
Since October 10, 2006, no licensing fees are required to implement the I²C protocol. However, fees are still required to obtain I²C slave addresses allocated by NXP.[1]
Several competitors, such as Siemens AG (later Infineon Technologies AG, now Intel mobile communications), NEC, Texas Instruments, STMicroelectronics (formerly SGS-Thomson), Motorola (later Freescale), and Intersil, have introduced compatible I²C products to the market since the mid-1990s.
SMBus, defined by Intel in 1995, is a subset of I²C that defines the protocols more strictly. One purpose of SMBus is to promote robustness and interoperability. Accordingly, modern I²C systems incorporate policies and rules from SMBus, sometimes supporting both I²C and SMBus, requiring only minimal reconfiguration.
The Serial Peripheral Interface (SPI) bus is a synchronous serial communication interface specification used for short distance communication, primarily in embedded systems. The interface was developed by Motorola and has become a de facto standard. Typical applications include sensors, Secure Digital cards, and liquid crystal displays.
SPI devices communicate in full duplex mode using a master-slave architecture with a single master. The master device originates the frame for reading and writing. Multiple slave devices are supported through selection with individual slave select (SS) lines.
Sometimes SPI is called a four-wire serial bus, contrasting with three-, two-, and one-wire serial buses. The SPI may be accurately described as a synchronous serial interface,[1] but it is different from the Synchronous Serial Interface (SSI) protocol, which is also a four-wire synchronous serial communication protocol, but employs differential signaling and provides only a single simplex communication channel.
The document discusses the Inter-Integrated Circuit (I2C) protocol. It was developed by Philips in the 1980s as a simpler way to connect peripherals in devices like TVs that previously used separate wiring for each component. I2C uses just two bidirectional lines (SCL for clock and SDA for data) and allows for multiple master and slave devices to communicate at speeds up to 3.4 Mbps using 7- or 10-bit addressing. Devices operate on a master-slave model where the master controls the bus by generating the clock signal and addressing slave devices to send or receive data.
I2c interfacing raspberry pi to arduinoMike Ochtman
A complete reference how-to guide to connect and interface a Raspberry Pi and an Arduino over I2C using Python and smbus. Including how to configure both Raspberry Pi and Arduino to start communication over TWI/I2C
Full source code and documentation at https://github.com/MikeOchtman/Pi_Arduino_I2C
PCI, PCI-X, and PCIe are different expansion slot technologies used in PCs. PCI was the first industry-wide expansion slot solution and used parallel communication. PCI-X provided higher speeds by using phase-locked clock generators. PCIe uses serial communication via point-to-point connections between devices, providing much higher maximum bandwidth than PCI. It transformed the parallel PCI bus into a serial bus architecture.
The document describes the features and operating modes of the ARM7 LPC2148 I2C block. The I2C block can operate as a master, slave, or master/slave and supports bidirectional data transfer between devices. It describes the four basic operating modes: master transmitter, master receiver, slave receiver, and slave transmitter. Each mode follows a specific data transfer format with the transmission and acknowledgement of address and data bytes.
The document discusses the USART-8251 chip, which converts parallel data to serial and vice versa. It has sections for a data bus buffer, read/write control logic, modem control, transmitter and receiver. The read/write control logic handles the control and status registers using signals like CS, C/D, WR and RD. The transmitter converts 8-bit parallel data to a serial stream, while the receiver does the opposite. The modem control signals interface with external modems. Overall, the USART-8251 chip facilitates serial communication by converting between serial and parallel formats.
I2C is a popular serial bus standard developed by Philips for connecting integrated circuits. There are three I2C standards with different speeds. The I2C bus uses two lines - one for a clock signal and one for bidirectional data. Communication on the I2C bus follows a specific protocol with defined fields for the start bit, address, read/write control bits, data, and acknowledgement bits. A master device generates the clock signal and initiates data transfers by addressing slave devices to read from or write to.
Serial peripheral Interface - Embedded System ProtocolAditya Porwal
Serial Peripheral Interface (SPI) is a synchronous serial data protocol used by micro-controllers for communicating with one or more peripheral devices quickly over short distances. It can also be used for communication between two micro-controllers.
This document provides an overview of the I2C communication protocol. It describes that I2C is a serial communication protocol used to connect slow devices like EEPROMs and ADCs. It can operate at speeds from 100 kbps to 5 Mbps and supports both single master-multi slave and multi master-multi slave configurations. The document outlines the electrical characteristics, bus features, data frame structure, data transfer process, clock synchronization, arbitration and advantages of the I2C protocol.
The document discusses the I2C protocol, which uses just two bidirectional serial data lines (SDA and SCL) to allow multiple devices to communicate on the same bus. It supports synchronous communication at various speeds up to 5 Mbps. Devices are addressed using 7- or 10-bit addresses. Data is transferred in bytes, with start and stop conditions defining the beginning and end of each transmission. All data transitions must occur when the clock signal SCL is low.
I2C is a serial communication protocol used to connect low-speed peripherals to processors and microcontrollers. It was developed by Philips in the 1980s for use in televisions. I2C uses just two bidirectional open-drain lines: serial data line (SDA) and serial clock line (SCL). Devices can operate as master or slave devices and have a 7-bit address. Communication is initiated by the master which controls the clock signal. Data is transferred in one byte packets with acknowledgement from the receiver.
This document provides an overview of the Inter-Integrated Circuit (I2C) bus. It describes the key features and evolution of I2C buses, including their simplicity, flexibility, addressing schemes, and ability to support multiple masters. The document also details the I2C bus architecture, protocol for data communication including start/stop conditions and bit transfers, and how the Microchip Master Synchronous Serial Port module is used to implement I2C functionality.
This document discusses the I2C bus which is commonly used to link microcontrollers into industrial control systems. It provides an overview of the key aspects of the I2C bus including its structure, electrical interface using an open drain configuration, physical protocol using start and stop sequences, device addressing, and typical bus transactions. The I2C bus allows for communication between processing elements that may be physically separated, enabling improved debugging and diagnosis of issues across a distributed network.
This document summarizes the key characteristics and protocol of the I2C bus, which is a serial communication protocol used in embedded systems. It operates at speeds up to 5Mbps and uses just two bidirectional open-drain lines: a serial data line and a serial clock line. The I2C protocol uses a master-slave architecture, where the master device initiates data transfers by sending a start signal and addressing a slave device to read or write data. Transfers use 7 or 10-bit addressing and are acknowledged by the slave after each byte. The protocol supports multiple masters that must synchronize clocks and arbitrate access to the data line.
I2C is a serial protocol for two-wire interface to connect low-speed devices like microcontrollers, EEPROMs, A/D and D/A converters, I/O interfaces and other similar peripherals in embedded systems. It was invented by Philips and now it is used by almost all major IC manufacturers. Each I2C slave device needs an address – they must still be obtained from NXP (formerly Philips semiconductors).
Serial communication involves transmitting data one bit at a time over a communication channel. It requires fewer cables than parallel communication and has lower costs. Serial communication uses a transmitter to convert data to a serial bit stream and a receiver to reassemble the data. Common serial interfaces for embedded systems include UART, SPI, and I2C. These interfaces are used to connect microcontrollers to devices like sensors, displays and memory.
This document discusses serial vs parallel data transfer and describes serial communication methods. It explains that serial communication requires converting data to serial bits and transmitting them one bit at a time over a single line, while parallel communication transfers all bits at once over multiple lines. It also describes synchronous and asynchronous serial communication, UART/USART chips used for serial interfaces, and registers involved in serial data transfer on the 8051 microcontroller.
SPI is a serial bus standard established by Motorola and supported in silicon products from various manufacturers.
It is a synchronous serial data link that operates in full duplex (signals carrying data go in both directions simultaneously).
Devices communicate using a master/slave relationship, in which the master initiates the data frame. When the master generates a clock and selects a slave device, data may be transferred in either or both directions simultaneously.
Slow peripheral interfaces (i2 c spi uart)PREMAL GAJJAR
The Serial Peripheral Interface or SPI bus is a synchronous serial data link, a de facto standard, named by Motorola, that operates in full duplex mode. It is used for short distance, single master communication, for example in embedded systems, sensors, and SD cards.
I²C (Inter-Integrated Circuit), pronounced I-squared-C, is a multi-master, multi-slave, single-ended, serial computer bus invented by Philips Semiconductor (now NXP Semiconductors). It is typically used for attaching lower-speed peripheral ICs to processors and microcontrollers. Alternatively I²C is spelled I2C (pronounced I-two-C) or IIC (pronounced I-I-C).
Since October 10, 2006, no licensing fees are required to implement the I²C protocol. However, fees are still required to obtain I²C slave addresses allocated by NXP.[1]
Several competitors, such as Siemens AG (later Infineon Technologies AG, now Intel mobile communications), NEC, Texas Instruments, STMicroelectronics (formerly SGS-Thomson), Motorola (later Freescale), and Intersil, have introduced compatible I²C products to the market since the mid-1990s.
SMBus, defined by Intel in 1995, is a subset of I²C that defines the protocols more strictly. One purpose of SMBus is to promote robustness and interoperability. Accordingly, modern I²C systems incorporate policies and rules from SMBus, sometimes supporting both I²C and SMBus, requiring only minimal reconfiguration.
The Serial Peripheral Interface (SPI) bus is a synchronous serial communication interface specification used for short distance communication, primarily in embedded systems. The interface was developed by Motorola and has become a de facto standard. Typical applications include sensors, Secure Digital cards, and liquid crystal displays.
SPI devices communicate in full duplex mode using a master-slave architecture with a single master. The master device originates the frame for reading and writing. Multiple slave devices are supported through selection with individual slave select (SS) lines.
Sometimes SPI is called a four-wire serial bus, contrasting with three-, two-, and one-wire serial buses. The SPI may be accurately described as a synchronous serial interface,[1] but it is different from the Synchronous Serial Interface (SSI) protocol, which is also a four-wire synchronous serial communication protocol, but employs differential signaling and provides only a single simplex communication channel.
The document discusses the Inter-Integrated Circuit (I2C) protocol. It was developed by Philips in the 1980s as a simpler way to connect peripherals in devices like TVs that previously used separate wiring for each component. I2C uses just two bidirectional lines (SCL for clock and SDA for data) and allows for multiple master and slave devices to communicate at speeds up to 3.4 Mbps using 7- or 10-bit addressing. Devices operate on a master-slave model where the master controls the bus by generating the clock signal and addressing slave devices to send or receive data.
I2c interfacing raspberry pi to arduinoMike Ochtman
A complete reference how-to guide to connect and interface a Raspberry Pi and an Arduino over I2C using Python and smbus. Including how to configure both Raspberry Pi and Arduino to start communication over TWI/I2C
Full source code and documentation at https://github.com/MikeOchtman/Pi_Arduino_I2C
PCI, PCI-X, and PCIe are different expansion slot technologies used in PCs. PCI was the first industry-wide expansion slot solution and used parallel communication. PCI-X provided higher speeds by using phase-locked clock generators. PCIe uses serial communication via point-to-point connections between devices, providing much higher maximum bandwidth than PCI. It transformed the parallel PCI bus into a serial bus architecture.
The document describes the features and operating modes of the ARM7 LPC2148 I2C block. The I2C block can operate as a master, slave, or master/slave and supports bidirectional data transfer between devices. It describes the four basic operating modes: master transmitter, master receiver, slave receiver, and slave transmitter. Each mode follows a specific data transfer format with the transmission and acknowledgement of address and data bytes.
The document discusses the USART-8251 chip, which converts parallel data to serial and vice versa. It has sections for a data bus buffer, read/write control logic, modem control, transmitter and receiver. The read/write control logic handles the control and status registers using signals like CS, C/D, WR and RD. The transmitter converts 8-bit parallel data to a serial stream, while the receiver does the opposite. The modem control signals interface with external modems. Overall, the USART-8251 chip facilitates serial communication by converting between serial and parallel formats.
Desafíos del diseño curricular por competencias copiacomunicacion.ciep
Este documento discute los desafíos del diseño curricular por competencias. Explica las tendencias hacia una sociedad del conocimiento y las implicaciones para la educación, incluyendo un aprendizaje a lo largo de la vida y basado en redes. También analiza el contexto mexicano, incluyendo problemas socioeconómicos y educativos. Finalmente, resume las tendencias nacionales hacia una mayor cobertura educativa, evaluación, investigación y un enfoque centrado en el estudiante y por competencias.
Este documento contiene varias citas y poemas sobre la importancia y el poder de los libros. Resalta cómo los libros pueden enseñar sobre el mundo, inspirar el pensamiento y el amor, y cómo la lectura puede ser una conversación entre el libro y el alma del lector.
Solving problems one Plone package at a timeMikko Ohtamaa
My lighting talk in Plone Conference 2012 presenting some Plone and Python packages we built to solve our own problems in 3 minutes. Including: Skype bot for project management, different
The document provides a summary of Irshad Ahmed's personal and professional details. It includes his contact information, marital status, education qualifications, and over 14 years of experience in civil engineering and construction projects in Saudi Arabia and Pakistan. His experience includes roles in site supervision, quality control, material testing, and laboratory supervision. He has qualifications in soil testing, asphalt, concrete, surveying, and computer software like AutoCAD and MS Office.
The document discusses high-impact entrepreneurs and their importance in driving economic growth. It finds that a small number of successful entrepreneurs can significantly influence and connect many other companies in their industry. These entrepreneurs often go on to become investors in other ventures after their own success. While there are not many high-impact entrepreneurs globally, the world does not need that many to create jobs and economic growth if they are able to build large, influential companies. Public policy should focus on supporting existing successful entrepreneurs to develop local ecosystems and inspire future generations of entrepreneurs.
Previsión en el proceso de Revenue management hoteleroHotelsdot
Este documento describe un proceso de 6 fases para la previsión hotelera como parte del proceso de gestión de ingresos. La primera fase incluye la recopilación de datos históricos como ocupación, precio medio y segmentación de clientes. La segunda fase analiza las tendencias históricas para desarrollar un calendario de demanda. La tercera fase analiza los patrones de reserva como la antelación. La cuarta fase desarrolla una curva de demanda. La quinta fase ajusta las previsiones iniciales a lo
Terraverde, LLC es una compañía de construcción y servicios profesionales con sede en Puerto Rico. Ofrece una variedad de servicios como administración de proyectos, agrimensura, arquitectura paisajista, diseño y construcción. Algunos de sus proyectos recientes incluyen la remodelación de un hogar para personas sin hogar y trabajos de construcción general y remodelación residencial y comercial. El documento proporciona detalles sobre los servicios, proyectos y personal de Terraverde.
Gabriel Páez es un actor, director, profesor y clown con amplia formación y experiencia en teatro, clown, improvisación y docencia teatral. Ha trabajado en numerosas obras de teatro, series de televisión y producciones publicitarias. También se ha desempeñado como director teatral y profesor de clown e improvisación en diversas escuelas y teatros de Buenos Aires.
Este documento resume la resolución de la Comisión de Urbanismo y Ordenación del Territorio de Extremadura para aprobar definitivamente la homologación del Proyecto de Interés Regional denominado "Complejo Turístico, de Salud, Paisajístico y de Servicios Marina Isla de Valdecañas". La resolución explica el proceso de homologación y los informes y alegaciones recibidos durante el período de información pública. Finalmente, la Comisión aprueba definitivamente la homologación del proyecto.
Este documento presenta las historias de varias personas que esperan ser atendidas en el Gran Banco Central para solicitar un crédito hipotecario. Comparten sus experiencias de vida difíciles y problemas familiares mientras pasan el día en la fila. La asesora pone muchos requisitos para completar el proceso y al final del día no atiende a más personas. Promete continuar el trámite al día siguiente si llegan temprano.
NAPTR records store communications contacts in DNS domains using ordered, typed values. In .tel domains, NAPTRs store phone numbers, email addresses, and other contact methods. They allow structuring contacts and initiating communications by selecting record types. NAPTRs' flexibility means new contact methods can be added as technologies develop, making .tel a long-term communications hub.
Multi Language Websites with TYPO3 NeosRobert Lemke
The multi language support for Neos was several years in the making. Instead of implementing a solution only focussed on translation and localization, the core team came up with a broader concept called "Content Dimensions". It not only allows you to introduce new languages with fallback scenarios but opens up a whole new way of personalising customer experience.In this talk you'll learn all about the experiences we made while creating a big customer website based on Neos Content Dimensions and how you can start creating a multi language website with Neos today.
Esta norma establece los requisitos para maíz molido, sémola, harina y gritz de maíz para consumo humano y uso industrial. Incluye requisitos de humedad, proteína, grasa, ceniza, fibra y ausencia de plagas. También especifica límites máximos de aflatoxinas y contaminantes. Los productos deben estar libres de olores objetables y cumplir con normas internacionales sobre plaguicidas.
The document discusses various topics related to USB including:
- USB standards and speeds such as USB 1.1, 2.0, 3.0, and Wireless USB.
- USB system architecture including north/south bridges and how USB fits into the system.
- USB protocol layers, descriptors, endpoints, interfaces, and common packet fields.
- USB transfer types including control, interrupt, isochronous, and bulk transfers.
- USB topology, device enumeration process, and how devices advertise their capabilities to the host through descriptors.
USB (Universal Serial Bus) is a standard connection method for devices to connect to each other and PCs. It uses 4 wires - two for power and two for differential data transmission. USB supports various transfer modes and speeds up to 480 Mbps. It allows for up to 127 devices to connect to a single host in a tiered structure using hubs. USB provides power for low-power devices and includes specifications for voltage, current limits, and cable construction.
This document provides an overview and summary of the USB standard to help readers understand its key aspects without having to read the entire 650-page specification. It discusses the various chapters and topics covered in the standard, highlighting those most relevant to hardware designers and software developers. These include device enumeration, transfer types, connector and electrical specifications. The document aims to explain USB's fundamental principles at a high level in order to develop a basic grasp of how to implement USB devices.
This document provides a summary of the USB standard, intended to help readers understand the key aspects without having to read the entire lengthy specification. It breaks down the USB standard into chapters and explains which sections are most important for designers of different USB device types to understand. The summary highlights that peripheral hardware designers especially need to understand the architectural overview, data flow model, mechanical connectors, and electrical specifications. It also introduces some of the basic concepts of USB including speeds, topology, transfer modes, and connectors.
The document provides an overview of the USB standard and its various specifications in order to help readers understand the key aspects of USB without having to read the entire lengthy standard document. It summarizes each chapter of the USB 2.0 specification, highlighting which chapters are most important for designers of USB devices, drivers, and peripherals. The document also introduces some of the essential concepts of USB including its topology, speeds, connectors, and electrical signaling.
This document analyzes the throughput characteristics of Universal Serial Bus (USB). It presents a simple analysis of USB throughput and models examples of single device throughput requirements and multiple device configurations. The analysis demonstrates the range of potential USB devices that could work when added to an existing USB configuration. Key points about USB throughput characteristics like bandwidth, overhead from protocols and bit stuffing are described.
The document describes the boards and connectivity of an Evo BSC 8200 mobile network node. It includes descriptions of the main processor board (APZ), maintenance board (APG), capacity board (EPB), Ethernet switch (NWI-E), exchange terminal (Evo ET), control boards (SCXB, CMXB), and power distribution. It also shows the logical connectivity within the BSC using multiple VLANs for internal and external connectivity.
Universal Serial Bus (USB) is an industry standard developed in the mid-1990s that defines the cables, connectors and communications protocols used in a bus for connection, communication, and power supply between computers and electronic devices.
This document provides an introduction to USB (Universal Serial Bus). It discusses the original motivations for USB including flexibility, ease of use, and high speed data transfer. It describes the different USB speeds and the star topology of the USB bus. It explains that USB uses a host-controlled model and supports up to 127 devices connected at once. The document also covers USB packets, transactions, functions, endpoints, pipes, and the different types of transfers (control, interrupt, bulk, isochronous).
This document provides an overview of the Universal Serial Bus (USB) standard. It describes the key aspects of USB including its architectural overview as a tiered star topology, electrical and mechanical characteristics of USB connectors, the USB protocol layer and packet types, USB device framework including descriptors and data transfer types, and how USB interfaces are created. The document is intended to explain the fundamental concepts and specifications that define USB.
USB 3.0, also known as SuperSpeed USB, brings significant enhancements to the USB standard including a maximum transfer rate of 5Gbps, which is about 10 times faster than the previous USB 2.0 standard. It provides backward compatibility with existing USB devices while also including new features such as increased power delivery and cable specifications to support the higher data transfer speeds. The specification defines new connector types and maintains compatibility with existing USB connectors.
The document discusses the history and features of USB technology. It explains that USB was designed to standardize connections between computers and peripherals. It has become popular due to features like plug-and-play capability, allowing up to 127 devices to connect to a single bus using a standardized interface. The document outlines the increasing speeds of USB standards over time from USB 1.0 to USB 2.0 to USB 3.0 (SuperSpeed USB), which provides transfer speeds up to 10 times faster than USB 2.0. It also describes USB 3.0's dual-bus architecture and backward compatibility.
This document discusses computer buses. It defines what a bus is and describes the key components of buses including power rails, address buses, data buses, and control lines. It explains how buses transfer data either serially or in parallel and discusses concepts like bus speed, throughput, burst rates, and sustained rates. The document also covers different types of bus architectures like AT, PCI, ISA, and EISA buses. It describes bus protocols for flow control and error checking. Finally, it distinguishes between synchronous, asynchronous, and semi-synchronous bus transfers.
Wireless Universal Serial Bus (USB) is a wireless technology that enables high-speed computer peripheral interfaces without cables. It is based on Ultra-Wideband radio and has a hub and spoke topology with the wireless USB host as the hub connected to devices. Wireless USB supports data transfer rates up to 480 Mbps within a limited range of about 3 meters and uses AES-128 encryption for security. It has power management features that allow low power consumption and is used for devices like game controllers, printers, and flash drives to provide cable-free connectivity.
The document discusses USB (Universal Serial Bus) concepts including:
- USB has a host-device model where devices can act as either host or slave. The host has a root hub and ports to connect devices.
- Devices are classified as hubs or functions. USB uses a tiered star topology with 7 tiers maximum.
- The author implemented a USB host on an Altera Cyclone V FPGA including enabling support for hubs and improving performance. Challenges included getting large file transfers and multiple devices to work reliably.
This document provides instructions for installing and configuring OpenBTS software to create an open source GSM network. It describes the necessary hardware including a computer, USRP software defined radio, and antennas. It also outlines installing GNU Radio, Boost libraries, and OpenBTS software. The configuration section explains setting parameters such as the mobile country code, network code, frequency band, and channel in the OpenBTS configuration file.
This document provides instructions for installing and configuring OpenBTS software to create an open source GSM network. It describes the necessary hardware including a computer, USRP software defined radio, and antennas. It also outlines installing GNU Radio, Boost libraries, and OpenBTS software. The configuration section explains setting parameters such as the mobile country code, network code, frequency band, and channel in the OpenBTS configuration file.
Design and Implementation of AMBA ASB apb bridgeManu BN
This document summarizes the implementation of an AMBA ASB APB bridge using Verilog HDL. It describes the key components modeled: an arbiter to determine bus access, a decoder to select bus slaves, the APB bridge interface between the ASB and APB, a reset controller, and a remap and pause controller. Finite state machines are used to control the operation of the arbiter, decoder, APB bridge, and reset controller. The bridge allows higher performance blocks like processors to connect to the ASB while lower performance peripherals connect to the lower power APB.
Thunderbolt technology has progressed to increase data transfer rates from 100Mb/s to 25Gb/s to meet bandwidth demands of 4K and higher resolution video. Thunderbolt uses active copper or optical cables to connect devices and allows daisy chaining of up to 7 devices. It utilizes protocols like PCIe and DisplayPort to transfer data at high speeds over a single cable. Key components include the Thunderbolt controller, transmitter IC, and receiver IC.
This document provides information about peripheral devices:
- It defines a peripheral as a hardware device controlled by software that is not part of the core computer architecture but expands its capabilities. Peripherals require hardware, firmware, device drivers, and available system resources.
- It discusses common consumer peripherals like printers, scanners, and mice and gives examples of business peripherals like routers and phones.
- It explains how technicians might install and configure peripheral devices, install drivers, and troubleshoot peripheral issues.
The document then provides details about specific peripheral types like serial and parallel ports, USB, FireWire, Thunderbolt, video cards, monitors, and touchscreens. It discusses the components, connections,
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!SOFTTECHHUB
As the digital landscape continually evolves, operating systems play a critical role in shaping user experiences and productivity. The launch of Nitrux Linux 3.5.0 marks a significant milestone, offering a robust alternative to traditional systems such as Windows 11. This article delves into the essence of Nitrux Linux 3.5.0, exploring its unique features, advantages, and how it stands as a compelling choice for both casual users and tech enthusiasts.
Full-RAG: A modern architecture for hyper-personalizationZilliz
Mike Del Balso, CEO & Co-Founder at Tecton, presents "Full RAG," a novel approach to AI recommendation systems, aiming to push beyond the limitations of traditional models through a deep integration of contextual insights and real-time data, leveraging the Retrieval-Augmented Generation architecture. This talk will outline Full RAG's potential to significantly enhance personalization, address engineering challenges such as data management and model training, and introduce data enrichment with reranking as a key solution. Attendees will gain crucial insights into the importance of hyperpersonalization in AI, the capabilities of Full RAG for advanced personalization, and strategies for managing complex data integrations for deploying cutting-edge AI solutions.
Pushing the limits of ePRTC: 100ns holdover for 100 daysAdtran
At WSTS 2024, Alon Stern explored the topic of parametric holdover and explained how recent research findings can be implemented in real-world PNT networks to achieve 100 nanoseconds of accuracy for up to 100 days.
Climate Impact of Software Testing at Nordic Testing DaysKari Kakkonen
My slides at Nordic Testing Days 6.6.2024
Climate impact / sustainability of software testing discussed on the talk. ICT and testing must carry their part of global responsibility to help with the climat warming. We can minimize the carbon footprint but we can also have a carbon handprint, a positive impact on the climate. Quality characteristics can be added with sustainability, and then measured continuously. Test environments can be used less, and in smaller scale and on demand. Test techniques can be used in optimizing or minimizing number of tests. Test automation can be used to speed up testing.
TrustArc Webinar - 2024 Global Privacy SurveyTrustArc
How does your privacy program stack up against your peers? What challenges are privacy teams tackling and prioritizing in 2024?
In the fifth annual Global Privacy Benchmarks Survey, we asked over 1,800 global privacy professionals and business executives to share their perspectives on the current state of privacy inside and outside of their organizations. This year’s report focused on emerging areas of importance for privacy and compliance professionals, including considerations and implications of Artificial Intelligence (AI) technologies, building brand trust, and different approaches for achieving higher privacy competence scores.
See how organizational priorities and strategic approaches to data security and privacy are evolving around the globe.
This webinar will review:
- The top 10 privacy insights from the fifth annual Global Privacy Benchmarks Survey
- The top challenges for privacy leaders, practitioners, and organizations in 2024
- Key themes to consider in developing and maintaining your privacy program
Dr. Sean Tan, Head of Data Science, Changi Airport Group
Discover how Changi Airport Group (CAG) leverages graph technologies and generative AI to revolutionize their search capabilities. This session delves into the unique search needs of CAG’s diverse passengers and customers, showcasing how graph data structures enhance the accuracy and relevance of AI-generated search results, mitigating the risk of “hallucinations” and improving the overall customer journey.
Enchancing adoption of Open Source Libraries. A case study on Albumentations.AIVladimir Iglovikov, Ph.D.
Presented by Vladimir Iglovikov:
- https://www.linkedin.com/in/iglovikov/
- https://x.com/viglovikov
- https://www.instagram.com/ternaus/
This presentation delves into the journey of Albumentations.ai, a highly successful open-source library for data augmentation.
Created out of a necessity for superior performance in Kaggle competitions, Albumentations has grown to become a widely used tool among data scientists and machine learning practitioners.
This case study covers various aspects, including:
People: The contributors and community that have supported Albumentations.
Metrics: The success indicators such as downloads, daily active users, GitHub stars, and financial contributions.
Challenges: The hurdles in monetizing open-source projects and measuring user engagement.
Development Practices: Best practices for creating, maintaining, and scaling open-source libraries, including code hygiene, CI/CD, and fast iteration.
Community Building: Strategies for making adoption easy, iterating quickly, and fostering a vibrant, engaged community.
Marketing: Both online and offline marketing tactics, focusing on real, impactful interactions and collaborations.
Mental Health: Maintaining balance and not feeling pressured by user demands.
Key insights include the importance of automation, making the adoption process seamless, and leveraging offline interactions for marketing. The presentation also emphasizes the need for continuous small improvements and building a friendly, inclusive community that contributes to the project's growth.
Vladimir Iglovikov brings his extensive experience as a Kaggle Grandmaster, ex-Staff ML Engineer at Lyft, sharing valuable lessons and practical advice for anyone looking to enhance the adoption of their open-source projects.
Explore more about Albumentations and join the community at:
GitHub: https://github.com/albumentations-team/albumentations
Website: https://albumentations.ai/
LinkedIn: https://www.linkedin.com/company/100504475
Twitter: https://x.com/albumentations
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?Speck&Tech
ABSTRACT: A prima vista, un mattoncino Lego e la backdoor XZ potrebbero avere in comune il fatto di essere entrambi blocchi di costruzione, o dipendenze di progetti creativi e software. La realtà è che un mattoncino Lego e il caso della backdoor XZ hanno molto di più di tutto ciò in comune.
Partecipate alla presentazione per immergervi in una storia di interoperabilità, standard e formati aperti, per poi discutere del ruolo importante che i contributori hanno in una comunità open source sostenibile.
BIO: Sostenitrice del software libero e dei formati standard e aperti. È stata un membro attivo dei progetti Fedora e openSUSE e ha co-fondato l'Associazione LibreItalia dove è stata coinvolta in diversi eventi, migrazioni e formazione relativi a LibreOffice. In precedenza ha lavorato a migrazioni e corsi di formazione su LibreOffice per diverse amministrazioni pubbliche e privati. Da gennaio 2020 lavora in SUSE come Software Release Engineer per Uyuni e SUSE Manager e quando non segue la sua passione per i computer e per Geeko coltiva la sua curiosità per l'astronomia (da cui deriva il suo nickname deneb_alpha).
Removing Uninteresting Bytes in Software FuzzingAftab Hussain
Imagine a world where software fuzzing, the process of mutating bytes in test seeds to uncover hidden and erroneous program behaviors, becomes faster and more effective. A lot depends on the initial seeds, which can significantly dictate the trajectory of a fuzzing campaign, particularly in terms of how long it takes to uncover interesting behaviour in your code. We introduce DIAR, a technique designed to speedup fuzzing campaigns by pinpointing and eliminating those uninteresting bytes in the seeds. Picture this: instead of wasting valuable resources on meaningless mutations in large, bloated seeds, DIAR removes the unnecessary bytes, streamlining the entire process.
In this work, we equipped AFL, a popular fuzzer, with DIAR and examined two critical Linux libraries -- Libxml's xmllint, a tool for parsing xml documents, and Binutil's readelf, an essential debugging and security analysis command-line tool used to display detailed information about ELF (Executable and Linkable Format). Our preliminary results show that AFL+DIAR does not only discover new paths more quickly but also achieves higher coverage overall. This work thus showcases how starting with lean and optimized seeds can lead to faster, more comprehensive fuzzing campaigns -- and DIAR helps you find such seeds.
- These are slides of the talk given at IEEE International Conference on Software Testing Verification and Validation Workshop, ICSTW 2022.
Threats to mobile devices are more prevalent and increasing in scope and complexity. Users of mobile devices desire to take full advantage of the features
available on those devices, but many of the features provide convenience and capability but sacrifice security. This best practices guide outlines steps the users can take to better protect personal devices and information.
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.
Introducing Milvus Lite: Easy-to-Install, Easy-to-Use vector database for you...Zilliz
Join us to introduce Milvus Lite, a vector database that can run on notebooks and laptops, share the same API with Milvus, and integrate with every popular GenAI framework. This webinar is perfect for developers seeking easy-to-use, well-integrated vector databases for their GenAI apps.
UiPath Test Automation using UiPath Test Suite series, part 5DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 5. In this session, we will cover CI/CD with devops.
Topics covered:
CI/CD with in UiPath
End-to-end overview of CI/CD pipeline with Azure devops
Speaker:
Lyndsey Byblow, Test Suite Sales Engineer @ UiPath, Inc.
Unlock the Future of Search with MongoDB Atlas_ Vector Search Unleashed.pdfMalak Abu Hammad
Discover how MongoDB Atlas and vector search technology can revolutionize your application's search capabilities. This comprehensive presentation covers:
* What is Vector Search?
* Importance and benefits of vector search
* Practical use cases across various industries
* Step-by-step implementation guide
* Live demos with code snippets
* Enhancing LLM capabilities with vector search
* Best practices and optimization strategies
Perfect for developers, AI enthusiasts, and tech leaders. Learn how to leverage MongoDB Atlas to deliver highly relevant, context-aware search results, transforming your data retrieval process. Stay ahead in tech innovation and maximize the potential of your applications.
#MongoDB #VectorSearch #AI #SemanticSearch #TechInnovation #DataScience #LLM #MachineLearning #SearchTechnology
In his public lecture, Christian Timmerer provides insights into the fascinating history of video streaming, starting from its humble beginnings before YouTube to the groundbreaking technologies that now dominate platforms like Netflix and ORF ON. Timmerer also presents provocative contributions of his own that have significantly influenced the industry. He concludes by looking at future challenges and invites the audience to join in a discussion.
1. AVR309: Software Universal Serial Bus (USB)
Features 8-bit
• USB (Universal Serial Bus) protocol implemented in firmware
Microcontrollers
• Supports Low Speed USB (1.5Mbit/s) in accordance with USB2.0
• Implementation runs on very small AVR devices, from 2kBytes and up
• Few external components required
- One resistor for USB low speed detection
Application Note
- Voltage divider/regulator, with filtering
• Implemented functions:
- Direct I/O pin control
- USB to RS232 converter
- EEPROM scratch register
• User can easily implement own functions as e.g.:
- USB to TWI control
- USB A/D and D/A converter
• Vendor customizable device identification name (visible from PC side)
• Full PC side support with source code and documentation
- MS Windows USB drivers
- DLL library functions
- Demo application in Delphi
• Examples for developers on how to communicate with device through DLL
(Delphi, C++, Visual Basic)
1 Introduction
The Universal Serial Bus (USB) interface has become extremely popular, due to its
simplicity for end user applications (Plug and Play without restart). For developers,
however, USB implementation into end systems has been more complicated
compared to e.g. RS232. In addition there is a need for device drivers as software
support on the PC side. Because of this, RS232 based communication is still very
popular among end systems manufacturers. This interface is well established and
has good operating system support, but recently the physical RS232 port has been
removed from the standard PC interface, giving ground to USB ports.
Implementation of USB into external devices can be done in two ways:
1. By using a microcontroller with hardware implemented USB interface. It is
necessary to know how USB works and write firmware into the microcontroller
accordingly. Additionally, it is necessary to create a driver on the computer side,
unless if the operating system includes standard USB classes. The main
disadvantage is the lack of availability of this kind of microcontrollers and their
high price compared to simple “RS232” microcontrollers.
Rev. 2556B-AVR-02/06
2. 2. The second option is to use some universal converter between USB and another
interface. This other interface will usually be RS232, 8-bit data bus, or TWI bus. In
this case there is no need for special firmware, it isn’t even necessary to know how
USB works, and no driver writing is required, as the converter vendor will offer one
driver for the whole solution. The disadvantage is the higher price of the complete
system, and the greater dimensions of the complete product.
The solution presented in this document is a USB implementation into a low-cost
microcontroller through emulation of the USB protocol in the microcontroller firmware.
The main challenge for this design was obtaining sufficient speed. The USB bus is
quite fast: LowSpeed - 1.5Mbit/s, FullSpeed - 12Mbit/s, HighSpeed - 480Mbit/s. The
AVR microcontrollers are fully capable of meeting the hard speed requirements of
LowSpeed USB. The solution is however not recommended for higher USB speeds.
2 Theory of Operation
Extensive details regarding physical USB communication can be found at the website
www.usb.org. This documentation is very complex and difficult for beginners. A very
good and simple explanation for beginners can be found in the document “USB in a
Nutshell. Making Sense of the USB Standard” written by Craig Peacock [2].
In this application note the explanation is limited in scope to understanding the device
firmware. The USB physical interface consists of 4 wires: 2 for powering the external
device (VCC and GND), and 2 signal wires (DATA+ and DATA-). The power wires give
approximately 5 volts and max. 500mA. The AVR can be supplied from the Vcc and
GND. The signal wires named DATA+ and DATA- handle the communication
between host (computer) and device. Signals on these wires are bi-directional.
Voltage levels are differential: when DATA+ is at high level, DATA- is at low level, but
there are some cases in which DATA+ and DATA- are at the same level, like EOP
(end of packet).
Therefore, in the firmware driven USB implementation it is necessary to be able to
sense or drive both these signals.
According to the USB standard the signal wires must be driven high between 3.0-
3.6V, while the Vcc supported by the USB host is 4.4 - 5.25V. So if the microcontroller
is powered directly from the USB lines, then the data lines must pass through a level
converter to compensate for the different voltage levels. Another solution is to
regulate the Vcc supported by the host down to 3.3V, and run the microcontroller at
that voltage level.
Figure 1. Low Speed Driver Signal Waveforms
One Bit
T ime
(1.5Mb/s)
Signal pins
VSE (max)
pass output
spec levels
Driver
with minimal
Signal Pins reflections and
ringing
VSE (min)
VSS
AVR309
2
2556B-AVR-02/06
3. AVR309
Figure 2. Packet Transaction Voltage Levels
VOH (min)
VSE (max)
VSE (min)
VOL (max)
VSS Bus Idle
First Bit
SOP
of Packet
Last Bit Bus Driven
of Packet to Idle State
Bus
Floats
EOP
Bus Idle
Strobe
VOH (min)
VSE (max)
VSE (min)
VOL (max)
VSS
Figure 3. Low Speed Device Cable and Resistor Connections
R2
L.S. USB
D+ D+
F.S./L.S. USB Transceiver
R1 Untwisted, Unshielded
Transceiver
D- D- Slow Slew Rate
3 Meters max.
Buffers
R1
R1=15kΩ
Host or R2=1.5kΩ
Low Speed Function
Hub Port
The USB device connection and disconnection is detected based on the impedance
sensed on the USB line. For LowSpeed USB devices a 1.5kΩ pull-up resistor
between DATA- signal and Vcc is necessary. For FullSpeed devices, this resistor is
connected to DATA+.
Based on this pull-up, the host computer will detect that a new device is connected to
the USB line.
After the host detects a new device, it can start communicating with it in accordance
with the physical USB protocol. The USB protocol, unlike UART, is based on
synchronous data transfer. Synchronization of transmitter and receiver is necessary
to carry out the communication. Because of this, the transmitter will transmit a small
header as a sync pattern preceding the actual data. This header is a square wave
(101010), succeeded by two zeros after which the actual data is transmitted.
3
2556B-AVR-02/06
4. Figure 4. Sync Pattern
S Y N C P A T T E RN
NR Z I D at a Idle P I D0 P I D 1
Encoding
In order to maintain synchronization, USB demands that this sync pattern is
transmitted every millisecond in the case of full speed devices, or that both signal
lines are pulled to zero every millisecond in the case of low speed devices. In
hardware-implemented USB receivers, this synchronization is ensured by a digital
PLL (phase locked loop). In this implementation, the data sampling time must be
synchronized with the sync pattern, then wait for two zeros, and finally start receiving
data.
Data reception on USB must satisfy the requirement that receiver and transmitter are
in sync at all times. Therefore it is not permitted to send a stream of continuous zeros
or ones on the data lines. The USB protocol ensures synchronization by bit stuffing.
This means that, after 6 continuous ones or zeros on the data lines, one single
change (one bit) is inserted. The signals on the USB lines are NRZI coded. In NRZI
each ‘0’ is represented, by a shift in the current signal level, and each ‘1’ is
represented by a hold of the current level. For the bit stuffing this means that one zero
bit is inserted into the logical data stream after 6 contiguous logical ones.
Figure 5. NRZI Data Encoding
0 1 1 0 1 0 1 0 0 0 1 0 0 1 1 0
Idle
Data
NRZI Idle
Figure 6. Bit Stuffing
Data Encoding Sequence:
Raw Data
Sync Pattern Packet Data
Stuffed Bit
Bit Stuffed Data
Sync Pattern Packet Data
Six Ones
NRZI Idle
Encoded Data Sync Pattern Packet Data
AVR309
4
2556B-AVR-02/06
5. AVR309
Figure 7. EOP Width Timing
TPERIOD
Data
Differential Crossover
Data Lines Level
EOP
Width
Notification of end of data transfer is made by an end-of-packet (EOP) part. EOP
consists of pulling both physical DATA+ and DATA- to the low voltage level. EOP is
succeeded by a short time of idle state (min 2 periods of data rate). After this, the next
transaction can be performed.
Data between sync pattern and EOP is NRZI coded communication between USB
device and host. The data stream is composed of packets consisting of several fields:
Sync field (sync pattern), PacketID (PID), Address field (ADDR), Endpoint field
(ENDP), Data, and Cyclic redundancy check field (CRC). Usage of these fields in
different types of data transfer is explained well in [2]. USB describes four types of
transfer: Control Transfer, Interrupt Transfer, Isochronous Transfer, and Bulk
Transfer. Each of these transfers is dedicated for different device requirements, and
their explanations can be found in [2].
This implementation is using Control transfer. This transfer mode is dedicated for
device settings, but can also be used for general purpose transfers. Implementation
of Control transfer must exist on every USB device, as this mode is used for
configuration when the device is connected for obtaining information from the device,
setting device address, etc.. A description of the Control transfer and its contents can
be found in [2] and [1]. Each Control transfer consists of several stages: Setup stage,
Data stage and Status stage.
Data is in USB transferred in packets, with several bytes each. The packet size is
determined by each device, but is limited by specification. For LowSpeed devices,
packet size is limited to 8 byte. This 8 byte long packet + start and end field must be
received into the device buffer in one USB transfer. In hardware-based USB
receivers, the various parts of the transfer are automatically decoded, and the device
is notified only when the entire message has been assigned to the particular device.
In a firmware implementation, the USB message must be decoded by firmware after
the entire message has been received into the buffer. This gives us the requirements
and limitations: The device must have a buffer for storing the whole USB message
length, another buffer for USB transmission (prepared data to transmit), and
administration overhead with message decoding and checking. Additionally the
firmware is required to perform fast and precise synchronous speed reception from
physical pins to buffer and transmission from buffer to pins. All these capabilities are
limited by the microcontroller’s speed and program/data memory capacity, so the
firmware must be carefully optimized. In some cases the microcontroller computation
power is very close to the minimum requirements and therefore all firmware is written
in assembly.
5
2556B-AVR-02/06
6. 3 Hardware Implementation
A schematic diagram of the microcontroller connection to the USB bus is shown in
Figure 8. This schematic was made for the specific purpose of a USB to RS232
converter. There were also implemented specific functions as direct pin control and
EEPROM read/write.
Figure 8. USB interface with ATtiny2313 as USB to RS232 converter with 32 byte
FIFO + 8-bit I/O control + 128 bytes EEPROM
VCC
IC1
XT1 ATtiny2313
12MHz +
RS232 TTL
VCC
1 20 C2
RST VC 10u
RxD 2 19 D7
PD0/RXD SCK/PB7
TxD 3 18 D6 R1 GND
PD1/TXD MISO/PB6 C1
4 17 D5 1k5
MOSI/PB5 100n
XTAL
5 16 D4 XC1
PB4
XTAL
6 15 D3 GND USB-
OC1/PB3
PD2/INT
D0 7 14 GND
PB2 GND 4
PD3/INT
8 13 DATA+ 3
PD4/T0 AN1/PB1
D1 9 12 DATA-
PD5/T1 AN2/PB0 2
10 11 D2 V+
GND ICP/PD6 1
GND
3 1
VCC OUT IN
IC2
LE35 C3
100n
3.5V GND
GND
2
GND
The USB data lines, DATA- and DATA+, are connected to pins PB0 and PB1 on the
AVR. This connection cannot be changed because the firmware makes use of an
AVR finesse for fast signal reception: The bit signal captured from the data lines is
right shifted from LSB (PB0) to carry and then to the reception register, which collects
the bits from the data lines. PB1 is used as input signal because on 8-pin ATtiny2313.
This pin can be used as external interrupt INT0. No additional connection to INT0 is
necessary – the 8-pin version of the AVR is the smallest pin count available. On other
AVRs, an external connection from DATA+ to the INT0 pin is necessary to ensure no
firmware changes between different AVR microcontrollers.
For proper USB device connection and signaling, the AVR running as low speed USB
device must have a 1.5kΩ pull-up resistor on DATA-.
The Vcc supplied by the USB host may vary from 4.4V to 5.25V. This supply has to
be regulated to 3.0 – 3.6V before connecting the 1.5kΩ pull-up resistor and sourcing
the AVR. Dimension a voltage regulator depending on the power load of the target
system. The voltage regulator must be a low drop-out regulator. The schematic in
Figure 8 use a LE35 regulator with a nominal output voltage of 3.5V. But one can use
any similar solution as long as the required properties are held. Even a very simple
regulator based on a Zener diode could in some cases be used.
The other components provide functions for proper operation of the microcontroller
only: Crystal as clock source, and capacitors for power supply filtering.
This small component count is sufficient to obtain a functional USB device, which can
communicate with a computer through the USB interface. This is a very simple and
AVR309
6
2556B-AVR-02/06
7. AVR309
inexpensive solution. Some additional components can be added to extend the
device functions.
A TSOP1738 infrared sensor can be used to receive an IR signal. A MAX232 TTL to
RS232 level converter should be added to make a USB to RS232 converter. To
control LED diodes or display, they can be connect to I/O pins directly or through
resistors.
4 Software Implementation
All USB protocol reception and decoding is performed at the firmware level. The
firmware first receives a stream of USB bits in one USB packet into the internal buffer.
Start of reception is based on the external interrupt INT0, which takes care of the
sync pattern. During reception, only the end of packet signal is checked (EOP
detection only). This is due to the extreme speed of the USB data transfer. After a
successful reception, the firmware will decode the data packets and analyze them.
First it checks if the packet is intended for this device according to its address. The
address is transferred in every USB transaction and therefore the device will know if
the next transferred data are dedicated to it. USB address decoding must be done
very quickly, because the device must answer with an ACK handshake packet to the
USB host if it recognizes a valid USB packet with the given USB address. Therefore,
this is a critical part of the USB answer.
After the reception of this bit stream, we obtain an NRZI coded array of bits with bit
stuffing in the input buffer. In the decoding process we first remove the bit stuffing and
then the NRZI coding. All these changes are made in a second buffer (copy of the
reception buffer). A new packet can be received while the first one is being decoded.
At this point, decoding speed is not so important. This is because the device can
delay the answer itself. If the host asks for an answer during decoding, the device
must answer immediately with NAK so that the host will understand it is not ready yet.
Because of this, the firmware must be able to receive packets from the host during
decoding, decode whether the transaction is intended for the device, and then send a
NAK packet if there is some decoding in progress. The host will then ask again. The
firmware also decodes the main USB transaction and performs the requested action;
for instance, send char to RS232 line and wait for transmission complete, and
prepares the corresponding answer. During this process the device will be interrupted
by some packets from the host, usually IN packets to obtain an answer from the
device. To these IN packets, the device must answer with NAK handshake packets.
When the answer is ready, and the device has performed the required action, the
answer must first go through a CRC field calculation and inclusion, then the NRZI
coding, and then bit stuffing. Now, when the host requests an answer, this bit stream
can be transferred to the data lines according to the USB specification.
4.1 Firmware description
In the following, the main parts of the firmware will be described. The firmware is
divided into blocks: interrupt routines, decoding routines, USB reception, USB
transmission, requested action decoding, and performing requested custom actions.
Users can add their own functions to the firmware. Some examples on how to make
customer-specific functions can be found in the firmware code, and the user can write
new device extensions according to the existing built-in functions. For example TWI
support can be added according to the built-in function for direct pin control.
7
2556B-AVR-02/06
8. Figure 9. Flowchart of the receiver routine
1
INT0 rising edge
Packet type detection
Edge detection
USB address detection
Wait for end of SOP (if no Data packet)
(2 bits at same level)
No
Is it my USB
Sampling time to middle of bit 2
Init reception of USB data bits address?
Yes
Sample DATA+, Set state according to
DATA- to PB0, PB1 received type of packet
Send answer (if answer
Yes prepared in out buffer),
Yes
PB0=PB1=0 ? Is it an IN or NACK (if answer in
packed? progress)
No No
Shift PB0 → carry
No
Is it a Setup data
Shiftbuffer ← carry 2
packed?
Yes
Send ACK packet
Shift buffer
(accepting setup data packet).
full?
Copy reception buffer to input buffer.
Set flag for new request in input buffer.
Store Shift buffer to
Finish INT0 interrupt:
input buffer
2
- Clear pending INT0
- Restore registers
End of INT0 interrupt
Yes
Received
2
bytes < 3 ?
No
1
AVR309
8
2556B-AVR-02/06
9. AVR309
4.2 “EXT_INT0” Interrupt Service Routine
The external interrupt 0 is active all the time while the firmware is running. This
routine initiates the reception of the USB serial data. An external interrupt occurs on a
rising edge on the INT0 pin, a rising edge marks the beginning of the sync pattern of
a USB packet, se Figure 4. This activates the USB reception routine.
First, the data sampling must be synchronized to the middle of the bit width. This is
done according to the sync pattern. Since the bit duration is only 8 cycles of the XTAL
clock, and the interrupt occurrence could be delayed (+/- 4 cycles), the edge
synchronization of the sync pattern must be performed carefully. End of sync pattern
and begin of data bits are detected according to the last dual low level bits in the sync
packet (see Figure 4).
After this, the actual data sampling is started. Sampling is performed in the middle of
the bit. Because data rate is 1.5Mbit/s (1.5MHz) and the microcontroller speed is
12MHz, we have only 8 cycles at our disposal for data bit sampling, storing the result
into the buffer byte, shifting the buffer byte, checking if the whole byte has been
received, storing this byte into SRAM, and checking for EOP. This is perhaps the
most crucial part of the firmware; everything must be done synchronously with exact
timing. When a whole USB packet has been received, packet decoding must be
performed. First, we must quickly determine the packet type (SETUP, IN, OUT,
DATA) and received USB address. This fast decoding must be performed inside the
interrupt service routine because an answer is required very quickly after receiving
the USB packet (the device must answer with an ACK handshake packet when a
packet with the device address has been received, and with NAK when the packet is
for the device, but when no answer is currently ready).
At the end of the reception routine (after ACK/NAK handshake packet has been sent)
the sampled data buffer must be copied into another buffer on which the decoding will
be performed. This is in order to free the reception buffer to receive a new packet.
During reception the packet type is decoded and the corresponding flag value is set.
This flag is tested in the main program loop, and according to its value the
appropriate action will be taken and the corresponding answer will be prepared with
no regard to microcontroller speed requirements.
The INT0 must be allowed to keep its very fast invocation time in all firmware
routines, so no interrupt disabling is allowed and during other interrupts’ execution (for
example serial line receive interrupt) INT0 must be enabled. Fast reception in the
INT0 interrupt routine is very important, and it is necessary to optimize the firmware
for speed and exact timing. One important issue is register backup optimization in
interrupt routines.
4.3 Main program loop
The main program loop is very simple. It is only required to check the action flag:
what to do when some received data are present. In addition it checks whether the
USB interface is reset (both data lines at low level for a long time) and, if it is,
reinitializes the device. When there is something to do (i.e. action flag active), the
corresponding action is called: decoding NRZI in packet, bit stuffing removal, and
preparation of the requested answer in the transmit buffer (with bit stuffing and NRZI
coding). Then one flag is activated to signal that the answer is prepared for sending.
9
2556B-AVR-02/06
10. Physical output buffer transmission to the USB lines is performed in the reception
routine as answer to the IN packet.
4.4 Short description of firmware subroutines
In the following, the firmware subroutines and their purposes are described briefly.
4.4.1 Reset:
Initialization of the AVR microcontroller resources: stack, serial lines, USB buffers,
interrupts.
4.4.2 Main:
The main program loop. Checks the action flag value and, if flag is set, performs the
required action. Additionally, this routine checks for USB reset on data lines and
reinitializes the USB microcontroller interface if this is the case.
4.4.3 Int0Handler:
The interrupt service routine for the INT0 external interrupt. Main
reception/transmission engine; emulation from USB data lines. Storing data to buffer,
decision of USB packet owners (USB address), packet recognition, sending answer
to USB host. Basically the heart of the USB engine.
4.4.4 SetMyNewUSBAddresses:
Routine to change the USB address. The address is changed and is coded to its
NRZI equivalent. This is done because the address decoding during USB packet
reception, must be performed quickly.
4.4.5 FinishReceiving:
Copies coded raw data from USB reception packet to decoding packet (for NRZI and
bit stuffing decoding).
4.4.6 USBreset:
Initializes USB interface to default values (as the state after power on).
4.4.7 SendPreparedUSBAnswer:
Sends prepared output buffer contents to USB lines. NRZI coding and bit stuffing is
performed during transmission. Packet is ended with EOP.
4.4.8 ToggleDATAPID:
Toggles DATAPID packet identifier (PID) between DATA0 and DATA1 PID. This
toggling is necessary during transmission as per the USB specification.
AVR309
10
2556B-AVR-02/06
11. AVR309
4.4.9 ComposeZeroDATA1PIDAnswer:
Composes zero answer for transmission. Zero answer contains no data and is used
in some cases as answer when no additional data is available on device.
4.4.10 InitACKBufffer:
Initializes buffer in RAM with ACK data (ACK handshake packet). This buffer is
frequently sent as answer so it is always kept ready in memory.
4.4.11 SendACK:
Transmits ACK packet to USB lines.
4.4.12 InitNAKBuffer:
Initializes buffer in RAM with NAK data (NAK handshake packet). This buffer is
frequently sent as answer so it is always kept ready in memory.
4.4.13 SendNAK:
Transmits NAK packet to USB lines.
4.4.14 ComposeSTALL:
Initializes buffer in RAM with STALL data (STALL handshake packet). This buffer is
frequently sent as answer so it is always kept ready in memory.
4.4.15 DecodeNRZI:
Performs NRZI decoding. Data from USB lines in buffer is NRZI coded. This routine
removes the NRZI coding from the data.
4.4.16 BitStuff:
Removes/adds bit stuffing in received USB data. Bit stuffing is added by host
hardware according to the USB specification to ensure synchronization in data
sampling. This routine produces received data without bit stuffing or data to transmit
with bit stuffing.
4.4.17 ShiftInsertBuffer:
Auxiliary routine for use when performing bit stuffing addition. Adds one bit to output
data buffer and thus increases the buffer length. The remainder of the buffer is shifted
out.
4.4.18 ShiftDeleteBuffer:
Auxiliary routine for use when performing bit stuffing removal. Removes one bit to
output data buffer and thus decreases the buffer length. The remainder of the buffer
is shifted in.
4.4.19 MirrorInBufferBytes:
Exchanges bit order in byte because data is received from USB lines to buffer in
reverse order (LSB/MSB).
11
2556B-AVR-02/06
12. 4.4.20 CheckCRCIn:
Performs CRC (cyclic redundancy check) on received data packet. CRC is added to
USB packet to detect data corruption.
4.4.21 AddCRCOut:
Adds CRC field into output data packet. CRC is calculated according to the USB
specification from given USB fields.
4.4.22 CheckCRC:
Auxiliary routine used in CRC checking and addition.
4.4.23 LoadDescriptorFromROM:
Loads data from ROM to USB output buffer (as USB answer).
4.4.24 LoadDescriptorFromROMZeroInsert:
Loads data from ROM to USB output buffer (as USB answer) but every even byte is
added as zero. This is used when a string descriptor in UNICODE format is requested
(ROM saving).
4.4.25 LoadDescriptorFromSRAM:
Loads data from RAM to USB output buffer (as USB answer).
4.4.26 LoadDescriptorFromEEPROM:
Loads data from data EEPROM to USB output buffer (as USB answer).
4.4.27 Load[X]Descriptor:
Performs selection for answer source location: ROM, RAM or EEPROM.
4.4.28 PrepareUSBOutAnswer:
Prepares USB answer to output buffer according to request by USB host, and
performs the requested action. Adds bit stuffing to answer.
4.4.29 PrepareUSBAnswer:
Main routine for performing the required action and preparing the corresponding
answer. The routine will first determine which action to perform – discover function
number from received input data packet – and then perform the requested function.
Function parameters are located in the input data packet.
The routine is divided into two parts:
• standard requests
• vendor specific requests
Standard requests are necessary and are described in USB specification
(SET_ADDRESS, GET_DESCRIPTOR, …).
Vendor specific requests are requests that can obtain vendor specific data (in Control
USB transfer). Control IN USB transfer is used for this AVR device to communicate
with host. Developers can add their own functions here and in this manner extend the
AVR309
12
2556B-AVR-02/06
13. AVR309
device versatility. The various documented built-in functions in the source code can
be used as templates on how to add custom functions.
4.5 Standard USB functions (Standard Requests)
ComposeGET_STATUS;
ComposeCLEAR_FEATURE;
ComposeSET_FEATURE;
ComposeSET_ADDRESS;
ComposeGET_DESCRIPTOR;
ComposeSET_DESCRIPTOR;
ComposeGET_CONFIGURATION;
ComposeSET_CONFIGURATION;
ComposeGET_INTERFACE;
ComposeSET_INTERFACE;
ComposeSYNCH_FRAME;
4.6 Vendor USB functions (Vendor requests)
DoSetInfraBufferEmpty;
DoGetInfraCode;
DoSetDataPortDirection;
DoGetDataPortDirection;
DoSetOutDataPort;
DoGetOutDataPort;
DoGetInDataPort;
DoEEPROMRead;
DoEEPROMWrite;
DoRS232Send;
DoRS232Read;
DoSetRS232Baud;
DoGetRS232Baud;
DoGetRS232Buffer;
DoSetRS232DataBits;
DoGetRS232DataBits;
DoSetRS232Parity;
DoGetRS232Parity;
13
2556B-AVR-02/06
14. DoSetRS232StopBits;
DoGetRS232StopBits;
4.7 Data structures (USB descriptors and strings)
DeviceDescriptor;
ConfigDescriptor;
LangIDStringDescriptor;
VendorStringDescriptor;
DevNameStringDescriptor;
4.8 Format of input message from USB host
As stated above, this USB device uses USB Control Transfer. This type of transfer
uses a data format defined in the USB specification described in [2] on page 13
(Control Transfers). The document describes the details and explains how the control
transfer works, and therefore also how this device communicates with the USB host.
The AVR device is using control IN endpoint. A nice example of data communication
can be found on page 15 of [2]. The communication between the host and the AVR
device is done according to this example.
In addition to the actual control transfer, the format of the DATA0/1 field in the transfer
is discussed. Control transfer defines in its setup stage a standard request, which is 8
bytes long. Its format is described on page 26 of [2] (The Setup Packet). There is a
table with a description of the meaning of every byte. The following is important:
The standard setup packet is used for detection and configuration of the device after
power on. This packet uses the Standard Type request in the bmRequestType field
(bits D6-D5 = 0). All the following fields’ (bRequest, wValue, wIndex, wLength)
meanings can be found in the USB specification. Their explanation can be found on
pages 27-30 in [2] (Standard Requests).
Every setup packet has eight bytes, used as described in Table 1.
AVR309
14
2556B-AVR-02/06
15. AVR309
Table 1. Standard setup packet fields (control transfer)
Offset Field Size Value Description
0 bmRequestType 1 Bit-map Characteristics of request
D7 Data xfer direction
0 = Host to device
1 = Device to host
D6..5 Type
0 = Standard
1 = Class
2 = Vendor
3 = Reserved
D4..0 Recipient
0 = Device
1 = Interface
2 = Endpoint
3 = Other
4..31 = Reserved
1 bRequest 1 Value Specific request
2 wValue 2 Value Word-sized field that varies according to request
Word sized field that varies according to request - typically used to
4 wIndex 2 Index or Offset
pass an index or offset
6 wLength 2 Count Number of bytes to transfer if there is a data phase
15
2556B-AVR-02/06
16. Table 2. Standard device requests
BmRequest- bRequest wValue wIndex wLength Data
Type
00000000B Feature Zero
CLEAR_FEATURE Zero None
00000001B Selector Interface
00000010B Endpoint
Configuration
10000000B GET_CONFIGURATION Zero Zero One
Value
Descriptor Zero or Descriptor
10000000B GET_DESCRIPTOR Descriptor
Type and Language Length
Descriptor ID
Index
Alternate
10000001B GET_INTERFACE Zero Interface One
Interface
10000000B Zero Device,
GET_STATUS Zero Two
10000001B Interface Interface, or
10000010B Endpoint Endpoint
Status
Device
00000000B SET_ADDRESS Zero Zero None
Address
Configuration
00000000B SET_CONFIGURATION Zero Zero None
Value
Descriptor Zero or Descriptor
00000000B SET_DESCRIPTOR Descriptor
Type and Language Length
Descriptor ID
Index
00000000B Feature Zero
SET_FEATURE Zero None
00000001B Selector Interface
00000010B Endpoint
Alternate
00000001B SET_INTERFACE Interface Zero None
Setting
Frame
10000010B SYNCH_FRAME Zero Endpoint Two
Number
AVR309
16
2556B-AVR-02/06
17. AVR309
Table 3. Vendor device requests used in firmware as functions calls.
BmRequest- bRequest
bRequest wValue wIndex wLength Data
Type (number)
(function name) (param1) (param2)
110xxxxxB FNCNumberDoSetInfraBufferEmpty 1 None None 1 Status
110xxxxxB FNCNumberDoGetInfraCode 2 None None 1 Status
110xxxxxB FNCNumberDoSetDataPortDirection 3 DDRB DDRD 1 Status
DDRC usedports
110xxxxxB FNCNumberDoGetDataPortDirection 4 None None 3 DDRB
DDRC
DDRD
110xxxxxB FNCNumberDoSetOutDataPort 5 PORTB PORTD 1 Status
PORTC usedports
110xxxxxB FNCNumberDoGetOutDataPort 6 None None 3 PORTB
PORTC
PORTD
110xxxxxB FNCNumberDoGetInDataPort 7 None None 3 PINB
PINC
PIND
EEPROM
110xxxxxB FNCNumberDoEEPROMRead 8 Address None Length
bytes
EEPROM
110xxxxxB FNCNumberDoEEPROMWrite 9 Address 1 Status
value
RS232 byte
110xxxxxB FNCNumberDoRS232Send 10 None 1 Status
value
110xxxxxB FNCNumberDoRS232Read 11 None None 2 Status
110xxxxxB FNCNumberDoSetRS232Baud 12 Baudrate Lo Baudrate Hi 1 Status
110xxxxxB FNCNumberDoGetRS232Baud 13 None None 2 Baudrate
RS232 bytes
110xxxxxB FNCNumberDoGetRS232Buffer 14 None None Length
from FIFO
110xxxxxB FNCNumberDoSetRS232DataBits 15 Databits value None 1 Status
Databits
110xxxxxB FNCNumberDoGetRS232DataBits 16 None None 1
value
110xxxxxB FNCNumberDoSetRS232Parity 17 Parity value None 1 Status
110xxxxxB FNCNumberDoGetRS232Parity 18 None None 1 Parity value
110xxxxxB FNCNumberDoSetRS232StopBits 19 Stopbits value None 1 Status
Stopbits
110xxxxxB FNCNumberDoGetRS232StopBits 20 None None 1
value
The Control Transfer mode is used for the user communication, implemented as
custom functions in the firmware. The Vendor Type request in the bmRequestType
field (bits D6-D5 = 2) is used. Here all succeeding fields (bRequest, wValue, wIndex)
can be modified according to the programmer’s purposes. In our implementation, the
bRequest field is used for the function number and the next fields are used for
function parameters. The first parameter is in the wValue slot, the second at the
wIndex location.
17
2556B-AVR-02/06
18. An example from the implementation is EEPROM writing. bRequest = 9 is chosen as
function number. The wValue field is used for EEPROM address, and the value to
write (EEPROM data) is in the wIndex field. According to this, we obtain the following
function is obtained: EEPROMWrite(Address, Value).
If more user functions are required, it is enough to add function numbers and the
body of the required function into the firmware. The technique can be extracted from
the built-in functions in the firmware (see source code).
USB host also communicates with device with IN control transfers. Host sends an 8-
byte IN data packet to the device in the format defined above (function number and
parameters), and the device then answers with requested data. The length of the
answered data is firmware limited in some cases up to 255 bytes, but the main
limitation is on the device driver side on the host computer. The current driver
supports 8-byte length answers in Vendor Type requests.
4.9 Firmware customization
Users can add new functions into the firmware and extend the device features.
In the firmware there are 3 examples on how to add user functions: DoUserFunctionX
(X=0,1,2). Look at these examples to see how to add similar extended functions. The
contents of the functions only depend on the device requirements.
The identification and device name presented to the computer side can be modified in
the firmware This name is located in firmware as strings and can be changed to any
string. However these names are recommended to be changed together with the USB
PID (product ID) and VID (vendor ID) for correct recognition in target systems.
VID together with PID must be unique for a given device type. Therefore it is
recommended that if a device functionality is changed, one should also modify the
PID and/or VID. Vendor ID depends on the USB device vendor and must be assigned
from the USB organization (see more information in [1]). Every vendor has its own ID
and therefore this value cannot be changed to any unassigned value. But the product
ID depends only on the vendor’s choice, and the purpose of the PID is to recognize
the different devices from the same vendor.
This application note is setup with VID 0x03EB and PID 0x21FF which is Atmel’s VID.
Do not use this VID in your target system.
4.10 PC software
In order to communicate with the device some software support on the PC side is
needed. This software is divided into 3 levels:
1. Device driver: Used for low-level communication with the device and for installation
into operating system (Windows98/ME/NT/XP).
2. DLL library: Used for encapsulation of device functions and communication with
the device driver. The DLL simplifies the device function access from the user’s
application. It includes some device and operating system related functions
(threads, buffers, etc.).
3. User application: Makes user interface for friendly communication between user
and device. Uses function calls from DLL library only.
AVR309
18
2556B-AVR-02/06
19. AVR309
4.10.1 Device driver and installation files
The first time the USB device is connected to the computer USB port, the operating
system will detect the device and request driver files. This is called device installation.
For the installation process it is necessary not only to make the device driver, but also
an installation script in which the installation steps are described.
The device driver for the device described in this document is made with
Windows2000 DDK (Driver Development Kit). The development of the USB driver is
based on one of the included examples in the DDK – IsoUsb. This driver has been
modified for AVR USB device communication. In the original source code, parts have
been extended/added around the IOCTL communications, because this device
communicates with the computer through these IOCTL calls. To reduce the driver
code size, unused parts have been removed. The name of the driver is “AVR309.sys”
and it works as sender of commands to the USB device (Control IN transfers). The
driver works on all 32-bit Windows versions except Win95.
An installation script written in an INF file is used during device installation. In this INF
file the various installation steps are described. The file “AVR309.inf” was created
using a text editor. This file is requested by the operating system during installation.
During the installation process, the driver file is copied into the system and the
required system changes are made. The INF file ensures installation of the DLL
library to the system search path for easy reach from various applications.
Three files are necessary for device installation: INF file “AVR309.inf”, driver
“AVR309.sys”, and DLL library “AVR309.dll”.
4.10.2 DLL library
The DLL library communicates with the device driver and all device functions are
implemented in this library. This way the programming of end-user applications is
simplified. The DLL library ensures exclusive access to the device (serializes device
access), contains system buffer for RS232 data reception, and creates a single
system thread for device RS232 data buffer reading.
Serialization in DLL ensures that only one application/thread will communicate with
the device at any given time. This is necessary because of the possibility of mixing
question and answer from various applications at the same time.
A system buffer for RS232 data reception ensures that the data received from the
device’s RS232 line is stored into one buffer that is common to all applications. This
way, data received by the device will be sent to all applications. There is no danger
that an application will receive incomplete data because some other application has
read some of the data before.
Only one system thread exists for all applications, and will periodically request device
for RS232 data. The thread will then store received data into the system buffer. Only
one system buffer solution ensures small CPU usage (in comparison to every
application having their own thread) and simplifies storing data into the system buffer.
All device functions are defined in the DLL library, and they are exported in a user-
friendly form: not as function number and parameters, but as tidy function names with
parameters. Some functions are more complex internally, as the function for RS232
buffer data read. This way, developers of end-user applications can rapidly write
application using only the DLL interface. There is no need to study the low-level
19
2556B-AVR-02/06
20. device functions, as the DLL library separates the application programmer level from
the hardware level.
Declarations are written for the 3 mostly used programming languages: Borland
Delphi, C++ (Borland or Microsoft) and Visual Basic. A detailed description of these
functions can be found in the included help file AVR309_DLL_help.htm.
The DLL is written in Delphi, and all source code is included in this application note.
4.10.3 End user application
The end-user application will use functions from the DLL library to communicate with
the device only. Its main purpose is to make a user-friendly graphical user interface
(GUI).
Application programmers use the DLL library to write their own applications. An
example can be found in the published project where all the source code is available.
Many applications can be written using this example as starting point, and in several
programming languages (Delphi, C++, and Visual Basic).
There is included an example of an end user application called “AVR309demo.exe”.
This software is only meant as an example on how to use the functions from the DLL
library. The included source code is written in Delphi, and can be used as a template
for other applications.
4.10.4 UART speed error discussion
The microcontroller uses a 12MHz clock because of the USB sampling. But using this
clock value has a minor disadvantage in that baud rate generation will contain small
errors for the standard baud rates. However the high value of the clock minimizes this
error. Absolute maximum error that could be accepted in baud rate generation is 4%:
because maximum error is half a bit duration (0.5) and the maximum packet time is
12bits = 1start bit + 8data bits + 1parity bit + 2stop bits. Then the error is:
0.5/12*100% = 4.1%.
The functions in the DLL automatically check this error and set the baud rate of the
microcontroller only if the error is below 4%, it also returns an error message in case
of an unsupported baud rate. It is however recommended to never use an error larger
than 2%.
Table 4 summarizes the errors of the standard baud rates when using a 12MHz clock.
Table 4. AVR UART baud rate errors (12MHz clock)
Standard baudrates Baudrate in AVR Error [%]
600 602 +0.33
1200 1204 +0.33
2400 2408 +0.33
4800 4808 +0.17
9600 9616 +0.17
19200 19230 +0.16
28800 28846 +0.16
38400 38462 +0.16
57600 57692 +0.16
115200 115384 +0.16
AVR309
20
2556B-AVR-02/06
21. AVR309
5 Used documentation and resources
5.1 USB related resources:
[1] http://www.usb.org - USB specification and another USB related resources
[2] usb-in-a-nutshell.pdf from http://www.beyondlogic.org/usbnutshell/usb-in-a-
nutshell.pdf - very good and simple document how USB works
[3] http://www.beyondlogic.org - USB related resources
[4] enumeration.pdf - exact pictures how USB enumeration works
[5] http://mes.loyola.edu/faculty/phs/usb1.html
[6] http://www.mcu.cz - USB section (in Czech/Slovak language)
[7] crcdes.pdf – implementation CRC in USB
[8] USBspec1-1.pdf – USB 1.1 specification
[9] usb_20.pdf – USB 2.0 specification
5.2 AVR related resources:
[10] http://www.atmel.com/AVR - AVR 8-bit microcontrollers family
[11] doc2543.pdf – ATtiny2313 datasheet
http://www.atmel.com/dyn/products/product_card.asp?part_id=3229
[12] doc2545.pdf – ATmega48/88/168 datasheet
http://www.atmel.com/dyn/products/product_card.asp?part_id=3301
[13] avr910.pdf – AVR ISP programming
[14] http://www.avrfreaks.com - a lot of AVR resources and information
[15] AVR Studio 4 – debugging tool for the AVR family (from http://www.atmel.com)
[16] Simple LPT ISP programmer.
(http://www.hw.cz/products/lpt_isp_prog/index.html)
5.3 Driver related resources:
[17] http://www.beyondlogic.org - USB related resources about USB drivers
[18] http://www.cypress.com - fully documented USB driver (for USB thermometer)
[19] http://www.jungo.com - WinDriver and KernetDriver – easy to use USB drivers
[20] http://microsoft.com Microsoft Windows DDK – Driver Development Kit – tools
for drivers writing
21
2556B-AVR-02/06
22. 6 Appendix
The appendixes are included in a separate attachment file to this application note.
6.1 AVR firmware with source code
Firmware source code for the ATtiny2313 AVR microcontroller was written in AVR
Studio 4. Source code can be found in the text file USBtiny2313.asm.
6.2 DLL library with source code
Library AVR309.dll was written in Delphi3, so its source code is based on Object
Pascal language. Interfaces (Delphi, C/C++ and Visual Basic.) to the DLL library
(exported functions) “AVR309.dll” are described in file AVR309_DLL_help.htm. Whole
source code of AVR309.dll library written in Delphi3 can be found in file AVR309.dpr
(Delphi3 project).
6.3 End user application example, with source code
The example using the DLL library as an end user application is
AVR309USBdemo.exe. The source code is a Delphi3 application:
AVR309USBdemo.dpr.
7 About the Author
Ing. Igor Cesko
Slovakia
www.cesko.host.sk
cesko@internet.sk
AVR309
22
2556B-AVR-02/06