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Instruction set-of-8085

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Instruction set-of-8085

  1. 1. Instruction Set of 8085An instruction is a binary pattern designed inside amicroprocessor to perform a specific function.The entire group of instructions that a microprocessorsupports is called Instruction Set.8085 has 246 instructions.Each instruction is represented by an 8-bit binary value.These 8-bits of binary value is called Op-Code orInstruction Byte.
  2. 2. Classification of Instruction SetData Transfer InstructionArithmetic InstructionsLogical InstructionsBranching InstructionsControl Instructions
  3. 3. Data Transfer InstructionsThese instructions move data between registers, orbetween memory and registers.These instructions copy data from source todestination.While copying, the contents of source are notmodified.
  4. 4. Data Transfer InstructionsOpcode Operand DescriptionMOV Rd, RsM, RsRd, MCopy from source to destination.This instruction copies the contents of the source registerinto the destination register.The contents of the source register are not altered.If one of the operands is a memory location, its location isspecified by the contents of the HL registers.Example: MOV B, C or MOV B, M
  5. 5. Data Transfer InstructionsOpcode Operand DescriptionMVI Rd, DataM, DataMove immediate 8-bitThe 8-bit data is stored in the destination register ormemory.If the operand is a memory location, its location isspecified by the contents of the H-L registers.Example: MVI B, 57H or MVI M, 57H
  6. 6. Data Transfer InstructionsOpcode Operand DescriptionLDA 16-bit address Load AccumulatorThe contents of a memory location, specified by a 16-bit address in the operand, are copied to theaccumulator.The contents of the source are not altered.Example: LDA 2034H
  7. 7. Data Transfer InstructionsOpcode Operand DescriptionLDAX B/D RegisterPairLoad accumulator indirectThe contents of the designated register pair point to a memorylocation.This instruction copies the contents of that memory locationinto the accumulator.The contents of either the register pair or the memory locationare not altered.Example: LDAX B
  8. 8. Data Transfer InstructionsOpcode Operand DescriptionLXI Reg. pair, 16-bitdataLoad register pair immediateThis instruction loads 16-bit data in the register pair.Example: LXI H, 2034 H
  9. 9. Data Transfer InstructionsOpcode Operand DescriptionLHLD 16-bit address Load H-L registers directThis instruction copies the contents of memorylocation pointed out by 16-bit address into register L.It copies the contents of next memory location intoregister H.Example: LHLD 2040 H
  10. 10. Data Transfer InstructionsOpcode Operand DescriptionSTA 16-bit address Store accumulator directThe contents of accumulator are copied into thememory location specified by the operand.Example: STA 2500 H
  11. 11. Data Transfer InstructionsOpcode Operand DescriptionSTAX Reg. pair Store accumulator indirectThe contents of accumulator are copied into thememory location specified by the contents of theregister pair.Example: STAX B
  12. 12. Data Transfer InstructionsOpcode Operand DescriptionSHLD 16-bit address Store H-L registers directThe contents of register L are stored into memorylocation specified by the 16-bit address.The contents of register H are stored into the nextmemory location.Example: SHLD 2550 H
  13. 13. Data Transfer InstructionsOpcode Operand DescriptionXCHG None Exchange H-L with D-EThe contents of register H are exchanged with thecontents of register D.The contents of register L are exchanged with thecontents of register E.Example: XCHG
  14. 14. Data Transfer InstructionsOpcode Operand DescriptionSPHL None Copy H-L pair to the Stack Pointer (SP)This instruction loads the contents of H-L pair intoSP.Example: SPHL
  15. 15. Data Transfer InstructionsOpcode Operand DescriptionXTHL None Exchange H–L with top of stackThe contents of L register are exchanged with thelocation pointed out by the contents of the SP.The contents of H register are exchanged with thenext location (SP + 1).Example: XTHL
  16. 16. Data Transfer InstructionsOpcode Operand DescriptionPCHL None Load program counter with H-L contentsThe contents of registers H and L are copied into theprogram counter (PC).The contents of H are placed as the high-order byteand the contents of L as the low-order byte.Example: PCHL
  17. 17. Data Transfer InstructionsOpcode Operand DescriptionPUSH Reg. pair Push register pair onto stackThe contents of register pair are copied onto stack.SP is decremented and the contents of high-orderregisters (B, D, H, A) are copied into stack.SP is again decremented and the contents of low-orderregisters (C, E, L, Flags) are copied into stack.Example: PUSH B
  18. 18. Data Transfer InstructionsOpcode Operand DescriptionPOP Reg. pair Pop stack to register pairThe contents of top of stack are copied into register pair.The contents of location pointed out by SP are copied tothe low-order register (C, E, L, Flags).SP is incremented and the contents of location are copiedto the high-order register (B, D, H, A).Example: POP H
  19. 19. Data Transfer InstructionsOpcode Operand DescriptionOUT 8-bit portaddressCopy data from accumulator to a port with 8-bit addressThe contents of accumulator are copied into the I/Oport.Example: OUT 78 H
  20. 20. Data Transfer InstructionsOpcode Operand DescriptionIN 8-bit portaddressCopy data to accumulator from a port with 8-bit addressThe contents of I/O port are copied into accumulator.Example: IN 8C H
  21. 21. Arithmetic InstructionsThese instructions perform the operations like:AdditionSubtractIncrementDecrement
  22. 22. AdditionAny 8-bit number, or the contents of register, or thecontents of memory location can be added to thecontents of accumulator.The result (sum) is stored in the accumulator.No two other 8-bit registers can be added directly.Example: The contents of register B cannot beadded directly to the contents of register C.
  23. 23. SubtractionAny 8-bit number, or the contents of register, or thecontents of memory location can be subtracted fromthe contents of accumulator.The result is stored in the accumulator.Subtraction is performed in 2’s complement form.If the result is negative, it is stored in 2’s complementform.No two other 8-bit registers can be subtracteddirectly.
  24. 24. Increment / DecrementThe 8-bit contents of a register or a memory locationcan be incremented or decremented by 1.The 16-bit contents of a register pair can beincremented or decremented by 1.Increment or decrement can be performed on anyregister or a memory location.
  25. 25. Arithmetic InstructionsOpcode Operand DescriptionADD RMAdd register or memory to accumulatorThe contents of register or memory are added to the contents ofaccumulator.The result is stored in accumulator.If the operand is memory location, its address is specified by H-L pair.All flags are modified to reflect the result of the addition.Example: ADD B or ADD M
  26. 26. Arithmetic InstructionsOpcode Operand DescriptionADC RMAdd register or memory to accumulator withcarryThe contents of register or memory and Carry Flag (CY) are added tothe contents of accumulator.The result is stored in accumulator.If the operand is memory location, its address is specified by H-L pair.All flags are modified to reflect the result of the addition.Example: ADC B or ADC M
  27. 27. Arithmetic InstructionsOpcode Operand DescriptionADI 8-bit data Add immediate to accumulatorThe 8-bit data is added to the contents ofaccumulator.The result is stored in accumulator.All flags are modified to reflect the result of theaddition.Example: ADI 45 H
  28. 28. Arithmetic InstructionsOpcode Operand DescriptionACI 8-bit data Add immediate to accumulator with carryThe 8-bit data and the Carry Flag (CY) are added to thecontents of accumulator.The result is stored in accumulator.All flags are modified to reflect the result of the addition.Example: ACI 45 H
  29. 29. Arithmetic InstructionsOpcode Operand DescriptionDAD Reg. pair Add register pair to H-L pairThe 16-bit contents of the register pair are added to thecontents of H-L pair.The result is stored in H-L pair.If the result is larger than 16 bits, then CY is set.No other flags are changed.Example: DAD B
  30. 30. Arithmetic InstructionsOpcode Operand DescriptionSUB RMSubtract register or memory fromaccumulatorThe contents of the register or memory location are subtracted fromthe contents of the accumulator.The result is stored in accumulator.If the operand is memory location, its address is specified by H-L pair.All flags are modified to reflect the result of subtraction.Example: SUB B or SUB M
  31. 31. Arithmetic InstructionsOpcode Operand DescriptionSBB RMSubtract register or memory fromaccumulator with borrowThe contents of the register or memory location and Borrow Flag (i.e.CY) are subtracted from the contents of the accumulator.The result is stored in accumulator.If the operand is memory location, its address is specified by H-L pair.All flags are modified to reflect the result of subtraction.Example: SBB B or SBB M
  32. 32. Arithmetic InstructionsOpcode Operand DescriptionSUI 8-bit data Subtract immediate from accumulatorThe 8-bit data is subtracted from the contents of theaccumulator.The result is stored in accumulator.All flags are modified to reflect the result of subtraction.Example: SUI 45 H
  33. 33. Arithmetic InstructionsOpcode Operand DescriptionSBI 8-bit data Subtract immediate from accumulator withborrowThe 8-bit data and the Borrow Flag (i.e. CY) is subtractedfrom the contents of the accumulator.The result is stored in accumulator.All flags are modified to reflect the result of subtraction.Example: SBI 45 H
  34. 34. Arithmetic InstructionsOpcode Operand DescriptionINR RMIncrement register or memory by 1The contents of register or memory location areincremented by 1.The result is stored in the same place.If the operand is a memory location, its address isspecified by the contents of H-L pair.Example: INR B or INR M
  35. 35. Arithmetic InstructionsOpcode Operand DescriptionINX R Increment register pair by 1The contents of register pair are incremented by 1.The result is stored in the same place.Example: INX H
  36. 36. Arithmetic InstructionsOpcode Operand DescriptionDCR RMDecrement register or memory by 1The contents of register or memory location aredecremented by 1.The result is stored in the same place.If the operand is a memory location, its address isspecified by the contents of H-L pair.Example: DCR B or DCR M
  37. 37. Arithmetic InstructionsOpcode Operand DescriptionDCX R Decrement register pair by 1The contents of register pair are decremented by 1.The result is stored in the same place.Example: DCX H
  38. 38. Logical InstructionsThese instructions perform logical operations on datastored in registers, memory and status flags.The logical operations are:ANDORXORRotateCompareComplement
  39. 39. AND, OR, XORAny 8-bit data, or the contents of register, or memorylocation can logically haveAND operationOR operationXOR operationwith the contents of accumulator.The result is stored in accumulator.
  40. 40. RotateEach bit in the accumulator can be shifted either leftor right to the next position.
  41. 41. CompareAny 8-bit data, or the contents of register, or memorylocation can be compares for:EqualityGreater ThanLess Thanwith the contents of accumulator.The result is reflected in status flags.
  42. 42. ComplementThe contents of accumulator can be complemented.Each 0 is replaced by 1 and each 1 is replaced by 0.
  43. 43. Logical InstructionsOpcode Operand DescriptionCMP RMCompare register or memory withaccumulatorThe contents of the operand (register or memory) arecompared with the contents of the accumulator.Both contents are preserved .The result of the comparison is shown by setting theflags of the PSW as follows:
  44. 44. Logical InstructionsOpcode Operand DescriptionCMP RMCompare register or memory withaccumulatorif (A) < (reg/mem): carry flag is setif (A) = (reg/mem): zero flag is setif (A) > (reg/mem): carry and zero flags are reset.Example: CMP B or CMP M
  45. 45. Logical InstructionsOpcode Operand DescriptionCPI 8-bit data Compare immediate with accumulatorThe 8-bit data is compared with the contents ofaccumulator.The values being compared remain unchanged.The result of the comparison is shown by setting theflags of the PSW as follows:
  46. 46. Logical InstructionsOpcode Operand DescriptionCPI 8-bit data Compare immediate with accumulatorif (A) < data: carry flag is setif (A) = data: zero flag is setif (A) > data: carry and zero flags are resetExample: CPI 89H
  47. 47. Logical InstructionsOpcode Operand DescriptionANA RMLogical AND register or memory withaccumulatorThe contents of the accumulator are logically ANDed with thecontents of register or memory.The result is placed in the accumulator.If the operand is a memory location, its address is specified by thecontents of H-L pair.S, Z, P are modified to reflect the result of the operation.CY is reset and AC is set.Example: ANA B or ANA M.
  48. 48. Logical InstructionsOpcode Operand DescriptionANI 8-bit data Logical AND immediate with accumulatorThe contents of the accumulator are logically ANDed withthe 8-bit data.The result is placed in the accumulator.S, Z, P are modified to reflect the result.CY is reset, AC is set.Example: ANI 86H.
  49. 49. Logical InstructionsOpcode Operand DescriptionXRA RMExclusive OR register or memory withaccumulator The contents of the accumulator are XORed with the contents of the register ormemory. The result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of H-L pair. S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: XRA B or XRA M.
  50. 50. Logical InstructionsOpcode Operand DescriptionORA RMLogical OR register or memory withaccumulator The contents of the accumulator are logically ORed with the contents of the register ormemory. The result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of H-L pair. S, Z, P are modified to reflect the result. CY and AC are reset. Example: ORA B or ORA M.
  51. 51. Logical InstructionsOpcode Operand DescriptionORI 8-bit data Logical OR immediate with accumulatorThe contents of the accumulator are logically ORed withthe 8-bit data.The result is placed in the accumulator.S, Z, P are modified to reflect the result.CY and AC are reset.Example: ORI 86H.
  52. 52. Logical InstructionsOpcode Operand DescriptionXRA RMLogical XOR register or memory withaccumulatorThe contents of the accumulator are XORed with the contentsof the register or memory.The result is placed in the accumulator.If the operand is a memory location, its address is specified bythe contents of H-L pair.S, Z, P are modified to reflect the result of the operation.CY and AC are reset.Example: XRA B or XRA M.
  53. 53. Logical InstructionsOpcode Operand DescriptionXRI 8-bit data XOR immediate with accumulatorThe contents of the accumulator are XORed with the8-bit data.The result is placed in the accumulator.S, Z, P are modified to reflect the result.CY and AC are reset.Example: XRI 86H.
  54. 54. Logical InstructionsOpcode Operand DescriptionRLC None Rotate accumulator leftEach binary bit of the accumulator is rotated left by oneposition.Bit D7 is placed in the position of D0 as well as in theCarry flag.CY is modified according to bit D7.S, Z, P, AC are not affected.Example: RLC.
  55. 55. Logical InstructionsOpcode Operand DescriptionRRC None Rotate accumulator rightEach binary bit of the accumulator is rotated right by oneposition.Bit D0 is placed in the position of D7 as well as in theCarry flag.CY is modified according to bit D0.S, Z, P, AC are not affected.Example: RRC.
  56. 56. Logical InstructionsOpcode Operand DescriptionRAL None Rotate accumulator left through carryEach binary bit of the accumulator is rotated left by oneposition through the Carry flag.Bit D7 is placed in the Carry flag, and the Carry flag isplaced in the least significant position D0.CY is modified according to bit D7.S, Z, P, AC are not affected.Example: RAL.
  57. 57. Logical InstructionsOpcode Operand DescriptionRAR None Rotate accumulator right through carryEach binary bit of the accumulator is rotated right by oneposition through the Carry flag.Bit D0 is placed in the Carry flag, and the Carry flag isplaced in the most significant position D7.CY is modified according to bit D0.S, Z, P, AC are not affected.Example: RAR.
  58. 58. Logical InstructionsOpcode Operand DescriptionCMA None Complement accumulatorThe contents of the accumulator are complemented.No flags are affected.Example: CMA.
  59. 59. Logical InstructionsOpcode Operand DescriptionCMC None Complement carryThe Carry flag is complemented.No other flags are affected.Example: CMC.
  60. 60. Logical InstructionsOpcode Operand DescriptionSTC None Set carryThe Carry flag is set to 1.No other flags are affected.Example: STC.
  61. 61. Branching InstructionsThe branching instruction alter the normal sequentialflow.These instructions alter either unconditionally orconditionally.
  62. 62. Branching InstructionsOpcode Operand DescriptionJMP 16-bit address Jump unconditionallyThe program sequence is transferred to the memorylocation specified by the 16-bit address given in theoperand.Example: JMP 2034 H.
  63. 63. Branching InstructionsOpcode Operand DescriptionJx 16-bit address Jump conditionallyThe program sequence is transferred to the memorylocation specified by the 16-bit address given in theoperand based on the specified flag of the PSW.Example: JZ 2034 H.
  64. 64. Jump ConditionallyOpcode Description Status FlagsJC Jump if Carry CY = 1JNC Jump if No Carry CY = 0JP Jump if Positive S = 0JM Jump if Minus S = 1JZ Jump if Zero Z = 1JNZ Jump if No Zero Z = 0JPE Jump if Parity Even P = 1JPO Jump if Parity Odd P = 0
  65. 65. Branching InstructionsOpcode Operand DescriptionCALL 16-bit address Call unconditionallyThe program sequence is transferred to the memorylocation specified by the 16-bit address given in theoperand.Before the transfer, the address of the next instructionafter CALL (the contents of the program counter) ispushed onto the stack.Example: CALL 2034 H.
  66. 66. Branching InstructionsOpcode Operand DescriptionCx 16-bit address Call conditionallyThe program sequence is transferred to the memorylocation specified by the 16-bit address given in theoperand based on the specified flag of the PSW.Before the transfer, the address of the nextinstruction after the call (the contents of the programcounter) is pushed onto the stack.Example: CZ 2034 H.
  67. 67. Call ConditionallyOpcode Description Status FlagsCC Call if Carry CY = 1CNC Call if No Carry CY = 0CP Call if Positive S = 0CM Call if Minus S = 1CZ Call if Zero Z = 1CNZ Call if No Zero Z = 0CPE Call if Parity Even P = 1CPO Call if Parity Odd P = 0
  68. 68. Branching InstructionsOpcode Operand DescriptionRET None Return unconditionallyThe program sequence is transferred from thesubroutine to the calling program.The two bytes from the top of the stack are copiedinto the program counter, and program executionbegins at the new address.Example: RET.
  69. 69. Branching InstructionsOpcode Operand DescriptionRx None Call conditionallyThe program sequence is transferred from thesubroutine to the calling program based on thespecified flag of the PSW.The two bytes from the top of the stack are copiedinto the program counter, and program executionbegins at the new address.Example: RZ.
  70. 70. Return ConditionallyOpcode Description Status FlagsRC Return if Carry CY = 1RNC Return if No Carry CY = 0RP Return if Positive S = 0RM Return if Minus S = 1RZ Return if Zero Z = 1RNZ Return if No Zero Z = 0RPE Return if Parity Even P = 1RPO Return if Parity Odd P = 0
  71. 71. Branching InstructionsOpcode Operand DescriptionRST 0 – 7 Restart (Software Interrupts)The RST instruction jumps the control to one of eightmemory locations depending upon the number.These are used as software instructions in a programto transfer program execution to one of the eightlocations.Example: RST 3.
  72. 72. Restart Address TableInstructions Restart AddressRST 0 0000 HRST 1 0008 HRST 2 0010 HRST 3 0018 HRST 4 0020 HRST 5 0028 HRST 6 0030 HRST 7 0038 H
  73. 73. Control InstructionsThe control instructions control the operation ofmicroprocessor.
  74. 74. Control InstructionsOpcode Operand DescriptionNOP None No operationNo operation is performed.The instruction is fetched and decoded but nooperation is executed.Example: NOP
  75. 75. Control InstructionsOpcode Operand DescriptionHLT None HaltThe CPU finishes executing the current instructionand halts any further execution.An interrupt or reset is necessary to exit from the haltstate.Example: HLT
  76. 76. Control InstructionsOpcode Operand DescriptionDI None Disable interruptThe interrupt enable flip-flop is reset and all theinterrupts except the TRAP are disabled.No flags are affected.Example: DI
  77. 77. Control InstructionsOpcode Operand DescriptionEI None Enable interruptThe interrupt enable flip-flop is set and all interruptsare enabled.No flags are affected.This instruction is necessary to re-enable theinterrupts (except TRAP).Example: EI
  78. 78. Control InstructionsOpcode Operand DescriptionRIM None Read Interrupt MaskThis is a multipurpose instruction used to read thestatus of interrupts 7.5, 6.5, 5.5 and read serial datainput bit.The instruction loads eight bits in the accumulatorwith the following interpretations.Example: RIM
  79. 79. RIM Instruction
  80. 80. Control InstructionsOpcode Operand DescriptionSIM None Set Interrupt MaskThis is a multipurpose instruction and used toimplement the 8085 interrupts 7.5, 6.5, 5.5, and serialdata output.The instruction interprets the accumulator contentsas follows.Example: SIM
  81. 81. SIM Instruction

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