2. • Explain the function of the following instructions with one example.
• (i) LXI
• (ii) HLT
• (iii) LDAX
• (iv) CMP
• (v) STA
• (vi) SHLD
3. LXI
In the 8085 Instruction set there are four instructions, which belong to
the type LXI rp, d16.
These instructions are used to load the 16-bit address into the register
pair.
We can use this instruction to load data from memory location using the
memory address, which is stored in the register pair rp.
For an example, if the instruction is LXI H, FE50. It means that the
FE50 is loaded into the HL register pair.
The rp can be BC, DE, HL or SP.
4.
5. HLT
In 8085 Instruction set, HLT is the mnemonic which stands for ‘Halt the
microprocessor’ instruction.
It is having a size of 1-Byte instruction. Using these particular
instructions, as 8085 enters into the halt state, so we can put the 8085
from further processing of next instructions.
This is indicated by S1 and S0 control signals. During the halt, S1 and
S0 output signals will become 0 0.
In most programs, the HLT instruction is used for terminating the
program.
6.
7. LDAX
In 8085 Instruction set, LDAX is a mnemonic that stands for LoaD
Accumulator from memory pointed by eXtended register pair
denoted as “rp” in the instruction. This instruction uses register
indirect addressing for specifying the data.
It occupies only 1-Byte in the memory.
This “rp” can be either BC register pair represented by B or DE
register pair represented by D.
LDAX H is not provided in 8085 instruction set. This is because,
LDAX H is the same as MOV A, M in its function.
8.
9. CMP
COMPARE is an important instruction widely used in 8085
microprocessor. The 8085 instruction set has two types of Compare
operations: Compare with accumulator (CMP) and Compare
immediate with accumulator (CPI).
This is a 1-byte instruction. It compares the data byte in the
register or memory with the contents of accumulator.
1. If A less than (R/M), the CY flag is set and Zero flag is reset.
2. If A equals to (R/M), the Zero flag is set and CY flag is reset.
3. If A greater than (R/M), the CY and Zero flag are reset.
10. Example:
Let register B contains data byte 62H and the
accumulator A contains 57H.
Then, Instruction- CMP B
Before execution: A = 57, B = 62
After execution: A = 57, B = 62
Flags: As A less than B, thus CY is set and Z flag is reset.
CY=1, Z=0
11. STA
• In 8085 Instruction set, STA is a mnemonic that stands
for Store Accumulator contents in memory.
• This instruction occupies 3-Bytes of memory. First Byte
is required for the opcode, and next successive 2-Bytes
provide the 16-bit address divided into 8-bits each
consecutively.
14. Instruction Set of 8085
• An instruction is a binary pattern designed inside a
microprocessor to perform a specific function.
• The entire group of instructions that a microprocessor
supports is called Instruction Set.
• 8085 has 246 instructions.
• Each instruction is represented by an 8-bit binary value.
• These 8-bits of binary value is called Op-Code or
Instruction Byte.
14
15. Classification of Instruction Set
• Data Transfer Instruction
• Arithmetic Instructions
• Logical Instructions
• Branching Instructions
• Control Instructions
15
16. 1. Data Transfer Instructions
• These instructions move data between registers, or
between memory and registers.
• These instructions copy data from source to destination
(without changing the original data ).
16
17. MOV-Copy from source to destination
Opcode Operand
MOV Rd, Rs
M, Rs
Rd, M
17
This instruction copies the contents of the source register
into the destination register. (contents of the source register
are not altered)
If one of the operands is a memory location, its location is
specified by the contents of the HL registers.
Example: MOV B, C or MOV B, M
18. A 20 B 20
18
A F
B 30 C
D E
H 20 L 50
A 20 B
BEFORE EXECUTION AFTER EXECUTION
MOV B,A
A F
B 30 C
D E
H 20 L 50
A F
B C
D E
H 20 L 50
A F
B C 40
D E
H 20 L 50
MOV M,B
MOV C,M
40 40
30
19. Opcode Operand
MVI Rd, Data
M, Data
The 8-bit data is stored in the destination register or memory.
If the operand is a memory location, its location is specified
by the contents of the H-L registers.
Example: MVI B, 60H or MVI M, 40H
MVI-Move immediate 8-bit
19
20. A F
B C
D E
H L
A F
B 60 C
D E
H L
AFTER EXECUTION
BEFORE EXECUTION
MVI B,60H
40
HL=2050
2051H
204FH 204F
2051H
MVI M,40H
BEFORE EXECUTION AFTER EXECUTION
HL=2050
20
21. LDA-Load accumulator
Opcode Operand
LDA 16-bit address
The contents of a memory location, specified by a 16-bit
address in the operand, are copied to the accumulator.
The contents of the source are not altered.
Example: LDA 2000H
21
23. Opcode Operand
LDAX B/D Register Pair
The contents of the designated register pair point to a memory
location.
This instruction copies the contents of that memory location into
the accumulator.
The contents of either the register pair or the memory location are
not altered.
Example: LDAX D
LDAX-Load accumulator indirect
23
24. A F
B C
D 20 E 30
A 80 F
B C
D 20 E 30
80 80
AFTER EXECUTION
BEFORE EXECUTION
LDAX D
2030H 2030H
24
25. Opcode Operand
LXI Reg. pair, 16-bit data
This instruction loads 16-bit data in the register pair.
Example: LXI H, 2030 H
LXI-Load register pair immediate
25
26. A F
B C
H L
A 80 F
B C
H 90 L 30
30
90
50
AFTER EXECUTION
BEFORE EXECUTION
LXI H, 2030
2030H
9030H
2031H
M=50
26
27. Opcode Operand
LHLD 16-bit address
This instruction copies the contents of memory location pointed
out by 16-bit address into register L.
It copies the contents of next memory location into register H.
Example: LHLD 2030 H
LHLD-Load H and L registers direct
27
28. A F
B C
H L
A 80 F
B C
H 85 L 00
00
85
60
AFTER EXECUTION
BEFORE EXECUTION
LHLD 2030
2030H 8500H
M=60
28
29. Opcode Operand
STA 16-bit address
The contents of accumulator are copied into the memory
location specified by the operand.
Example: STA 2000H
STA-Store accumulator direct
29
31. Opcode Operand
STAX Reg. pair
The contents of accumulator are copied into the
memory location specified by the contents of
the register pair.
Example: STAX B
STAX-Store accumulator indirect
31
32. B 85 C 00
A=1AH
BEFORE EXECUTION AFTER EXECUTION
STAX B
1A
8500H
32
33. Opcode Operand
SHLD 16-bit address
The contents of register L are stored into memory location
specified by the 16-bit address.
The contents of register H are stored into the next memory
location.
Example: SHLD 2550H
SHLD-Store H and L registers direct
33
34. D E
H 70 L 80
BEFORE EXECUTION
AFTER EXECUTION
SHLD 8500
80
70
8500H
8501H
34
35. Opcode Operand
XCHG None
The contents of register H are exchanged with the contents of register D.
The contents of register L are exchanged with the contents of register E.
Example: XCHG
XCHG-Exchange H and L with D and E
35
36. D 20 E 40
H 70 L 80
D 70 E 80
H 20 L 40
BEFORE EXECUTION AFTER EXECUTION
XCHG
36
37. Opcode Operand
SPHL None
This instruction loads the contents of H-L pair into SP.
Example: SPHL
SPHL-Copy H and L registers to the
stack pointer
37
38. H 25 L 00
SP
BEFORE EXECUTION
AFTER EXECUTION
SPHL
SP 2500
H 25 L 00
38
39. Opcode Operand
XTHL None
The contents of L register are exchanged with the location
pointed out by the contents of the SP.
The contents of H register are exchanged with the next location
(SP + 1).
Example: XTHL
XTHL-Exchange H and L with top of stack
39
40. H 30 L 40
SP 2700
BEFORE EXECUTION
50
60
H
60
L
50
SP 2700
40
30
AFTER EXECUTION
XTHL
2700H
2701H
2702H
2700H
2701H
2702H
L=SP
H=(SP+1)
40
41. Opcode Operand
PUSH Reg. pair
The contents of register pair are copied onto stack.
SP is decremented and the contents of high-order registers
(B, D, H, A) are copied into stack.
SP is again decremented and the contents of low-order registers
(C, E, L, Flags) are copied into stack.
Example: PUSH B
PUSH-Push register pair onto stack
41
43. Opcode Operand
POP Reg. pair
The contents of top of stack are copied into register pair.
The contents of location pointed out by SP are copied to the low-
order register (C, E, L, Flags).
SP is incremented and the contents of location are copied to
the high-order register (B, D, H, A).
Example: POP H
POP- Pop stack to register pair
43
45. Opcode Operand
IN 8-bit port address
The contents of I/O port are copied into
accumulator.
Example: IN 8C H
IN- Copy data to accumulator
from a port with 8-bit address
45
46. 10 A
10 A 10
BEFORE EXECUTION
AFTER EXECUTION
IN 80H
PORT
80H
PORT
80H 46
47. Opcode Operand
OUT 8-bit port address
The contents of accumulator are copied into the I/O port.
Example: OUT 78H
OUT- Copy data from accumulator to a
port with 8-bit address
47
48. 10 A 40
40 A 40
BEFORE EXECUTION
AFTER EXECUTION
OUT 50H
PORT 50H
PORT 50H
48
50. Addition
Any 8-bit number, or the contents of register, or the contents
of memory location can be added to the contents of
accumulator.
The result (sum) is stored in the accumulator.
No two other 8-bit registers can be added directly.
Example: The contents of register B cannot be added
directly to the contents of register C.
50
51. Opcode Operand Description
ADD R
M
Add register or memory to
accumulator
The contents of register or memory are added to the contents of
accumulator.
The result is stored in accumulator.
If the operand is memory location, its address is specified by H-L pair.
Example: ADD B or ADD M
ADD
51
52. B C
05
D E
H L
B C 05
D E
H L
AFTER EXECUTION
BEFORE EXECUTION
B C
D E
H 20 L 50
B C
D E
H 20 L 50
AFTER EXECUTION
BEFORE EXECUTION
A 09
A
04
ADD C
A=A+C
ADD M
A=A+M
10
10
2050 2050
A 04 A 14
04+05=09
04+10=14 52
53. Opcode Operand Description
ADC R
M
Add register or memory to
accumulator with carry
The contents of register or memory and Carry Flag (CY) are
added to the contents of accumulator.
The result is stored in accumulator.
If the operand is memory location, its address is specified
by H-L pair.
All flags are modified to reflect the result of the addition.
Example: ADC B or ADC M
ADC
53
54. B C
05
D E
H L
A 50
B C 05
D E
H L
A 56
AFTER EXECUTION
BEFORE EXECUTION
ADC C
A=A+C+CY
CY
01
CY 1
A 06 A 37
H 20 L 50
H 20 L 50
ADC M
A=A+M+CY
AFTER EXECUTION
BEFORE EXECUTION
30 30
2050H 2050H
06+1+30=37
50+05+01=56
54
55. Opcode Operand Description
ADI 8-bit data Add immediate to accumulator
The 8-bit data is added to the contents of accumulator.
The result is stored in accumulator.
All flags are modified to reflect the result of the addition.
Example: ADI 45 H
ADI
55
57. Opcode Operand Description
ACI 8-bit data Add immediate to accumulator with
carry
The 8-bit data and the Carry Flag (CY) are added to the
contents of accumulator.
The result is stored in accumulator.
All flags are modified to reflect the result of the
addition.
Example: ACI 45 H
ACI
57
58. CY 1
A 05
AFTER EXECUTION
BEFORE EXECUTION
ACI 20H
A=A+DATA
(8)+CY
A 26
05+20+1=26
58
59. Opcode Operand Description
DAD Reg. pair Add register pair to H-L pair
The 16-bit contents of the register pair are added to the
contents of H-L pair.
The result is stored in H-L pair.
If the result is larger than 16 bits, then CY is set.
No other flags are changed.
Example: DAD B or DAD D
DAD
59
60. D 12 E 34
H 23 L 45
D 12 E 34
H 35 L 79
BEFORE EXECUTION AFTER EXECUTION
DAD D
DAD D HL=HL+DE
DAD B HL=HL+BC
1234
2345 +
-------
3579 60
61. Subtraction
Any 8-bit number, or the contents of register, or the
contents of memory location can be subtracted from the
contents of accumulator.
The result is stored in the accumulator.
Subtraction is performed in 2’s complement form.
If the result is negative, it is stored in 2’s complement
form.
No two other 8-bit registers can be subtracted directly.
61
62. Opcode Operand Description
SUB R
M
Subtract register or memory from
accumulator
The contents of the register or memory location are subtracted from the
contents of the accumulator.
The result is stored in accumulator.
If the operand is memory location, its address is specified by H-L pair.
All flags are modified to reflect the result of subtraction.
Example: SUB B or SUB M
SUB
62
63. B C
04
D E
H L
B C 04
D E
H L
AFTER EXECUTION
BEFORE EXECUTION
B C
D E
H 20 L 50
B C
D E
H 20 L 50
AFTER EXECUTION
BEFORE EXECUTION
A 05
A 09
SUB C
A=A-C
SUB M
A=A-M
10 10
2050
2050
A 14
A 04
09-04=05
14-10=04 63
64. Opcode Operand Description
SBB R
M
Subtract register or memory from accumulator
with borrow
The contents of the register or memory location and Borrow Flag
(i.e. CY) are subtracted from the contents of the accumulator.
The result is stored in accumulator.
If the operand is memory location, its address is specified by H-L
pair.
All flags are modified to reflect the result of subtraction.
Example: SBB B or SBB M
SBB
64
65. B C
05
D E
H L
A 08
B C 05
D E
H L
A 02
AFTER EXECUTION
BEFORE EXECUTION
SBB C
A=A-C-CY
CY
01
CY 1
A 06 A 03
H 20 L 50
H 20 L 50
SBB M
A=A-M-CY
AFTER EXECUTION
BEFORE EXECUTION
02 02
2050H 2050H
08-05-01=02
06-02-1=03 65
66. Opcode Operand Description
SUI 8-bit data Subtract immediate from
accumulator
The 8-bit data is subtracted from the contents of the
accumulator.
The result is stored in accumulator.
All flags are modified to reflect the result of subtraction.
Example: SUI 05H
SUI
66
68. Opcode Operand Description
SBI 8-bit data Subtract immediate from
accumulator with borrow
The 8-bit data and the Borrow Flag (i.e. CY) is subtracted
from the contents of the accumulator.
The result is stored in accumulator.
All flags are modified to reflect the result of subtraction.
Example: SBI 45 H
SBI
68
69. CY 1
A 25
AFTER EXECUTION
BEFORE EXECUTION
SBI 20H
A=A-DATA(8)-CY
A 04
25-20-01=04
69
70. Increment / Decrement
• The 8-bit contents of a register or a memory location can
be incremented or decremented by 1.
• The 16-bit contents of a register pair can be incremented
or decremented by 1.
• Increment or decrement can be performed on any register
or a memory location.
70
71. Opcode Operand Description
INR R
M
Increment register or memory by 1
The contents of register or memory location are incremented by 1.
The result is stored in the same place.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
Example: INR B or INR M
INR
71
72. B 10 C
D E
H L
A
B 11 C
D E
H L
A
AFTER EXECUTION
H
20
L
50
H
20
L
50
10 11
2050H
2050H
AFTER EXECUTION
BEFORE EXECUTION
INR M
M=M+1
B 10 C
D E
H L
A
BEFORE EXECUTION
INR B
R=R+1
10+1=11
10+1=11 72
73. Opcode Operand Description
INX R Increment register pair by 1
The contents of register pair are incremented by 1.
The result is stored in the same place.
Example: INX H or INX B or INX D
INX
73
74. B C
D E
H 10 L 20
B C
D E
H 10 L 21
AFTER EXECUTION
BEFORE EXECUTION
SP
SP
INX H
RP=RP+1
1020+1=1021
74
75. Opcode Operand Description
DCR R
M
Decrement register or memory by 1
The contents of register or memory location are decremented by 1.
The result is stored in the same place.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
Example: DCR B or DCR M
DCR
75
76. B C
D E 19
H L
A
AFTER EXECUTION
B C
D E 20
H L
A
BEFORE EXECUTION
DCR E
R=R-1
H
20
L
50
H
20
L
50
21 20
2050H
AFTER EXECUTION
BEFORE EXECUTION
DCR M
M=M-1
2050H
21-1=20
20-1=19
76
77. Opcode Operand Description
DCX R Decrement register pair by 1
The contents of register pair are decremented by 1.
The result is stored in the same place.
Example: DCX H or DCX B or DCX D
DCX
77
78. B C
D E
H 10 L 21
B C
D E
H 10 L 20
AFTER EXECUTION
BEFORE EXECUTION
SP
SP
DCX H
RP=RP-1
78
79. 3. Logical Instructions
These instructions perform logical operations on data stored in
registers, memory and status flags.
The logical operations are:
AND
OR
XOR
Rotate
Compare
Complement
79
80. AND, OR, XOR
Any 8-bit data, or the contents of register, or memory
location can logically have
AND operation
OR operation
XOR operation
with the contents of accumulator.
The result is stored in accumulator.
80
81. Opcode Operand Description
ANA R
M
Logical AND register or memory with
accumulator
The contents of the accumulator are logically ANDed with the contents
of register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
S, Z, P are modified to reflect the result of the operation.
CY is reset and AC is set.
Example: ANA B or ANA M.
81
82. B 10 C
D E
H L
A
B 0F C
D E
H L
A 0A
AFTER EXECUTION
ANA B
A=A and R
B 0F C
D E
H L
A AA
BEFORE EXECUTION
CY AC CY 0 AC 1
AFTER EXECUTION
BEFORE EXECUTION
CY AC CY 0 AC 1
A 11
A 55
H 20 L 50 H 20 L 50
B3 B3
2050H
ANA M
A=A and M
2050H
1010 1010=AAH
0000 1111=0FH
0000 1010=0AH
0101 0101=55H
1011 0011=B3H
0001 0001=11H
82
83. Opcode Operand Description
ANI 8-bit data Logical AND immediate with accumulator
The contents of the accumulator are logically ANDed with the 8-bit data.
The result is placed in the accumulator.
S, Z, P are modified to reflect the result.
CY is reset, AC is set.
Example: ANI 86H.
83
84. CY AC
A B3
AFTER EXECUTION
BEFORE EXECUTION
CY 0 AC 1
A 33
ANI 3FH
A=A and DATA(8)
1011 0011=B3H
0011 1111=3FH
0011 0011=33H
84
85. Opcode Operand Description
ORA R
M
Logical OR register or memory with
accumulator
The contents of the accumulator are logically ORed with the contents
of the register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: ORA B or ORA M.
85
86. AFTER EXECUTION
BEFORE EXECUTION
CY AC
ORA B
A=A or R
1010 1010=AAH
0001 0010=12H
1011 1010=BAH
B 12 C
D E
H L
A AA
B 12 C
D E
H L
A BA
CY 0 AC 0
86
87. AFTER EXECUTION
BEFORE EXECUTION
CY AC
ORA M
A=A or M
0101 0101=55H
1011 0011=B3H
1111 0111=F7H
H 20 L 50
A 55
A F7
CY 0 AC 0
H 20 L 50
B3
B3
2050H 2050H
87
88. Opcode Operand Description
ORI 8-bit data Logical OR immediate with accumulator
The contents of the accumulator are logically ORed with the 8-bit data.
The result is placed in the accumulator.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: ORI 86H.
88
89. CY AC
A B3
AFTER EXECUTION
BEFORE EXECUTION
CY 0 AC 0
A BB
ORI 08H
A=A or DATA(8)
1011 0011=B3H
0000 1000=08H
1011 1011=BBH
89
90. Opcode Operand Description
XRA R
M
Logical XOR register or memory with
accumulator
The contents of the accumulator are XORed with the contents of the
register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
S, Z, P are modified to reflect the result of the operation.
CY and AC are reset.
Example: XRA B or XRA M.
90
91. B 10 C
D E
H L
A
B C 2D
D E
H L
A 87
AFTER EXECUTION
XRA C
A=A xor R
B C 2D
D E
H L
A AA
BEFORE EXECUTION
CY AC CY 0 AC 0
1010 1010=AAH
0010 1101=2DH
1000 0111=87H
91
92. H 20 L 50
A 55
AFTER EXECUTION
XRA M
A=A xor M
BEFORE EXECUTION
CY AC CY 0 AC 0
0101 0101=55H
1011 0011=B3H
1110 0110=E6H
H 20 L 50
A E6
B3 B3
2050H
2050H
92
93. Opcode Operand Description
XRI 8-bit data XOR immediate with accumulator
The contents of the accumulator are XORed with the 8-bit data.
The result is placed in the accumulator.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: XRI 86H.
93
94. CY AC
A B3
AFTER EXECUTION
BEFORE EXECUTION
CY 0 AC 0
A 8A
XRI 39H
A=A xor DATA(8)
1011 0011=B3H
0011 1001=39H
1000 1010=8AH
94
95. Compare
Any 8-bit data, or the contents of register, or memory
location can be compares for:
Equality
Greater Than
Less Than
with the contents of accumulator.
The result is reflected in status flags.
95
96. Opcode Operand Description
CMP R
M
Compare register or memory with
accumulator
The contents of the operand (register or memory) are compared
with the contents of the accumulator.
Both contents are preserved .
96
97. B 10 C
D E
H L
A
B C
D 20 E
H L
A 10
AFTER EXECUTION
CMP D
A-R
B C
D 20 E
H L
A 10
BEFORE EXECUTION
CY Z CY 01 Z 0
AFTER EXECUTION
BEFORE EXECUTION
CY Z CY 0
ZF 1
A B8
A B8
H 20 L 50 H 20 L 50
B8 B8
2050H
CMP M
A-M
2050H
A>R: CY=0
A=R: ZF=1
A<R: CY=1
A>M: CY=0
A=M: ZF=1
A<M: CY=1
10<20:CY=01
B8=B8 :ZF=01 97
98. Opcode Operand Description
CPI 8-bit data Compare immediate with accumulator
The 8-bit data is compared with the contents of accumulator.
The values being compared remain unchanged.
98
99. CY Z
A BA
AFTER EXECUTION
BEFORE EXECUTION
CY 0 AC 0
A BA
CPI 30H
A-DATA
A>DATA: CY=0
A=DATA: ZF=1
A<DATA: CY=1
BA>30 : CY=00
99
100. Rotate
• Each bit in the accumulator can be shifted either left or
right to the next position.
100
101. Opcode Operand Description
RLC None Rotate accumulator left
Each binary bit of the accumulator is rotated left by one
position.
Bit D7 is placed in the position of D0 as well as in the Carry
flag.
CY is modified according to bit D7.
S, Z, P, AC are not affected.
Example: RLC.
101
103. Opcode Operand Description
RRC None Rotate accumulator right
Each binary bit of the accumulator is rotated right by one
position.
Bit D0 is placed in the position of D7 as well as in the Carry
flag.
CY is modified according to bit D0.
S, Z, P, AC are not affected.
Example: RRC.
103
105. Opcode Operand Description
RAL None Rotate accumulator left through
carry
Each binary bit of the accumulator is rotated left by one position
through the Carry flag.
Bit D7 is placed in the Carry flag, and the Carry flag is placed in the
least significant position D0.
CY is modified according to bit D7.
S, Z, P, AC are not affected.
Example: RAL.
105
107. Opcode Operand Description
RAR None Rotate accumulator right through carry
Each binary bit of the accumulator is rotated right by one
position through the Carry flag.
Bit D0 is placed in the Carry flag, and the Carry flag is placed in
the most significant position D7.
CY is modified according to bit D0.
S, Z, P, AC are not affected.
Example: RAR.
107
109. Complement
• The contents of accumulator can be complemented.
• Each 0 is replaced by 1 and each 1 is replaced by 0.
109
110. Opcode Operand Description
CMA None Complement accumulator
The contents of the accumulator are complemented.
No flags are affected.
Example: CMA. A=A’
A 00 A FF
BEFORE EXECUTION AFTER EXECUTION
110
111. Opcode Operand Description
CMC None Complement carry
The Carry flag is complemented.
No other flags are affected.
Example: CMC => c=c’
BEFORE EXECUTION AFTER EXECUTION
C 00 C FF
111
112. Opcode Operand Description
STC None Set carry
The Carry flag is set to 1.
No other flags are affected.
Example: STC CF=1
S-set (1) C-clear (0) 112
113. 4.Branching Instructions
• The branch group instructions allows the microprocessor to
change the sequence of program either conditionally or
under certain test conditions. The group includes,
(1) Jump instructions
(2) Call and Return instructions
(3) Restart instructions
113
114. Opcode Operand Description
JMP 16-bit
address
Jump unconditionally
The program sequence is transferred to the memory
location specified by the 16-bit address given in the
operand.
Example: JMP 2034 H.
114
115. Opcode Operand Description
Jx 16-bit
address
Jump conditionally
The program sequence is transferred to the memory
location specified by the 16-bit address given in the
operand based on the specified flag of the PSW.
Example: JZ 2034 H.
115
116. Jump Conditionally
Opcode Description Status Flags
JC Jump if Carry CY = 1
JNC Jump if No Carry CY = 0
JZ Jump if Zero Z = 1
JNZ Jump if No Zero Z = 0
JPE Jump if Parity Even P = 1
JPO Jump if Parity Odd P = 0
A-Above , B-Below , C-Carry , Z-Zero , P-Parity
116
117. Opcode Operand Description
CALL 16-bit
address
Call unconditionally
The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand.
Before the transfer, the address of the next instruction after CALL
(the contents of the program counter) is pushed onto the stack.
Example: CALL 2034 H.
117
118. Call Conditionally
Opcode Description Status Flags
CC Call if Carry CY = 1
CNC Call if No Carry CY = 0
CP Call if Positive S = 0
CM Call if Minus S = 1
CZ Call if Zero Z = 1
CNZ Call if No Zero Z = 0
CPE Call if Parity Even P = 1
CPO Call if Parity Odd P = 0
118
119. Opcode Operand Description
RET None Return unconditionally
The program sequence is transferred from the subroutine
to the calling program.
The two bytes from the top of the stack are copied into
the program counter, and program execution begins at
the new address.
Example: RET.
119
120. Return Conditionally
Opcode Description Status Flags
RC Return if Carry CY = 1
RNC Return if No Carry CY = 0
RP Return if Positive S = 0
RM Return if Minus S = 1
RZ Return if Zero Z = 1
RNZ Return if No Zero Z = 0
RPE Return if Parity Even P = 1
RPO Return if Parity Odd P = 0
120
121. Opcode Operand Description
RST 0 – 7 Restart (Software Interrupts)
The RST instruction jumps the control to one of eight
memory locations depending upon the number.
These are used as software instructions in a program to
transfer program execution to one of the eight locations.
Example: RST 1 or RST 2 ….
121
124. Opcode Operand Description
NOP None No operation
No operation is performed.
The instruction is fetched and decoded but no operation
is executed.
Example: NOP
124
125. Opcode Operand Description
HLT None Halt
The CPU finishes executing the current instruction and
halts any further execution.
An interrupt or reset is necessary to exit from the halt
state.
Example: HLT
125
126. Opcode Operand Description
DI None Disable interrupt
The interrupt enable flip-flop is reset and all the
interrupts except the TRAP are disabled.
No flags are affected.
Example: DI
126
127. Opcode Operand Description
EI None Enable interrupt
The interrupt enable flip-flop is set and all interrupts
are enabled.
No flags are affected.
This instruction is necessary to re-enable the
interrupts (except TRAP).
Example: EI
127
128. Opcode Operand Description
RIM None Read Interrupt Mask
This is a multipurpose instruction used to read the status
of interrupts 7.5, 6.5, 5.5 and read serial data input bit.
The instruction loads eight bits in the accumulator with
the following interpretations.
Example: RIM
128
130. Opcode Operand Description
SIM None Set Interrupt Mask
This is a multipurpose instruction and used to implement
the 8085 interrupts 7.5, 6.5, 5.5, and serial data output.
The instruction interprets the accumulator contents as
follows.
Example: SIM
130
133. Example Data Transfer (Copy)
Operations / Instructions
1. Load a 8-bit number 4F in
register B
2. Copy from Register B to
Register A
3. Load a 16-bit number 2050 in
Register pair HL
4. Copy from Register B to
Memory Address 2050
5. Copy between Input / Output
Port and Accumulator
MVI B, 4FH
MOV A,B
LXI H, 2050H
MOV M,B
OUT 01H
IN 07H
133
134. Example Arithmetic
Operations / Instructions
1. Add a 8-bit number 32H to
Accumulator
2. Add contents of Register B to
Accumulator
3. Subtract a 8-bit number 32H from
Accumulator
4. Subtract contents of Register C
from Accumulator
5. Increment the contents of Register
D by 1
6. Decrement the contents of
Register E by 1
ADI 32H
ADD B
SUI 32H
SUB C
INR D
DCR E
134
135. Example Logical & Bit Manipulation
Operations / Instructions
1. Logically AND Register H with
Accumulator
2. Logically OR Register L with
Accumulator
3. Logically XOR Register B with
Accumulator
4. Compare contents of Register C
with Accumulator
5. Complement Accumulator
6. Rotate Accumulator Left
ANA H
ORA L
XRA B
CMP C
CMA
RAL
135
136. Example Branching
Operations / Instructions
1. Jump to a 16-bit Address 2080H if
Carry flag is SET
2. Unconditional Jump
3. Call a subroutine with its 16-bit
Address
4. Return back from the Call
5. Call a subroutine with its 16-bit
Address if Carry flag is RESET
6. Return if Zero flag is SET
JC 2080H
JMP 2050H
CALL 3050H
RET
CNC 3050H
RZ
136
137. Writing a Assembly Language Program
• Steps to write a program
• Analyze the problem
• Develop program Logic
• Write an Algorithm
• Make a Flowchart
• Write program Instructions using Assembly language of
8085
137
138. Program 8085 in Assembly language to add two 8-bit numbers and store
8-bit result in register C.
1. Analyze the problem
• Addition of two 8-bit numbers to be done
2. Program Logic
• Add two numbers
• Store result in register C
• Example
10011001 (99H) A
+00111001 (39H) D
11010010 (D2H) C
138
139. 1. Get two numbers
2. Add them
3. Store result
4. Stop
• Load 1st no. in register D
• Load 2nd no. in register E
3. Algorithm Translation to 8085
operations
• Copy register D to A
• Add register E to A
• Copy A to register C
• Stop processing
139
140. 4. Make a Flowchart
Start
Load Registers D, E
Copy D to A
Add A and E
Copy A to C
Stop
• Load 1st no. in register D
• Load 2nd no. in register E
• Copy register D to A
• Add register E to A
• Copy A to register C
• Stop processing
140
141. 5. Assembly Language Program
1. Get two numbers
2. Add them
3. Store result
4. Stop
a) Load 1st no. in register D
b) Load 2nd no. in register E
a) Copy register D to A
b) Add register E to A
a) Copy A to register C
a) Stop processing
MVI D, 2H
MVI E, 3H
MOV A, D
ADD E
MOV C, A
HLT
141
142. Program 8085 in Assembly language to add two 8-bit numbers. Result
can be more than 8-bits.
1. Analyze the problem
• Result of addition of two 8-bit numbers can be 9-bit
• Example
10011001 (99H) A
+10011001 (99H) B
100110010 (132H)
• The 9th bit in the result is called CARRY bit.
142
143. 0
• How 8085 does it?
• Adds register A and B
• Stores 8-bit result in A
• SETS carry flag (CY) to indicate carry bit
10011001
10011001
A
B
+
99H
99H
10011001 A
1
CY
00110010 99H
32H
143
144. • Storing result in Register memory
10011001
A
32H
1
CY
Register C
Register B
Step-1 Copy A to C
Step-2
a) Clear register B
b) Increment B by 1
144
145. 2. Program Logic
1. Add two numbers
2. Copy 8-bit result in A to C
3. If CARRY is generated
• Handle it
4. Result is in register pair BC
145
146. 1. Load two numbers in
registers D, E
2. Add them
3. Store 8 bit result in C
4. Check CARRY flag
5. If CARRY flag is SET
• Store CARRY in
register B
6. Stop
• Load registers D, E
3. Algorithm
Translation to 8085
operations
• Copy register D to A
• Add register E to A
• Copy A to register C
• Stop processing
• Use Conditional Jump
instructions
• Clear register B
• Increment B
• Copy A to register C
146
147. 4. Make a Flowchart
Start
Load Registers D, E
Copy D to A
Add A and E
Copy A to C
Stop
If
CARRY
NOT SET
Clear B
Increment B
False
True
147
148. 5. Assembly Language Program
MVI D, 2H
MVI E, 3H
MOV A, D
ADD E
MOV C, A
HLT
• Load registers D, E
• Copy register D to A
• Add register E to A
• Copy A to register C
• Stop processing
• Use Conditional Jump
instructions
• Clear register B
• Increment B
• Copy A to register C
JNC END
MVI B, 0H
INR B
END:
148
153. Addition of 16 bit numbers using 16-bit operation:
Algorithm:
1.Load both the lower and the higher bits of the first number at once.
2.Copy the first number to another registered pair.
3.Load both the lower and the higher bits of second number at once.
4.Add both the register pairs and store the result in a memory location.
154.
155. Multiplication of 8-Bit Numbers in 8085 Microprocessor
The following three cases can arise for the multiplication of different
8-bit numbers:
(i) The generated result is a 8-bit number
eg: 02H x 03H = 06H
(ii) The generated result is a 9-bit number with “1” at the ninth bit
eg: FFH x 02H = 1FEH
(iii) The generated result is lager than 9-bit number
eg: A7H x F2H = 9DDEH
157. LDA 4200H // Fetched the Multiplicand
MOV B,A
LDA 4201H // Fetched the Multiplier
MOV D,A
MVI A,00H // Cleared the Accumulator for multiple addition of the Multiplicand
L1: ADD B
DCR D
JNZ L1 // Repeated Addition for multiplication
STA 4203
HLT
159. MVI C,00H // Preserves the Carry
LDA 4200H // Fetched the Multiplicand
MOV B,A
LDA 4201H // Fetched the Multiplier
MOV D,A
MVI A,00H // Cleared the Accumulator for multiple addition of the Multiplicand
L1: ADD B
DCR D
JNZ L1 // Repeated addition for multiplication
JNC L2 // Jump if no carry generated
INR C
L2: STA 4203
MOV A,C
STA 4202
HLT
160.
161. DIVISION OF TWO 8 BIT NUMBERS
ALGORITHM:
1) Start the program by loading HL register pair with address of memory
location.
2) Move the data to a register(B register).
3) Get the second data and load into Accumulator.
4) Compare the two numbers to check for carry.
5) Subtract the two numbers.
6) Increment the value of carry .
7) Check whether repeated subtraction is over and store the value of
product and carry in memory location.
8) Terminate the program.
162. LXI H, 4150
MOV B,M Get the divisor in B – reg.
MVI C,00 Clear C – reg for quotient
INX H
MOV A,M Get the dividend in A – reg.
NEXT: CMP B Compare A - reg with register B.
JC LOOP Jump on carry to LOOP
SUB B Subtract A – reg from B- reg.
INR C Increment content of register C.
JMP NEXT Jump to NEXT
LOOP: STA 4152 Store the remainder in Memory
MOV A,C
STA 4153 Store the quotient in memory
HLT Terminate the program.
A>B: CY=0
A=B: ZF=1
A<B: CY=1
163. Write an assembly language program in 8085 microprocessor to sort a given list of n
numbers using Bubble Sort (Ascending order ).
164. Assumption – Size of list is stored at 2040H and list of numbers from 2041H onwards.
Algorithm –
1. Load size of list in C register and set D register to be 0
2. Decrement C as for n elements n-1 comparisons occur
3. Load the starting element of the list in Accumulator
4. Compare Accumulator and next element
5. If accumulator is less than or equal to the next element jump to step 8
6. Swap the two elements
7. Set D register to 1
8. Decrement C
9. If C>0 take next element in Accumulator and go to point 4
10. If D=0, this means in the iteration, no exchange takes place consequently we know that
it won’t take place in further iterations so the loop in exited and program is stopped
11. Jump to step 1 for further iterations