SlideShare a Scribd company logo
1 of 37
Logic Gates
NOT GATE
NOT GATE
• NOT gate or inverter is a basic logic gate whose output is just inverse
of input
• The inverter (NOT circuit) performs the operation called inversion or
complementation.
• The inverter changes one logic level to the opposite level.
• In terms of bits, it changes a 1 to a 0 and a 0 to a 1.
• The negation indicator is a “bubble” that indicates inversion or
complementation when it appears on the input or output of any logic
element.
• NOT gate has a single input and single output.
Standard logic symbols for the inverter
Inverter Truth Table
• When a HIGH level is applied to an inverter input, a LOW level will
appear on its output. When a LOW level is applied to its input, a HIGH
will appear on its output. This operation is summarized in Table
below, which shows the output for each possible input in terms of
levels and corresponding bits. A table such as this is called a truth
table.
Application
• Figure below shows a circuit for producing the 1’s complement of an
8-bit binary number. The bits of the binary number are applied to the
inverter inputs and the 1’s complement of the number appears on the
outputs.
OR Gate
• The OR gate is another of the basic gates from which all logic
functions are constructed.
• An OR gate can have two or more inputs and performs what is known
as logical addition.
• An OR gate has two or more inputs and only one output.
• Standard logic symbols for the OR gate showing two inputs is shown
below
OR Gate Truth Table
• The operation of a 2-input OR gate is described in Table below. This
truth table can be expanded for any number of inputs; but regardless
of the number of inputs, the output is HIGH when one or more of the
inputs are HIGH.
Operation of an OR Gate
• An OR gate produces a HIGH on the output when any of the inputs is
HIGH
• The output is LOW only when all of the inputs are LOW
Logic Expressions for an OR Gate
• The logical OR function of two variables is represented
mathematically by a + between the two variables, for example, A + B.
The plus sign is read as “OR.”
• The operation of a 2-input OR gate can be expressed as follows: If one
input variable is A, if the other input variable is B, and if the output
variable is X, then the Boolean expression is
AND Gate
• The AND gate is one of the basic gates that can be combined to form
any logic function.
• An AND gate can have two or more inputs and performs what is
known as logical multiplication
• The AND gate is composed of two or more inputs and a single output,
as indicated by the standard logic symbols shown below
AND Gate Truth Table
• For any AND gate, regardless of the number of inputs, the output is
HIGH only when all inputs are HIGH.
• When any of the input is LOW, the output is LOW
Extra Knowledge
• The total number of possible combinations of binary inputs to a gate is
determined by the following formula:
N = 2^n
where N is the number of possible input combinations and n is the
number of input variables.
• For two input variables: N = 2^2 = 4 combinations
• For three input variables: N = 2^3 = 8 combinations
• For four input variables: N = 2^4 = 16 combinations
Operation of an AND Gate
• An AND gate produces a HIGH output only when all of the inputs are
HIGH.
• When any of the inputs is LOW, the output is LOW.
Logic Expressions for an AND Gate
• The logical AND function of two variables is represented
mathematically either by placing a dot between the two variables, as
A . B, or by simply writing the adjacent letters without the dot, as AB.
• The operation of a 2-input AND gate can be expressed in equation
form as follows: If one input variable is A, if the other input variable is
B, and if the output variable is X, then the Boolean expression is
X = AB
Universal Logic Gates
• A universal gate is a gate which can implement any Boolean function
without need to use any other gate type.
• The NAND and NOR gates are universal gates.
• In practice, this is advantageous since NAND and NOR gates are
economical and easier to fabricate and are the basic gates used in all
IC digital logic families.
• NAND
• NOR
NAND Gate
• The NAND gate is a popular logic element because it can be used as a
universal gate; that is, NAND gates can be used in combination to
perform the AND, OR, and inverter operations.
• The NAND gate is the same as the AND gate except the output is
inverted.
Operation of a NAND Gate
• A NAND gate produces a LOW output only when all the inputs are
HIGH.
• When any of the inputs is LOW, the output will be HIGH.
• For a 2-input NAND gate, output X is LOW only when inputs A and B
are HIGH; X is HIGH when either A or B is LOW, or when both A and B
are LOW.
• This operation is opposite that of the AND in terms of the output
level.
Operation of a 2-input NAND gate
Logic Expressions for a NAND Gate
• The Boolean expression for the output of a 2-input NAND gate is
• This expression says that the two input variables, A and B, are first
ANDed and then complemented, as indicated by the bar over the
AND expression.
NAND Gate as a Universal Gate
NOT gate
NAND Gate as a Universal Gate
NAND Gate as a Universal Gate
• OR Gate
NOR Gate
• The NOR gate, like the NAND gate, is a useful logic element because it
can also be used as a universal gate; that is, NOR gates can be used in
combination to perform the AND, OR, and inverter operations
• The term NOR is a contraction of NOT-OR and implies an OR function
with an inverted (complemented) output
• The standard logic symbol for a 2-input NOR gate is shown below
Operation of a NOR Gate
• A NOR gate produces a LOW output when any of its inputs is HIGH.
• Only when all of its inputs are LOW is the output HIGH.
• For a 2-input NOR gate, output X is LOW when either input A or input
B is HIGH, or when both A and B are HIGH; X is HIGH only when both
A and B are LOW.
• The NOR is the same as the OR except the output is inverted.
Operation of a NOR Gate
Logic Expressions for a NOR Gate
• The Boolean expression for the output of a 2-input NOR gate can be
written as
• This equation says that the two input variables are first ORed and
then complemented, as indicated by the bar over the OR expression.
NOR Gate as a Universal Gate
Exclusive-OR Gates
• Standard symbol for an exclusive-OR (XOR for short) gate is shown
below.
• The XOR gate has only two inputs.
• The output of an exclusive-OR gate is HIGH only when the two inputs
are at opposite logic levels.
• For an exclusive-OR gate, output X is HIGH when input A is LOW and
input B is HIGH, or when input A is HIGH and input B is LOW; X is LOW
when A and B are both HIGH or both LOW.
All possible logic levels for an exclusive-OR
gate
Exclusive-NOR Gate
• Standard symbols for an exclusive-NOR (XNOR) gate is shown below
• The bubble on the output of the XNOR symbol indicates that its
output is opposite that of the XOR gate.
• When the two input logic levels are opposite, the output of the
exclusive-NOR gate is LOW
Exclusive-NOR Gate Operation
• For an exclusive-NOR gate, output X is LOW when input A is LOW and
input B is HIGH, or when A is HIGH and B is LOW; X is HIGH when A
and B are both HIGH or both LOW.
All possible logic levels for an exclusive-NOR
gate
Assignment
• Realize X-OR & X-NOR using Universal Gates

More Related Content

What's hot (20)

Boolean Logic
Boolean LogicBoolean Logic
Boolean Logic
 
Logic gate
Logic gateLogic gate
Logic gate
 
Basic logic gates
Basic logic gatesBasic logic gates
Basic logic gates
 
Presentation of gate
Presentation of gatePresentation of gate
Presentation of gate
 
CSEC Physics Review - Introduction To Logic Gates
CSEC Physics Review - Introduction To Logic GatesCSEC Physics Review - Introduction To Logic Gates
CSEC Physics Review - Introduction To Logic Gates
 
Logic gates
Logic gatesLogic gates
Logic gates
 
Logic Gates
Logic GatesLogic Gates
Logic Gates
 
Logic gates
Logic gatesLogic gates
Logic gates
 
Logic Gates
Logic GatesLogic Gates
Logic Gates
 
Digital 1
Digital 1Digital 1
Digital 1
 
Universal logic gate
Universal logic gateUniversal logic gate
Universal logic gate
 
Logic gates
Logic gatesLogic gates
Logic gates
 
Presentation of universal logic gate
Presentation of universal logic gatePresentation of universal logic gate
Presentation of universal logic gate
 
Digital logic gates
Digital logic gatesDigital logic gates
Digital logic gates
 
Exclusive OR GAte
Exclusive OR GAteExclusive OR GAte
Exclusive OR GAte
 
Logic Gates
Logic GatesLogic Gates
Logic Gates
 
The logic gate circuit
The logic gate circuitThe logic gate circuit
The logic gate circuit
 
Digital Basics
Digital BasicsDigital Basics
Digital Basics
 
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
 
Basic gates and functions
Basic gates and functionsBasic gates and functions
Basic gates and functions
 

Similar to Basic Gates in Digital Logic

introduction of logic gates
introduction of logic gates introduction of logic gates
introduction of logic gates HASNAINNAZIR1
 
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates. Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates. Satya P. Joshi
 
Logic Gate.pptx
Logic Gate.pptxLogic Gate.pptx
Logic Gate.pptxHrRajon2
 
perform operation with boolean algebra
perform operation with boolean algebraperform operation with boolean algebra
perform operation with boolean algebraBrenda Debra
 
M. FLORENCE DAYANA/unit - II logic gates and circuits.pdf
M. FLORENCE DAYANA/unit - II logic gates and circuits.pdfM. FLORENCE DAYANA/unit - II logic gates and circuits.pdf
M. FLORENCE DAYANA/unit - II logic gates and circuits.pdfDr.Florence Dayana
 
Chapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdfChapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdfTamiratDejene1
 
UNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptxUNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptxGaganaP13
 
investagatory PHYSICS-LOGIC GATES
investagatory PHYSICS-LOGIC GATESinvestagatory PHYSICS-LOGIC GATES
investagatory PHYSICS-LOGIC GATESLakhvinder Singh
 
Logic Gates & Related Device
Logic Gates & Related DeviceLogic Gates & Related Device
Logic Gates & Related DeviceMd. Nahidul Islam
 
Logic gates and Digital system.pptx
Logic gates and Digital system.pptxLogic gates and Digital system.pptx
Logic gates and Digital system.pptxAmiShete2
 
067 [BEEE].pptx
067 [BEEE].pptx067 [BEEE].pptx
067 [BEEE].pptxMITS
 
067 [BEEE].pptx
067 [BEEE].pptx067 [BEEE].pptx
067 [BEEE].pptxMITS
 

Similar to Basic Gates in Digital Logic (20)

introduction of logic gates
introduction of logic gates introduction of logic gates
introduction of logic gates
 
Logic gates
Logic gatesLogic gates
Logic gates
 
logic gates
logic gates logic gates
logic gates
 
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates. Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
 
Logic Gate.pptx
Logic Gate.pptxLogic Gate.pptx
Logic Gate.pptx
 
perform operation with boolean algebra
perform operation with boolean algebraperform operation with boolean algebra
perform operation with boolean algebra
 
M. FLORENCE DAYANA/unit - II logic gates and circuits.pdf
M. FLORENCE DAYANA/unit - II logic gates and circuits.pdfM. FLORENCE DAYANA/unit - II logic gates and circuits.pdf
M. FLORENCE DAYANA/unit - II logic gates and circuits.pdf
 
Chapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdfChapter 3_Logic Gates (EEEg4302).pdf
Chapter 3_Logic Gates (EEEg4302).pdf
 
UNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptxUNIVERSAL PROPERTY.pptx
UNIVERSAL PROPERTY.pptx
 
Logic gates
Logic gatesLogic gates
Logic gates
 
investagatory PHYSICS-LOGIC GATES
investagatory PHYSICS-LOGIC GATESinvestagatory PHYSICS-LOGIC GATES
investagatory PHYSICS-LOGIC GATES
 
BASIC LOGIC GATES.pdf
BASIC LOGIC GATES.pdfBASIC LOGIC GATES.pdf
BASIC LOGIC GATES.pdf
 
Logic gates and Boolean.pdf
Logic gates and Boolean.pdfLogic gates and Boolean.pdf
Logic gates and Boolean.pdf
 
Logic Gates & Related Device
Logic Gates & Related DeviceLogic Gates & Related Device
Logic Gates & Related Device
 
Logic gates and Digital system.pptx
Logic gates and Digital system.pptxLogic gates and Digital system.pptx
Logic gates and Digital system.pptx
 
Chap 3
Chap 3Chap 3
Chap 3
 
Computer architecture 1
Computer architecture  1Computer architecture  1
Computer architecture 1
 
067 [BEEE].pptx
067 [BEEE].pptx067 [BEEE].pptx
067 [BEEE].pptx
 
067 [BEEE].pptx
067 [BEEE].pptx067 [BEEE].pptx
067 [BEEE].pptx
 
Logic gates
Logic gatesLogic gates
Logic gates
 

More from ISMT College

Time delays & counter.ppt
Time delays & counter.pptTime delays & counter.ppt
Time delays & counter.pptISMT College
 
Timing Diagram.pptx
Timing Diagram.pptxTiming Diagram.pptx
Timing Diagram.pptxISMT College
 
4. Instruction Set Of MP 8085.pptx
4. Instruction Set Of MP 8085.pptx4. Instruction Set Of MP 8085.pptx
4. Instruction Set Of MP 8085.pptxISMT College
 
3. Addressing Modes in 8085 microprocessor.pptx
3. Addressing Modes in 8085 microprocessor.pptx3. Addressing Modes in 8085 microprocessor.pptx
3. Addressing Modes in 8085 microprocessor.pptxISMT College
 
2. 8085-Microprocessor.pptx
2. 8085-Microprocessor.pptx2. 8085-Microprocessor.pptx
2. 8085-Microprocessor.pptxISMT College
 
1. Introduction to Microprocessor.pptx
1. Introduction to Microprocessor.pptx1. Introduction to Microprocessor.pptx
1. Introduction to Microprocessor.pptxISMT College
 
Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2ISMT College
 
Chapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital LogicChapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital LogicISMT College
 
Access Control List (ACL)
Access Control List (ACL)Access Control List (ACL)
Access Control List (ACL)ISMT College
 
Introduction to Counters
Introduction to CountersIntroduction to Counters
Introduction to CountersISMT College
 
Chapter 2.1 introduction to number system
Chapter 2.1 introduction to number systemChapter 2.1 introduction to number system
Chapter 2.1 introduction to number systemISMT College
 
Chapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital LogicChapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital LogicISMT College
 
Programmable logic devices
Programmable logic devicesProgrammable logic devices
Programmable logic devicesISMT College
 
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)ISMT College
 
Register in Digital Logic
Register in Digital LogicRegister in Digital Logic
Register in Digital LogicISMT College
 

More from ISMT College (18)

Attack.pptx
Attack.pptxAttack.pptx
Attack.pptx
 
Time delays & counter.ppt
Time delays & counter.pptTime delays & counter.ppt
Time delays & counter.ppt
 
Timing Diagram.pptx
Timing Diagram.pptxTiming Diagram.pptx
Timing Diagram.pptx
 
4. Instruction Set Of MP 8085.pptx
4. Instruction Set Of MP 8085.pptx4. Instruction Set Of MP 8085.pptx
4. Instruction Set Of MP 8085.pptx
 
Instruction.pdf
Instruction.pdfInstruction.pdf
Instruction.pdf
 
3. Addressing Modes in 8085 microprocessor.pptx
3. Addressing Modes in 8085 microprocessor.pptx3. Addressing Modes in 8085 microprocessor.pptx
3. Addressing Modes in 8085 microprocessor.pptx
 
2. 8085-Microprocessor.pptx
2. 8085-Microprocessor.pptx2. 8085-Microprocessor.pptx
2. 8085-Microprocessor.pptx
 
1. Introduction to Microprocessor.pptx
1. Introduction to Microprocessor.pptx1. Introduction to Microprocessor.pptx
1. Introduction to Microprocessor.pptx
 
Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2Digital Logic BCA TU Chapter 2.2
Digital Logic BCA TU Chapter 2.2
 
Chapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital LogicChapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital Logic
 
VLAN
VLANVLAN
VLAN
 
Access Control List (ACL)
Access Control List (ACL)Access Control List (ACL)
Access Control List (ACL)
 
Introduction to Counters
Introduction to CountersIntroduction to Counters
Introduction to Counters
 
Chapter 2.1 introduction to number system
Chapter 2.1 introduction to number systemChapter 2.1 introduction to number system
Chapter 2.1 introduction to number system
 
Chapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital LogicChapter 1 Introduction to Digital Logic
Chapter 1 Introduction to Digital Logic
 
Programmable logic devices
Programmable logic devicesProgrammable logic devices
Programmable logic devices
 
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
Adder & subtractor (Half adder, Full adder, Half subtractor, Full subtractor)
 
Register in Digital Logic
Register in Digital LogicRegister in Digital Logic
Register in Digital Logic
 

Recently uploaded

Microscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptxMicroscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptxpurnimasatapathy1234
 
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionSachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionDr.Costas Sachpazis
 
Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝
Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝
Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝soniya singh
 
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ
 
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130Suhani Kapoor
 
Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girlsssuser7cb4ff
 
Study on Air-Water & Water-Water Heat Exchange in a Finned Tube Exchanger
Study on Air-Water & Water-Water Heat Exchange in a Finned Tube ExchangerStudy on Air-Water & Water-Water Heat Exchange in a Finned Tube Exchanger
Study on Air-Water & Water-Water Heat Exchange in a Finned Tube ExchangerAnamika Sarkar
 
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdfCCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdfAsst.prof M.Gokilavani
 
Introduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptxIntroduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptxvipinkmenon1
 
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCollege Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCall Girls in Nagpur High Profile
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile servicerehmti665
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfAsst.prof M.Gokilavani
 
Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...
Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...
Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...Dr.Costas Sachpazis
 
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZTE
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVRajaP95
 
Application of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptxApplication of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptx959SahilShah
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacingjaychoudhary37
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidNikhilNagaraju
 

Recently uploaded (20)

Microscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptxMicroscopic Analysis of Ceramic Materials.pptx
Microscopic Analysis of Ceramic Materials.pptx
 
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
 
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionSachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
 
Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝
Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝
Model Call Girl in Narela Delhi reach out to us at 🔝8264348440🔝
 
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
 
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
 
Call Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call GirlsCall Girls Narol 7397865700 Independent Call Girls
Call Girls Narol 7397865700 Independent Call Girls
 
Study on Air-Water & Water-Water Heat Exchange in a Finned Tube Exchanger
Study on Air-Water & Water-Water Heat Exchange in a Finned Tube ExchangerStudy on Air-Water & Water-Water Heat Exchange in a Finned Tube Exchanger
Study on Air-Water & Water-Water Heat Exchange in a Finned Tube Exchanger
 
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdfCCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
CCS355 Neural Network & Deep Learning UNIT III notes and Question bank .pdf
 
Introduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptxIntroduction to Microprocesso programming and interfacing.pptx
Introduction to Microprocesso programming and interfacing.pptx
 
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCollege Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile service
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
 
Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...
Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...
Sheet Pile Wall Design and Construction: A Practical Guide for Civil Engineer...
 
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
ZXCTN 5804 / ZTE PTN / ZTE POTN / ZTE 5804 PTN / ZTE POTN 5804 ( 100/200 GE Z...
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
 
Application of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptxApplication of Residue Theorem to evaluate real integrations.pptx
Application of Residue Theorem to evaluate real integrations.pptx
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacing
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfid
 
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
 

Basic Gates in Digital Logic

  • 3. NOT GATE • NOT gate or inverter is a basic logic gate whose output is just inverse of input • The inverter (NOT circuit) performs the operation called inversion or complementation. • The inverter changes one logic level to the opposite level. • In terms of bits, it changes a 1 to a 0 and a 0 to a 1. • The negation indicator is a “bubble” that indicates inversion or complementation when it appears on the input or output of any logic element. • NOT gate has a single input and single output.
  • 4. Standard logic symbols for the inverter
  • 5. Inverter Truth Table • When a HIGH level is applied to an inverter input, a LOW level will appear on its output. When a LOW level is applied to its input, a HIGH will appear on its output. This operation is summarized in Table below, which shows the output for each possible input in terms of levels and corresponding bits. A table such as this is called a truth table.
  • 6. Application • Figure below shows a circuit for producing the 1’s complement of an 8-bit binary number. The bits of the binary number are applied to the inverter inputs and the 1’s complement of the number appears on the outputs.
  • 7. OR Gate • The OR gate is another of the basic gates from which all logic functions are constructed. • An OR gate can have two or more inputs and performs what is known as logical addition. • An OR gate has two or more inputs and only one output. • Standard logic symbols for the OR gate showing two inputs is shown below
  • 8. OR Gate Truth Table • The operation of a 2-input OR gate is described in Table below. This truth table can be expanded for any number of inputs; but regardless of the number of inputs, the output is HIGH when one or more of the inputs are HIGH.
  • 9. Operation of an OR Gate • An OR gate produces a HIGH on the output when any of the inputs is HIGH • The output is LOW only when all of the inputs are LOW
  • 10. Logic Expressions for an OR Gate • The logical OR function of two variables is represented mathematically by a + between the two variables, for example, A + B. The plus sign is read as “OR.” • The operation of a 2-input OR gate can be expressed as follows: If one input variable is A, if the other input variable is B, and if the output variable is X, then the Boolean expression is
  • 11. AND Gate • The AND gate is one of the basic gates that can be combined to form any logic function. • An AND gate can have two or more inputs and performs what is known as logical multiplication • The AND gate is composed of two or more inputs and a single output, as indicated by the standard logic symbols shown below
  • 12. AND Gate Truth Table • For any AND gate, regardless of the number of inputs, the output is HIGH only when all inputs are HIGH. • When any of the input is LOW, the output is LOW
  • 13. Extra Knowledge • The total number of possible combinations of binary inputs to a gate is determined by the following formula: N = 2^n where N is the number of possible input combinations and n is the number of input variables. • For two input variables: N = 2^2 = 4 combinations • For three input variables: N = 2^3 = 8 combinations • For four input variables: N = 2^4 = 16 combinations
  • 14. Operation of an AND Gate • An AND gate produces a HIGH output only when all of the inputs are HIGH. • When any of the inputs is LOW, the output is LOW.
  • 15. Logic Expressions for an AND Gate • The logical AND function of two variables is represented mathematically either by placing a dot between the two variables, as A . B, or by simply writing the adjacent letters without the dot, as AB. • The operation of a 2-input AND gate can be expressed in equation form as follows: If one input variable is A, if the other input variable is B, and if the output variable is X, then the Boolean expression is X = AB
  • 16. Universal Logic Gates • A universal gate is a gate which can implement any Boolean function without need to use any other gate type. • The NAND and NOR gates are universal gates. • In practice, this is advantageous since NAND and NOR gates are economical and easier to fabricate and are the basic gates used in all IC digital logic families. • NAND • NOR
  • 17. NAND Gate • The NAND gate is a popular logic element because it can be used as a universal gate; that is, NAND gates can be used in combination to perform the AND, OR, and inverter operations. • The NAND gate is the same as the AND gate except the output is inverted.
  • 18. Operation of a NAND Gate • A NAND gate produces a LOW output only when all the inputs are HIGH. • When any of the inputs is LOW, the output will be HIGH. • For a 2-input NAND gate, output X is LOW only when inputs A and B are HIGH; X is HIGH when either A or B is LOW, or when both A and B are LOW. • This operation is opposite that of the AND in terms of the output level.
  • 19. Operation of a 2-input NAND gate
  • 20.
  • 21. Logic Expressions for a NAND Gate • The Boolean expression for the output of a 2-input NAND gate is • This expression says that the two input variables, A and B, are first ANDed and then complemented, as indicated by the bar over the AND expression.
  • 22. NAND Gate as a Universal Gate NOT gate
  • 23. NAND Gate as a Universal Gate
  • 24. NAND Gate as a Universal Gate • OR Gate
  • 25. NOR Gate • The NOR gate, like the NAND gate, is a useful logic element because it can also be used as a universal gate; that is, NOR gates can be used in combination to perform the AND, OR, and inverter operations • The term NOR is a contraction of NOT-OR and implies an OR function with an inverted (complemented) output • The standard logic symbol for a 2-input NOR gate is shown below
  • 26. Operation of a NOR Gate • A NOR gate produces a LOW output when any of its inputs is HIGH. • Only when all of its inputs are LOW is the output HIGH. • For a 2-input NOR gate, output X is LOW when either input A or input B is HIGH, or when both A and B are HIGH; X is HIGH only when both A and B are LOW. • The NOR is the same as the OR except the output is inverted.
  • 27. Operation of a NOR Gate
  • 28.
  • 29. Logic Expressions for a NOR Gate • The Boolean expression for the output of a 2-input NOR gate can be written as • This equation says that the two input variables are first ORed and then complemented, as indicated by the bar over the OR expression.
  • 30. NOR Gate as a Universal Gate
  • 31. Exclusive-OR Gates • Standard symbol for an exclusive-OR (XOR for short) gate is shown below. • The XOR gate has only two inputs. • The output of an exclusive-OR gate is HIGH only when the two inputs are at opposite logic levels.
  • 32. • For an exclusive-OR gate, output X is HIGH when input A is LOW and input B is HIGH, or when input A is HIGH and input B is LOW; X is LOW when A and B are both HIGH or both LOW.
  • 33. All possible logic levels for an exclusive-OR gate
  • 34. Exclusive-NOR Gate • Standard symbols for an exclusive-NOR (XNOR) gate is shown below • The bubble on the output of the XNOR symbol indicates that its output is opposite that of the XOR gate. • When the two input logic levels are opposite, the output of the exclusive-NOR gate is LOW
  • 35. Exclusive-NOR Gate Operation • For an exclusive-NOR gate, output X is LOW when input A is LOW and input B is HIGH, or when A is HIGH and B is LOW; X is HIGH when A and B are both HIGH or both LOW.
  • 36. All possible logic levels for an exclusive-NOR gate
  • 37. Assignment • Realize X-OR & X-NOR using Universal Gates