Z Score,T Score, Percential Rank and Box Plot Graph
Vlsi assignment 1
1. VLSI ASSIGNMENT 1
To be submitted in by 10:00am on 4th November 2011
1. Describe the factors that led to the emergence of VLSI design in microelectronic
engineering?
2. With the aid of appropriate diagrams, describe Moore’s law and state its limitations
3. Describe the major processes in the VLSI design process.
4. With reference to the PMOS transistor, describe the drain current characteristic.
5. With the aid of an NPN BJT, using the simple terms differentiate between a pull up
and a pull down device.
6. Explain the term “latch up” as applied to CMOS operation.
7. Give an account for the defects in the IC manufacturing process.
8. Explain the term “yield” in chip manufacturing and show the mathematical models
that could be used to study the yield of the manufactured IC chips.
9. What do you understand by the following terms as applied to VLSI design;
i). stick diagram
ii). Circuit diagram
iii). Layout diagram
10. With the aid of a circuit diagram, describe how a NAND gate can be implemented
using CMOS logic.
11. Using appropriate sketches in CMOS and NMOS, explain the concept of transmission
gates.
12. Show how an 8-input MUX can be designed in CMOS using pass transistors.
13. Draw a block diagram to describe the memory architecture.
14. Define the following terms as applied to memory:
i. A memory cell
ii. Memory word
iii. Capacity
15. Differentiate between the following using relevant examples:
i. Static memory devices and dynamic memory devices.
ii. Main memory and auxiliary memory
16. Explain the optimization variables in the design of memory devices and how they
affect one another.
17. What is meant by pre-charging in MOS circuit design? Why might it be used and how
does it work?