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VLSI Testing - Boolean difference method
Dr. D. V. Kamath
Professor, Department of E&C Engg.,
Manipal Institute of Technol...
2
Boolean difference method
Boolean difference is a type of deterministic method for finding TV
BD gives all possible test...
3
Conceptual view of ATPG
Generate an input test vector that can distinguish the defect free
circuit from the hypothetical...
4
Boolean difference method
Theoretical basis – Boolean difference
The output of the circuit is given as 𝑓 = π‘₯. 𝑦 + 𝑦 . z
...
5
Boolean difference method
 𝑓𝑦 βŠ• 𝑓𝑦 = 1 if and only if 𝑓𝑦 and 𝑓𝑦 result in opposing logic
values
 Any TV that can set 𝑓...
6
Boolean difference example
Find TV to test fault s-a-0 at node y using Boolean difference method
y .
𝐝𝐟
𝐝𝐲
= y. 𝐟 𝐲 βŠ• 𝐟 ...
7
Boolean difference example
Find TV to test fault s-a-0 at node w using BD method
w .
𝐝𝐟
𝐝𝐰
= w. 𝐟 𝐰 βŠ• 𝐟 𝐰 = 𝐲 . z 𝟏 βŠ• 𝐱....
8
Boolean difference example
Find TV to test fault s-a-0 at node Z using BD method
 z .
𝑑𝑓
𝑑𝑧
= z. 𝑓𝑧 βŠ• 𝑓𝑧 = 1 will give ...
9
Boolean difference method
Summary
 Given a circuit with output f and fault Ξ± s-a- b
 The set of test vectors that can ...
10
β€’ reachdvkamath@yahoo.com
β€’ dv.kamath@manipal.edu
Contact
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Testing boolean difference

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Testing boolean difference

  1. 1. VLSI Testing - Boolean difference method Dr. D. V. Kamath Professor, Department of E&C Engg., Manipal Institute of Technology, Manipal 1
  2. 2. 2 Boolean difference method Boolean difference is a type of deterministic method for finding TV BD gives all possible test vectors
  3. 3. 3 Conceptual view of ATPG Generate an input test vector that can distinguish the defect free circuit from the hypothetically defective one
  4. 4. 4 Boolean difference method Theoretical basis – Boolean difference The output of the circuit is given as 𝑓 = π‘₯. 𝑦 + 𝑦 . z Let target fault be y s-a-0 . Under this condition, the output of the faulty circuit is shown to be 𝑓𝑦 = f/ y = 0 Generate an input test vector such that 𝑓𝑦 βŠ• 𝑓𝑦 = 1
  5. 5. 5 Boolean difference method  𝑓𝑦 βŠ• 𝑓𝑦 = 1 if and only if 𝑓𝑦 and 𝑓𝑦 result in opposing logic values  Any TV that can set 𝑓𝑦 XOR 𝑓𝑦 = 1 is able to produce opposing values at the outputs of the fault-free and faulty circuits respectively  𝑑𝑓 𝑑𝑦 = 𝑓𝑦 βŠ• 𝑓𝑦  Now to test the fault say y at s-a-0, we need to initialize the node y to 1 (i.e., y = 1) and 𝑑𝑓 𝑑𝑦 = 1 i.e., y . 𝒅𝒇 π’…π’š = 1  Similarly, to test the fault say y at s-a-1 i.e., π’š . 𝒅𝒇 π’…π’š = 1
  6. 6. 6 Boolean difference example Find TV to test fault s-a-0 at node y using Boolean difference method y . 𝐝𝐟 𝐝𝐲 = y. 𝐟 𝐲 βŠ• 𝐟 𝐲 = y. 𝐱 βŠ• 𝐳 = 𝐱 . y . z + x. y. 𝐳 y . 𝐝𝐟 𝐝𝐲 = 1 will give the required TV TV will be x y z = {011, 110} 𝑓 = π‘₯. 𝑦 + 𝑦 . z ; 𝑓𝑦 = π‘₯ ; 𝑓𝑦 = 𝑧
  7. 7. 7 Boolean difference example Find TV to test fault s-a-0 at node w using BD method w . 𝐝𝐟 𝐝𝐰 = w. 𝐟 𝐰 βŠ• 𝐟 𝐰 = 𝐲 . z 𝟏 βŠ• 𝐱. 𝐲 = 𝐲 . z 𝐱 + 𝐲 = 𝐱 𝐲 𝐳 + 𝐲 z =𝐲 z w . 𝐝𝐟 𝐝𝐰 = 1 will give the required TV TV will be x y z = {x01} 𝑓 = π‘₯. 𝑦 + 𝑀 ; 𝑀 = 𝑦 . z ; 𝑓𝑀= 1 ; 𝑓𝑀 = π‘₯. 𝑦
  8. 8. 8 Boolean difference example Find TV to test fault s-a-0 at node Z using BD method  z . 𝑑𝑓 𝑑𝑧 = z. 𝑓𝑧 βŠ• 𝑓𝑧 = 1 will give the required TV  But, π‘“π‘§βŠ•π‘“π‘§ = 0  The condition for testability ( π‘“π‘§βŠ•π‘“π‘§ = 1 ) is not satisfiable  Hence, the fault is undetectable  Redundancy in the circuit is the cause for undetectable faults 𝑓 = π‘₯. 𝑦 + π‘₯. 𝑦. 𝑧 ; 𝑓𝑧= π‘₯. 𝑦 ; 𝑓𝑧 = π‘₯. 𝑦
  9. 9. 9 Boolean difference method Summary  Given a circuit with output f and fault Ξ± s-a- b  The set of test vectors that can detect this fault includes all the vectors that satisfy (Ξ± = 𝑏 ). 𝑑𝑓 𝑑α = 1
  10. 10. 10 β€’ reachdvkamath@yahoo.com β€’ dv.kamath@manipal.edu Contact

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