SPICE MODEL of SSM3K126TU (Standard+BDS Model) in SPICE PARK

Device Modeling Report

COMPONENTS: Power MOSFET (Model Parameter)
PART NUMBER: SSM3K126TU
MANUFACTURER: TOSHIBA
Body Diode (Model Parameter) / ESD Protection Diode

Bee Technologies Inc.

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

MOSFET MODEL

Pspice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Modility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility


Transconductance Characteristic

Circuit Simulation Result

20
Measurement
18 Simulation

16

14

12
gfs

10

8

6

4

2

0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
ID : Drain Current A

Comparison table

gfs
Id(A) Error(%)
Measurement Simulation
0.010 0.488 0.500 2.459
0.020 0.650 0.667 2.615
0.050 1.220 1.250 2.459
0.100 1.648 1.667 1.153
0.200 2.449 2.500 2.082
0.500 3.836 3.846 0.261
1.000 5.870 5.730 -2.385
2.000 8.860 8.696 -1.851


Vgs-Id Characteristic

Circuit Simulation result

10A

1.0A

100mA

10mA
0V 1.0V 2.0V 3.0V
I(V3)
V_V2

Evaluation circuit

V3

0Vdc

U1
SSM3K126TU

Vv ariable

10Vdc 3Vdc

V2

0


Comparison Graph


10.000
Measurement
Simulation

1.000
ID : Drain Current A

0.100

0.010
0.0 1.0 2.0 3.0
VGS : Gate to Source Voltage V

Simulation Result

VGS(V)
ID(A) Error (%)
0.010 1.501 1.576 4.997
0.020 1.546 1.590 2.846
0.050 1.612 1.618 0.372
0.100 1.670 1.649 -1.257
0.200 1.732 1.694 -2.194
0.500 1.830 1.782 -2.623
1.000 1.928 1.885 -2.230
2.000 2.055 2.035 -0.973


Rds(on) Characteristic

4.0A

3.6A

3.2A

2.8A

2.4A

2.0A

1.6A

1.2A

0.8A

0.4A

0A
0V 20mV 40mV 60mV 80mV 100mV 120mV 140mV 160mV 180mV
I(V3)
V_VDS

Evaluation circuit

V3

0Vdc

U1
SSM3K126TU

VDS

4Vdc 0Vdc

VGS

0

Simulation Result

ID=3.9A, VGS=4V Measurement Simulation Error (%)
R DS (on) (m) 43.000 42.983 -0.040


Gate Charge Characteristic

10V

9V

8V

7V

6V

5V

4V

3V

2V

1V

0V
0 4n 8n 12n 16n 20n
V(W1:3)
Time*1mS

Evaluation circuit

V2

0Vdc
U1
SSM3K126TU

PER = 1000u Dbreak
PW = 600u W1
TF = 10n + D1
TR = 10n I2
-
TD = 0 3.9Adc
I2 = 1m W
I1 = 0 I1 IOFF = 0.1mA
ION = 0uA

V1
20Vdc

0

Simulation Result

VDD=20V,ID=3.9A
Measurement Simulation Error (%)
,VGS=10V
Qgs(nc) 1.300 1.326 2.000
Qgd(nc) 4.100 4.140 0.976
Qg(nc) 18.000 11.433 -36.483


Gate Charge Characteristic Reference

Dynamic Input Characteristic

10
ID=3.9A
9

8
Gate-Source voltage Vgs (V)

7

6

5

4

3

2

1

0
0 4 8 12 16 20
Total Gate Charge Qg (nC)


Capacitance Characteristic

Measurement
Simulation

Simulation Result

Cbd(pF)
VDS(V) Error(%)
0.1000 28.0000 28.0003 0.0011
0.2000 25.5000 25.3600 -0.5490
0.5000 20.0000 19.9800 -0.1000
1.0000 14.5000 14.5500 0.3448
2.0000 9.3000 9.2000 -1.0753
5.0000 4.2000 4.1500 -1.1905
10.0000 2.0000 2.0500 2.5000
20.0000 1.0000 0.9800 -2.0000


Switching Time Characteristic


20.0V

17.5V

15.0V

12.5V

10.0V

7.5V

5.0V

2.5V

0V
1.5us 1.6us 1.7us 1.8us 1.9us 2.0us 2.1us 2.2us 2.3us 2.4us
V(2)*2 V(3)/1.5
Time

Evaluation circuit

3 L2

50n
U1
SSM3K126TU

RL
R1 L1 2
15

V1 = 0 30nH
V2 = 10 V2 50 VDD
TD = 2u R2 15Vdc
TR = 10n
TF = 10n 50
PW = 1u
PER = 10u

0

Simulation Result

ID=1A, VDD=15V
Measurement Simulation Error(%)
VGS=5V
Ton(ns) 70.000 70.021 0.030


Output Characteristic


5.0A

4.0A

3.0A 2.2V

2.1V
2.0A

2.0V

1.0A
1.9V

VGS=1.8V
0A
0V 0.2V 0.4V 0.6V 0.8V 1.0V 1.2V 1.4V 1.6V 1.8V 2.0V
I(Vdsense)
V_Vvariable

Evaluation circuit

Vdsense

0Vdc

U1
SSM3K126TU

Vv ariable

1.8Vdc
2Vdc

Vstep

0


Output Characteristic Reference


BODY DIODE SPICE MODEL
Forward Current Characteristic


2.50A

2.25A

2.00A

1.75A

1.50A

1.25A

1.00A

0.75A

0.50A

0.25A

0A
0V 0.2V 0.4V 0.6V 0.8V 1.0V 1.2V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m

V1
0Vdc U1
SSM3K126TU

0


Comparison Graph


2.500
Measurement
2.250 Simulation

2.000
Drain reverse current IDR(A)

1.750

1.500

1.250

1.000

0.750

0.500

0.250

0.000
0.0 0.2 0.4 0.6 0.8 1.0 1.2

Source-Drain voltage VSD(V)

Simulation Result

VSD(V) VSD(V)
IDR(A) %Error
0.010 0.481 0.496 3.119
0.020 0.518 0.518 0.000
0.050 0.552 0.545 -1.268
0.100 0.570 0.568 -0.351
0.200 0.590 0.590 0.000
0.500 0.618 0.619 0.162
1.000 0.639 0.644 0.782
2.000 0.675 0.672 -0.444


Reverse Recovery Characteristic


400mA

200mA

0A

-200mA

-400mA
20.04us 20.08us 20.12us 20.16us 20.20us 20.24us
I(R1)
Time

Evaluation Circuit

R1

50

V1 = -9.5v V1
V2 = 10.5v
TD = 100n
TR = 5ns
TF = 5ns
PW = 20us SSM3K126TU
PER = 100us U1

0

Compare Measurement vs. Simulation

Measurement Simulation Error (%)
Trr(ns) 31.200 31.148 -0.167


Reverse Recovery Characteristic Reference

Trj=14(ns)
Trb=17.2(ns)
Conditions:Ifwd=lrev=0.2(A),Rl=50

Example

Relation between trj and trb


ESD PROTECTION DIODE SPICE MODEL
Zener Voltage Characteristic


10mA

9mA

8mA

7mA

6mA

5mA

4mA

3mA

2mA

1mA

0A
0V 5V 10V 15V 20V 25V 30V 35V 40V 45V 50V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m

V1 U1
0Vdc SSM3K126TU

R2

100MEG

0


Zener Voltage Characteristic Reference


SPICE MODEL of SSM3K126TU (Standard+BDS Model) in SPICE PARK

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