SPICE MODEL of SSM6N29TU (Standard+BDS Model) in SPICE PARK

Device Modeling Report

COMPONENTS: Power MOSFET (Model Parameters)
PART NUMBER: SSM6N29TU
MANUFACTURER: TOSHIBA
Body Diode (Model Parameters) / ESD Protection Diode

Bee Technologies Inc.

All Rights Reserved Copyright (c) Bee Technologies Inc. 2007

Circuit Configuration

Q1

Q2


MOSFET MODEL

PSpice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Mobility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility


Transconductance Characteristic

Circuit Simulation Result

5

4.5

4

3.5

3
gfs

2.5

2

1.5
Measurement
1 Simulation

0.5
0 0.2 0.4 0.6 0.8 1
ID - Drain Current - A

Comparison table

gfs
Id(A) Error(%)
Measurement Simulation
0.010 0.500 0.500 0.000
0.020 0.650 0.667 2.615
0.050 1.000 1.000 0.000
0.100 1.400 1.429 2.071
0.200 1.960 2.000 2.041
0.500 3.250 3.333 2.554
1.000 4.700 4.762 1.319


Vgs-Id Characteristic

Circuit Simulation result

1.0A

100mA

10mA
0V 1.0V 2.0V
I(V3)
V_V2

Evaluation circuit

V3

0Vdc

open open
open

Q1
U31 R1
Vv ariable 100MEG
Q2
SSM6N29TU

3Vdc 0

10Vdc open

V2

0


Comparison Graph


Measurement
Simulation
0.90

0.70
ID - Drain Current - A

0.50

0.30

0.10
0.0 0.5 1.0 1.5 2.0
VGS - Gate to Source Voltage - V
Simulation Result

VGS(V)
ID(A) Error (%)
0.010 0.750 0.768 2.400
0.020 0.790 0.786 -0.506
0.050 0.820 0.821 0.122
0.100 0.860 0.862 0.233
0.200 0.920 0.919 -0.109
0.500 1.020 1.036 1.569
1.000 1.150 1.171 1.826


Rds(on) Characteristic

800mA

600mA

400mA

200mA

0A
0V 10mV 20mV 30mV 40mV 50mV 60mV 70mV
I(V3)
V_VDS
Evaluation circuit
V3

0Vdc
open open
open

Q1
U31 R1

VDS 100MEG
Q2
SSM6N29TU

0Vdc 0
4Vdc
open

VGS

0

Simulation Result

ID=0.6A, VGS=4V Measurement Simulation Error (%)
R DS (on)  0.116 0.116 0


Gate Charge Characteristic
5.0V

4.0V

2.0V

0V
0 10n 20n 30n 40n 50n 60n
V(W1:3)
Time*1mA
Evaluation circuit
V2

open open 0Vdc

Q1
U31
open
Q2
SSM6N29TU
Dbreak
R1

open D1 100MEG
PER = 1000u I2
PW = 600u W1 0.6Adc
TF = 10n +
0
TR = 10n
-
TD = 0
I2 = 1m W
I1 IOFF = 1mA V1
I1 = 0 ION = 0uA 15Vdc

0

Simulation Result

VDD=15V,ID=0.6A
Measurement Simulation Error (%)
,VGS=4V
Qgs(nC) 4.000 4.000 0.000
Qgd(nC) 10.000 9.875 -1.250
Qg 35.000 31.900 -8.857


Gate Charge Characteristic Reference

Gate Charge Characteristic

5

4

3
VGS (V)

2

1

0
0 10 20 30 40
Qg (nC)


Capacitance Characteristic

Measurement
Simulation

Simulation Result

Cbd(pF)
VDS(V) Error(%)
0.1 32.000 32.000 0.000
0.2 30.000 30.250 0.833
0.5 26.000 26.300 1.154
1 23.000 22.820 -0.783
2 18.000 18.100 0.556
5 13.000 13.200 1.538
10 10.000 10.050 0.500
20 8.000 7.950 -0.625


Switching Time Characteristic

12V

8V

4V

0V
0.95us 1.00us 1.05us 1.08us
V(L2:1) V(L1:2)*4
Time

Evaluation circuit

L2 R2

0.5nH
40
open open

Q1 U31

open
Q2
SSM6N29TU

V1
10Vdc RL
open
L1 100MEG

V1 = 0
0.10nH 0
V2 = 2.5 V2
TD = 1u R3
TR = 1n
TF = 1n 4.7
PW = 10u
PER = 200u

0

Simulation Result

ID=0.25 A, VDD=10V
Measurement Simulation Error(%)
VGS=0/2.5V
Ton(ns) 9.000 9.037 0.411


Output Characteristic


5.0A

1.8.V
4.0A

3.0A
1.5V

2.0A

VGS=1.2V
1.0A

0A
0V 0.2V 0.4V 0.6V 0.8V 1.0V
I(Vdsense)
V_Vvariable

Evaluation circuit

Vdsense

0Vdc

open open
open

Q1
U31 R1
Vv ariable 100MEG
Q2
SSM6N29TU

10Vdc 0

10Vdc open

Vstep

0


BODY DIODE
Forward Current Characteristic


1.0A

100mA

10mA

1.0mA
0V 0.2V 0.4V 0.6V 0.8V 1.0V
I(R1)
V_V1
Evaluation Circuit

R1

0.01m
open
open

SSM6N29TU Q2
V1 RL
0Vdc
U31 Q1 100MEG

0

open open

0


Comparison Graph


1
Measurement
Simulation
Drain reverse current IDR(A)

0.1

0.01
0 0.2 0.4 0.6 0.8 1 1.2

Source-Drain voltage VSD(V)

Simulation Result

VSD(V)
IDR(A) Measuremen Simulation %Error
0.010 0.490 0.487 -0.612
0.020 0.510 0.509 -0.196
0.050 0.540 0.542 0.370
0.100 0.570 0.574 0.702
0.200 0.620 0.615 -0.806
0.500 0.680 0.680 0.000
1.000 0.750 0.750 0.000


Reverse Recovery Characteristic

400mA

300mA

200mA

100mA

-0mA

-100mA

-200mA

-300mA

-400mA
5.26us 5.28us 5.30us 5.32us 5.34us 5.36us
I(R1)
Time
Evaluation Circuit

R1

50
open
open

V1 = -19.4v Q2
V1 SSM6N29TU RL
V2 = 20.6v
TD = 285n U36 Q1 100MEG
TR = 10ns
TF = 6ns
PW = 5us 0
PER = 100us
open open

0

Compare Measurement vs. Simulation

Measurement Simulation Error (%)
Trj(ns) 4.300 4.282 -0.419


Reverse Recovery Characteristic Reference

Trj=4.300(ns)
Trb=9.200 (ns)
Conditions:Ifwd=lrev=0.2(A),Rl=50

Example

Relation between trj and trb


ESD PROTECTION DIODE
Zener Voltage Characteristic

10mA

9mA

8mA

7mA

6mA

5mA

4mA

3mA

2mA

1mA

0A
0V 5V 10V 15V 20V 25V 30V 35V 40V 45V 50V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m
U31

open
open open
Q2

V1
0Vdc RL
open
100MEG
Q1

0
R2

SSM6N29TU
100MEG

0


Zener Voltage Characteristic Reference


SPICE MODEL of SSM6N29TU (Standard+BDS Model) in SPICE PARK

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