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Device Modeling Report




COMPONENTS: Insulated Gate Bipolar Transistor (IGBT)
PART NUMBER: IRG4PC50KD
MANUFACTURER: International Rectifier
REMARK: Free-Wheeling Diode (Professional Model)




                     Bee Technologies Inc.




       All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Pspice model
                                  Model description
 parameter
    TAU        Ambipolar Recombination Lifetime
     KP        MOS Transconductance
   AREA        Area of the Device
    AGD        Gate-Drain Overlap Area
    WB         Metallurgical Base Width
     VT        Threshold Voltage
     KF        Triode Region Factor
    CGS        Gate-Source Capacitance per Unit Area
   COXD        Gate-Drain Oxide Capacitance per Unit Area
    VTD        Gate-Drain Overlap Depletion Threshold




          All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Transfer Characteristics

Circuit Simulation result




Evaluation circuit


                                      V3


                                           0Vdc



                                                       V2
                                 U2            10Vdc
                            U1

                                 DIRG4PC50KD
           V1               IRG4PC50KD
    0Vdc




                            0




                All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Comparison Graph

Circuit Simulation Result




Simulation Result


  Test condition : Vce = 10 V
                                      Vge(V)
      Ic(A)                                                              Error (%)
                    Measurement                  Simulation
       1                  7                        7.0434                 0.62000
       2                7.23                       7.2251                -0.06777
       5                7.62                       7.5851                -0.45801
       10               8.02                        8.00                 -0.24938
       20               8.55                       8.5794                 0.34386




               All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Fall Time Characteristics

Circuit Simulation result




Evaluation circuit

                                                  V3


                                                       0Vdc


                                                                        R1

                         R2                  U2                         16
                                        U1
                         5
    V1 = 0                                   DIRG4PC50KD
                 V4                     IRG4PC50KD                     V2
    V2 = 15                                                   480Vdc
    TD = 0
    TR = 10n
    TF = 10n
    PW = 5u
    PER = 100m
                                       0




Test condition Ic=30(A) ,Vcc=480(V)
                          Measurement                            Simulation
       tf
                      95[Typ.]~140[Max.]          ns           112.790         ns




                      All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Gate Charge Characteristics

Circuit Simulation result




Evaluation circuit

                                                                 V3


                                                                      0Vdc


                                                                               D1
                                                                                    30Adc
                                                           U2                               I2
                                                      U1                      Dbreak

    PER = 1m                      W1                       DIRG4PC50KD
    PW = 500u                       +                 IRG4PC50KD                            V2
    TF = 10n                        -
    TR = 10n
    TD = 0                        W                                             400Vdc
    I2 = 2m                       IOFF = 100uA
    I1 = 0      I1                ION = 0A


                                                      0


Test condition : Vcc=400(V) ,Ic=30(A) ,Vge=14(V)
                          Measurement                            Simulation            Error(%)
     Qge                    25                   nc             25.2785       nc        1.11400
     Qgc                    85                   nc             87.253        nc        2.65059
     Qg                     182                  nc             180.659       nc       -0.73681




                     All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Saturation Characteristics

Circuit Simulation result




Evaluation circuit

                                    V3


                                         0Vdc




                               U2
                          U1                 0Adc
                                                    I1
                               DIRG4PC50KD
                          IRG4PC50KD
             V1
     15Vdc




                          0




                  All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Comparison Graph

Circuit Simulation Result




Simulation Result


                                   Vce(sat)(V)
      Ic(A)                                                              Error (%)
                    Measurement                  Simulation
       2                1.01                      0.948462               -6.09287
       5                1.24                       1.2406                 0.04839
       10               1.40                       1.3998                -0.01429
       20               1.58                       1.5800                 0.00000




               All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Forward Current Characteristic

Circuit Simulation Result




Evaluation circuit


                  R1

                  10m


            V1                    U1
     0Vdc
                                   DIRG4PC50KD




             0




                 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Circuit Simulation Result


Comparison graph




Simulation Result

                   Vfwd(V)                Vfwd(V)
   Ifwd (A)                                                      %Error
                 Measurement             Simulation
     0.01            0.43                  0.43072               0.16744
     0.02           0.465                 0.463218              -0.38323
     0.05            0.51                 0.510821               0.16098
      0.1            0.55                 0.551433               0.26055
      0.2           0.595                 0.600523               0.92824
      0.5            0.68                 0.684186               0.61559
       1            0.755                 0.763061               1.06768
       2             0.84                 0.861770               2.59167




               All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Junction Capacitance Characteristic

Circuit Simulation Result




Evaluation circuit




     V1 = 0
     V2 = 100    V2
     TD = 0                             DIRG4PC50KD
     TR = 1u
     TF = 1u                            U1
     PW = 1u
     PER = 10u




                  0




Circuit Simulation Result


                  All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Comparison graph




Simulation Result

                   Cj(pF)                  Cj(pF)
  Vrev (V)                                                       %Error
                Measurement              Simulation
     2             1409.8                  1405.2                -0.32629
     5             883.66                 892.436                 0.99314
    10             604.62                 621.149                 2.73378
    20             426.25                 429.554                 0.77513
    50             264.96                 259.686                -1.99049
    100            177.89                 177.871                -0.01068




              All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Reverse Recovery Characteristic

Circuit Simulation Result




Evaluation circuit

                           R1

                           50
    V1 = -9.5
    V2 = 10.75
    TD = 0       V2                       U1
    TR = 10n
    TF = 10n                               DIRG4PC50KD
    PW = 10u
    PER = 50u




                  0




Compare Measurement vs. Simulation
                      Measurement               Simulation               Error(%)
      trj                 64              ns      64.335         ns       0.52344
     trb                  136             ns      135.78         ns      -0.16176




                      All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
Reverse Recovery Characteristic                                              Reference




                                                  Measurement




trj=64(ns)
trb=136(ns)
Conditions:Ifwd=Irev=0.2(A),Rl=50



                                                        Example




                        Relation between trj and trb




              All Rights Reserved Copyright (C) Bee Technologies Inc. 2004

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SPICE MODEL of IRG4PC50KD (Standard+FWDP Model) in SPICE PARK

  • 1. Device Modeling Report COMPONENTS: Insulated Gate Bipolar Transistor (IGBT) PART NUMBER: IRG4PC50KD MANUFACTURER: International Rectifier REMARK: Free-Wheeling Diode (Professional Model) Bee Technologies Inc. All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 2. Pspice model Model description parameter TAU Ambipolar Recombination Lifetime KP MOS Transconductance AREA Area of the Device AGD Gate-Drain Overlap Area WB Metallurgical Base Width VT Threshold Voltage KF Triode Region Factor CGS Gate-Source Capacitance per Unit Area COXD Gate-Drain Oxide Capacitance per Unit Area VTD Gate-Drain Overlap Depletion Threshold All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 3. Transfer Characteristics Circuit Simulation result Evaluation circuit V3 0Vdc V2 U2 10Vdc U1 DIRG4PC50KD V1 IRG4PC50KD 0Vdc 0 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 4. Comparison Graph Circuit Simulation Result Simulation Result Test condition : Vce = 10 V Vge(V) Ic(A) Error (%) Measurement Simulation 1 7 7.0434 0.62000 2 7.23 7.2251 -0.06777 5 7.62 7.5851 -0.45801 10 8.02 8.00 -0.24938 20 8.55 8.5794 0.34386 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 5. Fall Time Characteristics Circuit Simulation result Evaluation circuit V3 0Vdc R1 R2 U2 16 U1 5 V1 = 0 DIRG4PC50KD V4 IRG4PC50KD V2 V2 = 15 480Vdc TD = 0 TR = 10n TF = 10n PW = 5u PER = 100m 0 Test condition Ic=30(A) ,Vcc=480(V) Measurement Simulation tf 95[Typ.]~140[Max.] ns 112.790 ns All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 6. Gate Charge Characteristics Circuit Simulation result Evaluation circuit V3 0Vdc D1 30Adc U2 I2 U1 Dbreak PER = 1m W1 DIRG4PC50KD PW = 500u + IRG4PC50KD V2 TF = 10n - TR = 10n TD = 0 W 400Vdc I2 = 2m IOFF = 100uA I1 = 0 I1 ION = 0A 0 Test condition : Vcc=400(V) ,Ic=30(A) ,Vge=14(V) Measurement Simulation Error(%) Qge 25 nc 25.2785 nc 1.11400 Qgc 85 nc 87.253 nc 2.65059 Qg 182 nc 180.659 nc -0.73681 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 7. Saturation Characteristics Circuit Simulation result Evaluation circuit V3 0Vdc U2 U1 0Adc I1 DIRG4PC50KD IRG4PC50KD V1 15Vdc 0 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 8. Comparison Graph Circuit Simulation Result Simulation Result Vce(sat)(V) Ic(A) Error (%) Measurement Simulation 2 1.01 0.948462 -6.09287 5 1.24 1.2406 0.04839 10 1.40 1.3998 -0.01429 20 1.58 1.5800 0.00000 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 9. Forward Current Characteristic Circuit Simulation Result Evaluation circuit R1 10m V1 U1 0Vdc DIRG4PC50KD 0 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 10. Circuit Simulation Result Comparison graph Simulation Result Vfwd(V) Vfwd(V) Ifwd (A) %Error Measurement Simulation 0.01 0.43 0.43072 0.16744 0.02 0.465 0.463218 -0.38323 0.05 0.51 0.510821 0.16098 0.1 0.55 0.551433 0.26055 0.2 0.595 0.600523 0.92824 0.5 0.68 0.684186 0.61559 1 0.755 0.763061 1.06768 2 0.84 0.861770 2.59167 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 11. Junction Capacitance Characteristic Circuit Simulation Result Evaluation circuit V1 = 0 V2 = 100 V2 TD = 0 DIRG4PC50KD TR = 1u TF = 1u U1 PW = 1u PER = 10u 0 Circuit Simulation Result All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 12. Comparison graph Simulation Result Cj(pF) Cj(pF) Vrev (V) %Error Measurement Simulation 2 1409.8 1405.2 -0.32629 5 883.66 892.436 0.99314 10 604.62 621.149 2.73378 20 426.25 429.554 0.77513 50 264.96 259.686 -1.99049 100 177.89 177.871 -0.01068 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 13. Reverse Recovery Characteristic Circuit Simulation Result Evaluation circuit R1 50 V1 = -9.5 V2 = 10.75 TD = 0 V2 U1 TR = 10n TF = 10n DIRG4PC50KD PW = 10u PER = 50u 0 Compare Measurement vs. Simulation Measurement Simulation Error(%) trj 64 ns 64.335 ns 0.52344 trb 136 ns 135.78 ns -0.16176 All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
  • 14. Reverse Recovery Characteristic Reference Measurement trj=64(ns) trb=136(ns) Conditions:Ifwd=Irev=0.2(A),Rl=50 Example Relation between trj and trb All Rights Reserved Copyright (C) Bee Technologies Inc. 2004