SPICE MODEL of IRG4PC50KD (Standard+FWDP Model) in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.
SPICE MODEL of IRG4PC50KD (Standard+FWDP Model) in SPICE PARK
1. Device Modeling Report
COMPONENTS: Insulated Gate Bipolar Transistor (IGBT)
PART NUMBER: IRG4PC50KD
MANUFACTURER: International Rectifier
REMARK: Free-Wheeling Diode (Professional Model)
Bee Technologies Inc.
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
2. Pspice model
Model description
parameter
TAU Ambipolar Recombination Lifetime
KP MOS Transconductance
AREA Area of the Device
AGD Gate-Drain Overlap Area
WB Metallurgical Base Width
VT Threshold Voltage
KF Triode Region Factor
CGS Gate-Source Capacitance per Unit Area
COXD Gate-Drain Oxide Capacitance per Unit Area
VTD Gate-Drain Overlap Depletion Threshold
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
3. Transfer Characteristics
Circuit Simulation result
Evaluation circuit
V3
0Vdc
V2
U2 10Vdc
U1
DIRG4PC50KD
V1 IRG4PC50KD
0Vdc
0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
4. Comparison Graph
Circuit Simulation Result
Simulation Result
Test condition : Vce = 10 V
Vge(V)
Ic(A) Error (%)
Measurement Simulation
1 7 7.0434 0.62000
2 7.23 7.2251 -0.06777
5 7.62 7.5851 -0.45801
10 8.02 8.00 -0.24938
20 8.55 8.5794 0.34386
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
5. Fall Time Characteristics
Circuit Simulation result
Evaluation circuit
V3
0Vdc
R1
R2 U2 16
U1
5
V1 = 0 DIRG4PC50KD
V4 IRG4PC50KD V2
V2 = 15 480Vdc
TD = 0
TR = 10n
TF = 10n
PW = 5u
PER = 100m
0
Test condition Ic=30(A) ,Vcc=480(V)
Measurement Simulation
tf
95[Typ.]~140[Max.] ns 112.790 ns
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
6. Gate Charge Characteristics
Circuit Simulation result
Evaluation circuit
V3
0Vdc
D1
30Adc
U2 I2
U1 Dbreak
PER = 1m W1 DIRG4PC50KD
PW = 500u + IRG4PC50KD V2
TF = 10n -
TR = 10n
TD = 0 W 400Vdc
I2 = 2m IOFF = 100uA
I1 = 0 I1 ION = 0A
0
Test condition : Vcc=400(V) ,Ic=30(A) ,Vge=14(V)
Measurement Simulation Error(%)
Qge 25 nc 25.2785 nc 1.11400
Qgc 85 nc 87.253 nc 2.65059
Qg 182 nc 180.659 nc -0.73681
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
7. Saturation Characteristics
Circuit Simulation result
Evaluation circuit
V3
0Vdc
U2
U1 0Adc
I1
DIRG4PC50KD
IRG4PC50KD
V1
15Vdc
0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
8. Comparison Graph
Circuit Simulation Result
Simulation Result
Vce(sat)(V)
Ic(A) Error (%)
Measurement Simulation
2 1.01 0.948462 -6.09287
5 1.24 1.2406 0.04839
10 1.40 1.3998 -0.01429
20 1.58 1.5800 0.00000
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
9. Forward Current Characteristic
Circuit Simulation Result
Evaluation circuit
R1
10m
V1 U1
0Vdc
DIRG4PC50KD
0
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004
14. Reverse Recovery Characteristic Reference
Measurement
trj=64(ns)
trb=136(ns)
Conditions:Ifwd=Irev=0.2(A),Rl=50
Example
Relation between trj and trb
All Rights Reserved Copyright (C) Bee Technologies Inc. 2004