1. 1
ECE6420 Wireless IC Design
Final Design Project Report
Tianhao Li 902885592
Chenxi Yin 903146918
School of Electrical and Computer Engineering
Georgia Institute of Technology
2. 2
Introduction
In this report, a wideband direct downconversion receiver (RX) consisting of a differential common
gate low-noise amplifier (LNA) and two Gilbert Cell mixers is presented. The LNA achieves a high
noise figure (NF) and wideband input matching by taking advantage of multiple feedback to
decouple the trade-off between input matching and gain. This design is inspired by work concluded
in [1].
Figure 1. Topology of the direct downconversion RX.
Performance Summary of the Proposed Design
Specifications Requirements Measurements Achieved?
𝑉𝐷𝐷 ≤ 2.5 V 2.5 V Yes
DC Power Budget 80 mW 41.45 mW Yes
|𝑆11| < -10 dB -10.035 dB Yes
Frequency Bandwidth 2.4 – 5 GHz 2.4 – 5 GHz Yes
IF Bandwidth 50 MHz 50 MHz Yes
Peak Conversion Gain 27 dB 32.016 dB Yes
Noise Figure 5 dB Min: 3.421 dB
Max: 3.691 dB
Yes
𝑃1𝑑𝐵 @ Input -25 dBm -23.42 dBm Yes
𝑃𝐼𝐼𝑃3 -20 dBm -14.557 dBm Yes
Total Inductance Budget 20 nH 2.29 nH Yes
3. 3
Schematic
Figure 2. Schematic of the LNA with the output buffer [1].
Device/Source Value Device/Source Value
𝑀1 19 um/0.175 um 𝑅 𝐿 880 Ohm
𝑀2 2 um/1 um 𝐶1 0.7 pF
𝑀3 11 um/0.3 um 𝑉𝐵1 1.28 V
𝑀 𝐵1 15 um/0.13 um 𝑉𝐵2 1.4 V
𝑀 𝐵2 25 um/0.9 um 𝑉𝐵3 1.16 V
𝑅 𝐵 5 kOhm 𝑉𝐵4 2.05 V
4. 4
Figure 3. Schematic of the Gilbert Cell mixer [2].
Device/Source Value Device/Source Value
𝑀4 7 um/0.145 um 𝑅 𝐷 755 Ohm
𝑀5 31 um/0.13 um 𝑉𝐵5 0.844 V
𝑀6 90 um/0.4 um 𝑉𝐵6 0.781 V
𝑅 𝐵 5 kOhm 𝑉𝐵7 1.5 V
Theoretical Analyses
a) Input Matching
𝑅𝑖𝑛 =
1
𝑔 𝑚1(1 − 𝐴 𝑃𝑂𝑆 − 𝐵 𝑃𝑂𝑆)
where 𝐴 𝑃𝑂𝑆 = 𝑔 𝑚2 𝑅 𝐿 and 𝐵 𝑃𝑂𝑆 =
𝑔 𝑚3
2𝑔 𝑚1
𝐼 𝐷1 =
1
2
𝜇 𝑛 𝐶 𝑜𝑥
𝑊3
𝐿3
(𝑉𝑔𝑠3 − 𝑉𝑡𝑛)2
= 1.53 mA
𝑔 𝑚1 = √2𝜇 𝑛 𝐶 𝑜𝑥
𝑊1
𝐿1
𝐼 𝐷1 = 0.00682 S
𝐼 𝐷2 =
1
2
𝜇 𝑝 𝐶 𝑜𝑥
𝑊2
𝐿2
(𝑉𝑔𝑠2 − 𝑉𝑡𝑝)2
= 78.86 uA
𝑔 𝑚2 = √2𝜇 𝑝 𝐶 𝑜𝑥
𝑊2
𝐿2
𝐼 𝐷2 = 2.103 ∗ 10−4
S
6. 6
2. Conversion Gain
The peak conversion gain is 32.016 dB. 5 GHz is within the -3dB bandwidth.
3. Noise Figure
𝑁𝐹 𝑚𝑖𝑛 is 3.421 dB when 𝑓𝑅𝐹 = 2.4 GHz and 𝑁𝐹𝑚𝑎𝑥 is 3.691 dB when 𝑓𝑅𝐹 = 5 GHz.
7. 7
4. 𝑷 𝑰𝑰𝑷 𝟑
The lowest 𝐼𝐼𝑃3 is -14.557 dBm.
5. 𝑷 𝟏𝒅𝑩
The worst 𝑃1𝑑𝐵 is -23.42 dBm.
8. 8
6. Power Consumption
Total current drawn from 𝑉𝐷𝐷 is 16.58 mA with 𝑉𝐷𝐷 = 2.5 V . Therefore, total power
consumption is 41.45 mW.
Comparison between Simulation and Calculation
a) Input Matching
For this design the input resistance 𝑅𝑖𝑛 (after matching network) is 280Ω, comparing to the 100
Ω the source impedance LNA sees.
At high frequency, 𝐶𝑔𝑠 will shunt current from input resistance to analog ground; therefore
inductive matching network at input is desirable.
b) Conversion Gain
The conversion gain of this wideband receiver is achieved through the combination of ideal balun,
differential LNA, voltage buffer, and Gilbert cell mixer.
The total conversion gain for this design is 32.016 dB. Comparing to theoretical calculation result:
35.56 dB. Channel length modulation is ignored in the hand analysis because the difficulty to
extract lambda from model file, which might affect the gain calculation significantly.
c) Noise Figure
The worst case NF in this design happens at 5GHz stands at 3.69 dB, comparing to 3.76 dB through
hand calculation (where 𝛾 =
2
3
). The hand analysis result might be worse because trans-
conductance 𝑔 𝑚 might be smaller in the simulation results.
9. 9
References
[1] S. H. K. E. E. Sobhy, A. Helmy, and E. Sinencio, ‘‘A 2.8-mW sub-2-dB noise-figure inductorless
wideband CMOS LNA employing multiple feedback,’’ IEEE Trans. Microw. Theory Tech., vol. 59, no. 12,
pp. 3154–3161, Dec. 2011.
[2] cas.ee.ic.ac.uk/old/students/ganesh/mixers.html
![2
Introduction
In this report, a wideband direct downconversion receiver (RX) consisting of a differential common
gate low-noise amplifier (LNA) and two Gilbert Cell mixers is presented. The LNA achieves a high
noise figure (NF) and wideband input matching by taking advantage of multiple feedback to
decouple the trade-off between input matching and gain. This design is inspired by work concluded
in [1].
Figure 1. Topology of the direct downconversion RX.
Performance Summary of the Proposed Design
Specifications Requirements Measurements Achieved?
𝑉𝐷𝐷 ≤ 2.5 V 2.5 V Yes
DC Power Budget 80 mW 41.45 mW Yes
|𝑆11| < -10 dB -10.035 dB Yes
Frequency Bandwidth 2.4 – 5 GHz 2.4 – 5 GHz Yes
IF Bandwidth 50 MHz 50 MHz Yes
Peak Conversion Gain 27 dB 32.016 dB Yes
Noise Figure 5 dB Min: 3.421 dB
Max: 3.691 dB
Yes
𝑃1𝑑𝐵 @ Input -25 dBm -23.42 dBm Yes
𝑃𝐼𝐼𝑃3 -20 dBm -14.557 dBm Yes
Total Inductance Budget 20 nH 2.29 nH Yes](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)