Mips

MIPS Architecture
Memory organisation
the purpose of memory is to store groups of bits and deliver them to the processor (for loading into regs)
memory can hold both data and program
SPIM simulator:
0x0040 0000 - text segment/program instructions
0x1000 0000 - data segment
0x7FFF FFFF and decreasing addresses - stack segment
a word is the number of bits that can be transferred at one time on the data bus and stored in a reg
Mips: 32-bits/4 bytes; others use different sizes

MIPS Architecture
storage order of words
little-endian - store the little end of the word first
processor organisation
registers
where it stores information
what it does in executing instructions
MIPS:
all registers are 32-bit
PC (program counter) holds address of next instruction
32 general purpose registers (can use name or number)
instruction set: load & store, operations, jump & branch, others

MIPS Architecture
Registers
First reg ($0) is a constant 0 and cannot be changed
Last reg ($31/$ra) stores the return address from a proc.
$1($at) - Assembler temporary. We will avoid using it.
$v0 - $v1 - values returned by a function
$a0 - $a3 - arguments to a function
$t0 - $t9 - temporary use. Use freely but if you call a procedure that procedure may change it.
$s0 - $s7 - saved by procedures. When you are writing a proc you must save and restore previous values.

MIPS Architecture
Instruction set
load and store
load data from memory into a reg, or store reg contents in memory
lw $t0, num1 #load word in num1 into $t0
sw $t0, num2 # store word in $t0 into num2
li $v0, 4 # load immediate value (constant) 4 into $v0
operations: arithmetic and logic
perform the operation on data in 2 regs and store result in 3rd reg
add $t0, $t3, $t4 # $t0 = $t3 + $t4
jump and branch
alter the PC to control flow of program (if and loop statements)
specialised instructions (e.g. floating point instructions)

Basic Assembly Language Instructions
Levels
binary machine instructions (in hex)
symbolic actual machine instructions (regs shown: $31)
assembly language instructions
RISC (not always 1:1 correspondence)
Load and Store instructions
move data between memory and the processor
always 2 operands, a register and an address
register is always first, direction of movement is opposite
lw $t0, Num1 # load word, $t0=Num1
sw $t0, Num2 # store word, Num2=$t0
load immediate: li $vo, 4
load address: la $a0, prompt_message (note diff with lw)

Arithmetic
done in registers, with 3 operands
add Rdest, Rsrc1, src2
(x + 5 - y) * 35/3 lw $t0, x # load x from memory
lw $t1, y # load y from memory
add $t0, $t0, 5 # x + 5
sub $t0, $t0, $t1 # x + 5 - y
mul $t0, $t0, 35 # (x + 5 - y) * 35
div $t0, $t0, 3 # (x + 5 - y) * 35/3
arithmetic overflow, signed numbers
add, sub, mulo, div check for overflow (not mul)
“ arithmetic overflow” and program usually stops
unsigned numbers: addu, subu, mulou, divu

Input and Output - System calls
difficult and specialised job
SPIM: 10 basic services
call code always goes in $v0 and the system is called with syscall
Service Code Arguments Results
print int 1 $a0 = integer signed decimal integer printed in window
print str 4 $a0 = str address string printed in window
read int 5 (none) $v0 holds integer that was entered
read str 8 $a0=store address characters are stored
$a1= length limit
exit 10 (none) Ends the program

Control structures
if, while, for
PC determines order of program execution
unconditional jump
puts the address of a label in the PC
execution continues from that point
jar also saves the old PC value as a “return address” in register $ra ($31)
Inst Example Meaning
j label j do_it_again next instruction is at the label do_it_again:
jal label jal my_proc execution of procedure my_proc will start.$ra holds address of instruction following the jal
jr Rsrc jr $ra Return from procedure call by putting $ra value back into the PC

Control structures
conditional jump
the condition is always a comparison of 2 registers, or a reg and a constant
normally use signed numbers (if unsigned, add a ‘u’ to the command)
can compare with z using $0 as src2 (or add ‘z’ to command)
Instruction Branch to label if Unsigned
beq Rsrc1,Src2,label Rsrc1 = Src2
bne Rsrc1,Src2,label Rsrc1 <> Src2
blt Rsrc1,Src2,label Rsrc1 < Src2 bltu
bgt Rsrc1,Src2,label Rsrc1 > Src2 bgtu
ble Rsrc1,Src2,label Rsrc1 <= Src2 bleu
bge Rsrc1,Src2,label Rsrc1 >= Src2 bgeu

Control structures
IF constructs: choosing alternatives (if, if-then-else)
IF num < 0 then num = - num ENDIF IF temperature >= 25 then activity = “go swimming” else activity = “ride bicycle” endif print (activity) lw $t0, num bgez $t0, endif0 # must be ltz ----- sub $t0, $0, $t0 # 0 - num sw $t0, num endif0: # num is now non-negative lw $t0, temperature blt $t0, 25, else25 la $a0, swim j endif25 else25: la $a0, cycle endif25: li $v0, 4 # print string call code syscall Note: “branch around” and jump ins needed before else

Control structures
loops: while and for (both pre-test loops), repeat (post-test loop)

Control structures
sum = 0 num = 0 WHILE num >= 0 DO sum = sum + num read (num) ENDWHILE (write 10 lines) FOR countdown = 10 downto 1 DO print “Hello again …” ENDFOR mov $t0, $0 # sum = 0 mov $v0, $0 # num = 0 while5: bltz $v0, endwhile5 # $v0 < 0? add $t0, $v0 #$v0 switches role here li $v0, 5 # read int call syscall j while5 endwhile5: # set up print arguments before loop la $a0, hello_again li $v0, 4 # print string call li $t0, 10 # countdown for10: beqz $t0, endfor10 syscall # print another line sub $t0, 1 # decr countdown j for10 # continue for loop endfor10

Instruction formats and addressing modes
Instruction formats
register
immediate
jump
Addressing modes
immediate - value built in to the instruction
register - register used for data
Memory referencing - used with load and store instructions
label - fixed address built in to the instruction
indirect - register contains the address
Base addressing - field of a record
Indexed addressing - element of an array

Instruction formats
all instructions fit in 32-bit words
decoding starts with the leftmost 6-bits, the op code
Register
For operations using only registers as operands, the operation code is 000000
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
000000 src reg target reg Dest shift amt function
000000 01010 00111 00101 00000 100010
the last line of the table gives as an example a subtract instruction, sub $5, $10, $7
3 5-bit fields identify the 3 regs: src, target/src, dest (diff from assembly)

Instruction formats (Register)
flow between registers and ALU
add $t3, $t1, $t2
$t1 = $9, $t2 = $10, $t3 = $11

Immediate
16-bit immediate (constant), 6-bit op, 2 regs
addi $t1, $t2, 0xfffe (actually adds 0xfffffffe, -2)
shorter numbers are sign extended
6 bits 5 bits 5 bits 16 bits
op code src reg target reg immediate value
001000 01010 01001 1111 1111 1111 1110

Jump
use all 26-bits following the op code for jump address
last 2 bits are always 0 (word alignment)
upon execution, the 26-bit jump target is shifted left 2 bits and stored in the PC, causing the jump
6 bits 26 bits - jump target (words)
j 0x0040000c
000010 0x0100003
can only target the first 256Mb of memory
workarounds: reserve “low” memory, use jump-reg instructions

Addressing Modes - Immediate
usually use lower 16-bits, uses 2 instructions if > 16-bits
PC-relative addressing - offset or displacement used
Examples of instructions with immediate data:
addi $t0,t1,65 sub $t0,7 #assembled as: addi $t0, $t0, -7 li $t3, 0x12345678 #assembled as
lui $at, 0x1234 ori $t3, $at, 0x5678 #puts it all together bgez $t5, 16 #skip 4 instructions ahead if # $t5 is non-negative
# (4 is encoded in #immediate field)

Addressing Modes - Immediate
faster than memory
some instructions reference registers exclusively
32 regs, only 5 bits to specify a register
Examples:
addu $t3, $t1, $t2 # add (unsigned) $t3 = $t1 + $t2
sub $t0, $t3 # subtract (signed) $t0 = $t0 - $t3

Memory Addressing
can address up to 4GB (slower access)
label - fixed address built into the instruction
also known as direct addressing
lw $t0, MyNumber # load the word into $t0
sb $t9, firstInitial # store rightmost 8 bits of $t9 in data seg
indirect - register contains the address
a register can be used as a pointer
e.g. stepping through a string one step at a time
catStr: .asciiz “cat”
la $t0, catStr # load address i.e. put address of catStr into $t0
lb $t1, ($t0) # ‘c’ is now in $t1
addi $t0, 1 # point to next character
lb $t2, ($t0) # ‘a’ is now in $t2

Memory Addressing - indirect addressing (cont.)
base addressing
useful for referring to fields or a record or input
e.g. telephone numbers: area code/prefix/number/extension
4 short ints (16-bit halfwords)
the extension starts 6 bytes from the beginning of the record
add offset 6 to a register pointing to the record
la $t0, MyPhone # $t0 points to a telephone record
lh $t1, 6($t0) # $t1 loaded with the extension no. in record

Memory Addressing - indirect addressing (cont.)
indexed addressing
useful for indexing arrays
e.g. copying a 10 byte string to another string
li $t1, 9 # $t0 indexes arrays
copyloop:
lb $t1, str1($t0) # $t1 used to transfer character
sb $t1, str2($t0) # to str2
sub $t10, 1 # decrement array index
bgez $t0, copyloop # repeat until $t0 < 0
if moving words, need to decrement by 4 instead of 1
assembler actually uses 3 machine ins for each indexed ins

Memory Addressing -the bottom line
sb $t1, str2($t0) (address was 0x1001000C; 0x1001 = 4097)
Underlying instruction: sb $9, 12($1)
op code sb rs ($1) rt - $9 immediate (offset) 0x000c
101000 00001 01001 0000 0000 0000 1100

Mips

by Stefano Salvatori on Aug 05, 2007

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