CONTENTS 1. INTRODUCTION 2. CASES OF METASTABILITY 3. ILLUSTRATION OF METASTABILITY 4. ENTERING METASTABILITY 5. DURING METASTABILITY 6. INTRODUCTION TO MTBF 7. DERIVATION OF MTBF 8. REFERENCES
WHAT IS METASTABILTY Whenever there are setup and hold timeviolations in any flip-flop, it enters in a statewhere its output is unpredictable At the end of metastable state, the flip-flopsettles down to either 1 or 0.
CASES OF METASTABILITY• FOR SYNCHRONOUS SYSTEM-When skew is present• FOR ASYNCHRONOUS SYSEM-Whenever setup and hold time violation occurs.
ENTERING METASTABILITYFig:2.Flip –Flops, with four gate delays from D to Q.
GRAPH B/W INPUT VOLTAGE AND TIMEFigure 2 :Charts show multiple inputs D, internal clock (CLK2) andmultiple corresponding outputs Q (voltage vs. time). The input edge ismoved in steps of 100ps, 1ps and 0.1fs in the top, middle and bottom
From the graph if we increase thefrequency of input signal then theprobability of system to move inmetastability will increase period of metastability also increased
DURING METASTABILITYFig.3 Analog model of a metastable latch
•The Analog model result in two first-order differential equations that can becombined into one, as follows:-
INTRODUCTION TO MTBF MTBF is Mean time between failure It gives us information on how often a particularelement will fail. It gives the average time interval between twosuccessive failures.
EQUATION OF MTBF The MTBF equation isMTBF =Where:S = synchronization periodTw, = flip-flop characteristic constantsFC= clock frequencyFD = average input rate of change
DERIVING MTBF EQUATION Clearly, if meta-stability starts with V=VO andends when V=V1, then the time to exit meta-stability is tm:
Probabilistic analysis shows that, given the fact thata latch is metastable at time zero, the probabilitythat it will remain metastable at time t >0 is e-t/τ, which diminishes exponentially fast. The probability of entering metastability, which isthe probability of D‟s having changed within theTW window, is TW/TC =TWFC But D may not change every cycle; if it changes ata rate FD, then the rate of entering metastabilitybecomes Rate =FDFCTW.
P(failure) = p(enter MS) X p(time to exit >S)= XRate(failures) = X The inverse of the failure rate is the meantime between failures (MTBF):MTBF =
MTBF EXAMPLE Consider an ASIC designed for a 28-nm high-performance CMOS process. We estimate t =10 ps, TW = 20 ps and FC = 1 GHz. Let’s assume that data changes every 10clock cycles at the input of our flip-flop, andwe allocate one clock cycle for resolution: S =TC. Plug all these into the formula and we obtain4 X 1029 years.
REFERENCES R. Ginosar, “Metastability and synchronizers:Atutorial,” IEEE Design Test Comput., vol. 28, pp.23–35, May 2011. S. Lubkin, „„Asynchronous Signals in DigitalComputers,‟‟ Mathematical Tables and OtherAids to Computation (ACM section), vol. 6, no.40, 1952, pp. 238-241. H.J.M. Veendrick, „„The Behavior of Flip-FlopsUsed as Synchronizers and Prediction of TheirFailure Rate,‟‟ IEEE J. Solid-State Circuits, vol.15, no. 2, 1980, pp. 169-176.