This document describes about the timing behavior of digital design and also describes about the working of Hard Disk. How data is stored on hard disk.
A Report on State MachinesTiming Behavior and Data storage in hard disk drive
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
A Report
on
State MachinesTiming Behavior
and
Data storage in hard disk drive
Self –Study-Course(DIGITAL DESIGN)
by
Rohit singh
Amit Kumar Singh
(M.Tech(VST))
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Topics
SECTION 1
1. Timing in clocked sequential circuits
2. Setup/Hold Time
3. Timing constraints in clocked sequential circuits
4. Max/Min delays
5. Minimum Clock period for a Sequential circuit
6. Clock skew
7. Asynchronous Inputs
8. Handling asynchronous inputs
9. Synchronization Failure
10. Metastability Resolution Time (tr)
11. Reducing the chance of Synchronizer Failure
12. Analysis of Metastable Timing
13. Better synchronizers
14. Impact of Jitter
SECTION 2
1. The role of Hard Drive
2. Structure of Hard Drive.
3. Working Principle of Hard Drive
4. Data storage in Block mode
5. Technical specifications of Hard Drive
6. Magnetic Recording
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
1)Timing in clocked sequential circuits
1) The purpose of the clock signal is to synchronize the operation of flip flops and combinational
logic in order to prevent timing problems.
2) In sequential logic we must examine not only the propagation delays through gates and wires
but also the changes relative to clocking events of flip flops.
3) For example:
For an ideal flip flop if the D input changed at exactly the same time as the active edge of the
clock,the flip flop would operate correctly.However for a real flip flop, D input must be stable
for a certain amount of time before the active edge of the clock called setup time and D input
must also be stable for a certain amount of time after the active edge of the clock called the
hold time.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
2) Setup/Hold Time
1) An input to a flip flop can be validly recognized only if: it is stable before the clocking event for
a minimum time interval Tsetup and
2) it is stable after the clocking even for a minimum time interval Thold .
Note:
1) It is dangerous to allow input signals to change very close to the sampling event
2) If setup or hold time constraints are not satisfied, the input maybe interpreted as a 1 or a 0 or
some unrecognizable value between 0 and 1 (metastable value)
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
3)Timing constraints in clocked sequential circuits
1. Every flip-flop has restrictive time regions around the active clock edge in which input should
not change. We call them restrictive because any change in the input in this regions the output
maybe interpreted as a 1 or a 0 or some unrecognizable value between 0 and 1 (metastable
value).
2. It may be derived from either the old input, the new input, or even in between the two. Here
we define, two very important terms in the digital clocking. Setup and Hold time.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
3. The setup time is the interval before the clock where the data must be held stable.
4. The hold time is the interval after the clock where the data must be held stable.
5. Hold time can be negative, which means the data can change slightly before the clock edge and
still be properly captured. Most of the current day flip-flops has zero or negative hold time.
Let’s assume that din is applied in a way that satisfies setup and hold for FF1, and let’s examine
what will happen at FF2 ?
An Example:
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
4) Max/Min delays
I. Unfortunately, delays through gates are not constant. Delays change with:
II. Supply Voltage, Temperature, and Manufacturing Process
III. Setup constraint is more difficult to satisfy when delays are max (V , T , P )
IV. Hold constraint is more difficult to satisfy when delays are min (V , T , P )
5)Minimum Clock period for a Sequential circuit
Minimum Clock period: Maximum frequency at which the circuit can operate.
Note: maximum clock period must be computed with MAX DELAY.
6)Clock skew
.
a) clock skew is a phenomenon in synchronous circuits in which the clock signal arrives at
different components at different times. This can be caused by many different things, such as
wire-interconnect length,temperature variations, variation in intermediate devices, capacitive
coupling, material imperfections, and differences in input capacitance on the clock inputs of
devices using the clock.
b) Positive clock skew means that clock siganl reaches receiving FF faster than the FF that sends
the data.Negative skew is the opposite.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
In this example if clock0=clock1 (no skew) setup at FF2 is violated .
Positive skew makes easier to satisfy setup constraint: tFF1+tP < Tclock–Tsu2+tskew
Positive skew makes more difficult to satisfy hold constraint: tFF1 + tP > Th2+tskew
7)Asynchronous Inputs
I. Synchronous circuits can have asynchronous inputs.
II. Even a supposedly synchronous circuit like the D flip flop can have asynchronous inputs such
as preset and clear.
III. In this case glitches makes asynchronous inputs extremely dangerous and should be avoided.
IV. Sometimes asynchronous inputs come from signals that must pass from the outside world
into the synchronous system
V. In this case it is metastability to become an issue.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
8)Handling asynchronous inputs
The best way to deal with asynchronous signals is to synchronize them to the clocked system
It is essential for asynchronous inputs to be synchronized at only one place in a system and as
soon as possible.
► Never allow asynchronous inputs to fan-out to more than one flip-flop.
► Synchronize as soon as possible and then treat as synchronous signal.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Possible problem occurring when synchronizing at more than one place
Possible problem with procrastinating (delaying or deferring an action to a later time)
synchronization
Example of combinational logic hiding the fact that there are two synchronizers.
Since different paths through combinational logic will have different delays, the likelihood of an
inconsistent result is even greater.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
9)Synchronization Failure
What if the asynchronous input to the synchronizer FF changes too close to clock edge?
the FF may enter a metastable state – neither a logic 0 nor 1 .
Metastability:
This problem arises as a result of violation of setup and hold times. Every flip-flop that is used
in any design has a specified setup and hold time, or the time in which the data input is not
legally permitted to change before and after a rising clock edge. If the signal does change
during this time window, the output will be unknown or “metastable”. This propagation of
unwanted information is called Metastability. As a result the output of a flip-flop can produce
a glitch or remain temporarily in metastable state, thus taking longer to return to stable state.
it may stay in this state an indefinite amount of time.
this is not likely in practice but has some probability.
Synchronization failure is said to occur if a system uses a synchronizer output while the
output is still in metastable state.
The only way to recover from synchronization failure is to reset the entire circuit.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
While the probability of synchronizer failure can be made small, it can never be eliminated as
long as there are asynchronous inputs.
oscilloscope traces demonstrating synchronizer failure and eventual decay to steady state
Small, but non-zero probability that the FF output will get stuck in an in-between state.
There are two ways to get a flip flop out the metastable state:
force the flip flop into a valid logic state using input signals that meet
the specifications for minimum pulse width, setup and hold time
wait “long enough”, so the flip flop comes out of metastability on its own
10)Metastability Resolution Time (tr)
Metastability is the ability of a digital electronic system to persist for an unbounded time in an
unstable equilibrium or metastable state. In metastable states, the circuit may be unable to settle
into a stable '0' or '1' logic level within the time required for proper circuit operation. As a result,
the circuit can act in unpredictable ways, and may lead to a system failure.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Maximum time that the output can remain metastable without causing synchronizer (and system)
failure
sucombclkr ttTt
11)Reducing the chance of Synchronizer Failure
1. One way to reduce the probability of synchronizer failure is to use faster flip flops and lengthen
the system’s clock period. This gives the synchronizer flip-flop more time to enter a stable state.
2. A second strategy is to place two synchronizers in series. Both flip-flop must be metastable
before the synchronization fails (an event with low probability)
sucombclkr ttTt
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Design Partitioning
This is a technique for efficient designing of modules having multiple
clocks. According to this guideline,
(1) a module should work on one clock only.
(2) a synchronizer module (module that performs the function of transferring signals from
one domain to another) be made for all signals that cross from one clock domain to another,
so that all inputs are synchronized to the same clock before entering the module and
(3) the synchronizer module should be as small as possible.
12)Analysis of Metastable Timing
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
fT
e rt
0
/
MTBF
Mean Time Between synchronizer Failures
tr resolution time
f frequency of the flip-flop clock
α number of asynchronous input changes per second applied to the flip flop
T0 and constants that depends on the electric characteristics of the flip flop
13)Better synchronizers
A way to improve the MTBF is to lengthen the clock applied to the synchronizer circuit (ntclk).
Note: CLOCKN IS n times slower than CLOCK.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Realign with the fast clock at FF3.
At very high frequency, the feasibility of the multicycle synchronizers is limited by the clock
skew
14.Impact of Jitter
The accuracy error that affects each clock edge and cycle is digital clock jitter.
A synchronous systems, which, is controlled by a clock, may be affected by jitter.
An Example:Digital Audio System
Any digital audio unit is essentially a synchronous systems, and as such, it is controlled by a
clock, which, as any other real world clock, is affected by jitter.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
In digital audio recording process the analog musical signal is sampled with a given fixed
frequency Fc (which according to the current audio standards can be 44.1, 48, 96 or 192 kHz, but
could be in principle any other) and each sample level is converted into a number, which is
stored on a digital media.
At reproduction time, the samples are extracted from a digital media, converted back into an
analog signal with the same frequency used at recording time, and filtered with a very steep
low pass filter.
Digital theory proofs that in this way, provided that the original signal does not extend to
frequencies higher than Fc/2, it is possible to reconstruct the original signal.
In particular, there is a subtle point that requires a lot of attention, while it was completely
missed by original digital audio designers: what happens of the inevitable differences between
the sampling clock at recording time and the sample clock at reproduction time?
It is perfectly clear that the two clocks cannot be exactly the same: there will always be a (very)
small difference in frequency, but also each clock edge will not take place exactly at the
expected time, that is will be affected by a timing error: a very small one, again, but an error
difficult and expensive to control.
This is what happens to a sinusoid when it is sampled and reproduced with a jittered clock. In
practice, as you see, it results distorted in a very strange and (apparently) unpredictable way.
It is clear that the problem is two-folds: part of the error is generated at recording time, while
another part added at reproduction time.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
For the first part, we cannot do better than assume that recording processes (as in effects
normally happens) take the issue into account, and consider the recording completely error
free: in facts, the recording is only a sequence of numbers, there is no information at all about
the original sampling clock, which is assumed ideal.
All we can do is to try to minimize the amount of error added at reproduction time. This amount
is in general widely predominant, given the different amounts of money that is reasonable to
invest in a recording studio clock and in a home player.
All these timing errors, taking place both at recording and reproduction (D/A and A/D
conversion) time, are called sampling jitter.
Sample clock jitter is the only kind of jitter that really directly affects digital audio, or better,
digital audio listening. In audio systems can be recognized many other different types of jitter,
and we will discuss about them in the following, but only because they can finally induce
sample clock jitter.
SECTION 2
Data storage in Hard Disk
1. The role of hard drive
2. Structure of Hard drive
3. Working Principle of Hard drive
4. Data storage in Block mode
5. Technical specifications of hard drive
6. The principle of Magnetic Recording
1. The role of the hard drive
The hard drive is the component which is used to permanently store data, as opposed to RAM, which
is erased whenever the computer is restarted, which is why the term mass storage device is
sometimes used to refer to hard drives.
The hard drive is connected to the motherboard using a hard drive controller which acts as an
interface between the processor and the hard drive. The hard drive controller manages the drives
linked to it, interprets commands sent by the processor and routes them to the drive in question.
Hard drives are generally grouped by interface as follows:
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
IDE
SCSI
Serial ATA
When the USB standard appeared, external cases which could connect a hard drive using a USB port
were released, making hard drives easy to install and increasing storage capacity for making
backups. These are called external hard drives, as opposed to internal hard drives which are plugged
directly into the motherboard; still, they are the same disks, even though they are connected to the
computer using a case plugged into a USB port.
2. Structure of Hard Drive
A hard drive is made up of not just one, but several rigid metal, glass, or ceramic disks, stacked very
close to one another and called platters.
The disks turn very quickly around an axle (currently several thousand revolutions per minute) in a
counter-clockwise direction. A computer works in binart mode, meaning that the data is stored in
the form of 0s and 1s (called bits). Hard drives hold millions of these bits, stored very close to one
another on a fine magntic layer a few microns thick, which is covered by a protective film.
They are read and written using read heads located on both sides of the platters. These heads are
electromagnets which raise and lower themselves in order to read or write data. The read heads are
only a few microns from the surface, separated by a layer of air created by the rotation of the disks,
which generates a wind of about 250km/h (150 mph)! What's more, these disks are laterally mobile,
so that the heads can sweep across their entire surface.
However, the heads are linked to one another and only one of them can read or write at a given
moment. The term cylinder is used to refer to all the data stored vertically on each of the disks.
This entire precision mechanism is contained within a fully airtight case, as the smallest particle can
degrade the disk's surface. This is why hard drives are closed shut with seals, and the warning
"Warranty void if removed", as only hard drive manufacturers can open them (in particle-free
"cleanrooms").
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
3. Working Principle of Hard Drive
The read/write heads are said to be "inductive", meaning that they can generate a magnetic field.
This is especially important in writing: The heads, by creating positive or negative fields, polarise the
disk surface in a very tiny area, so that when they are read afterwards, the polarity reversal
completes a circuit with the read head, which is then transformed by an analog-digital converter
(ADC) into a 0 or 1 which can be understood by the computer.
The heads start writing data from the edge of the disk (track 0), then move onward towards the
centre. The data is organised in concentric circles called "tracks", which are created by low-level
formatting.
The tracks are separated into areas (between two radii) called sectors, containing data (generally at
least 512 octets per sector).
The term cylinder refers to all data found on the same track of different platters (i.e. above and
below one another), as this forms a "cylinder" of data.
Finally, the term clusters (also called allocation units) refers to minimum area that a file can take up
on the hard drive. An operating system uses blocks, which are in fact groups of sectors (between 1
and 16 sectors). A small file may occupy multiple sectors (a cluster).
On old hard drives, addressing was done physically, by defining the position of the date from the
coordinates Cylinder/Head/Sector (CHS).
4.Data storage in Block mode
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Block mode and 32-bit transfer are used to get the best performance out of your hard drive. Block
mode involves transferring data in blocks, usually in 512-byte packets, which keeps the processor
from having to process a large number of tiny one-bit packets. This way, the processor has the
"time" to perform other operations.
Unfortunately, this data transfer mode is only useful for older operating systems (such as MS-DOS),
as recent operating systems use their own hard drive manager, which makes this management
system obsolete.
There is a BIOS option (IDE HDD block mode or Multi Sector Transfer) which can sometimes
determine how many blocks can be managed at once. It is a number between 2 and 32. If you don't
know it, there are several solutions available:
Check your hard drive's documentation
Search for the drive's specifications on the Internet
Carry out tests to determine it.
Still, block mode may generate errors in certain systems, due to redundancies in the hard drive
manager. The system involves disabling one of the two managers:
the 32-bit software manager in the operating system;
block mode in the BIOS.
32-bit mode
32-bit mode (as opposed to 16-bit mode) is characterized by 32-bit data transfers. 32-bit transfer is
comparable to 32 doors opening and closing all at once. In 32-bit mode, two 16-bit words (groups of
bits) are transmitted one after another, then assembled.
The improvements in performance when switching from 16-bit mode to 32-bit mode are generally
insignificant. In any event, it is no longer normally possible to select the mode, as the motherboard
automatically determines which mode to use depending on the type of hard drive.
However, automatically selecting 32-bit mode may slow down IDE CD-ROM drives whose speed is
higher than 24x when they are alone on an IDE ribbon cable. Indeed, when a CD-ROM drive is alone
on the cable, the BIOS cannot tell if it is compatible with 32-bit mode (because it is looking for a hard
drive), in which case it switches to 16-bit mode. In this case, the transfer speed (incorrectly called the
transfer rate) will be lower than the one claimed by the manufacturer.
The solution is to plug the CD-ROM drive and a 32-bit-compatible hard drive into the same ribbon
cable.
5.Technical specifications of hard Drive
Capacity: Amount of data which can be stored on a hard drive.
Transfer rate: Quantity of data which can be read or written from the disk per unit of time. It is
expressed in bits per second.
Rotational speed: The speed at which the platters turn, expressed in rotations per minute (rpm
for short). Hard drive speeds are on the order of 7200 to 15000 rpm. The faster a drive rotates,
the higher its transfer rate. On the other hand, a hard drive which rotates quickly tends to be
louder and heats up more easily.
Latency (also called rotational delay): The length of time that passes between the moment
when the disk finds the track and the moment it finds the data.
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Average access time: Average amount of time it takes the read head to find the right track and
access the data. In other words, it represents the average length of time it takes the disk to
provide data after having received the order to do so. It must be as short as possible.
Radial density: number of tracks per inch (tpi).
Linear density: number of bits per inch (bpi) on a given track.
Surface density: ratio between the linear density and radial density (expressed in bits per
square inch).
Cache memory (or buffer memory): Amound of memory located on the hard drive. Cache
memory is used to store the drive's most frequently-accessed data, in order to improve overall
performance;
Interface: This refers to the connections used by the hard drive. The main hard drive interfaces
are:
o IDE/ATA
o Serial ATA
o SCSI
o However, there are external cases used for connecting hard drives with USB or FireWire
ports.
6.Magnetic Recording
A hard disk drive records data by magnetizing a thin film of ferromagnetic material on a disk.
Sequential changes in the direction of magnetization represent binary data bits. The data is read
from the disk by detecting the transitions in magnetization. User data is encoded using an encoding
scheme, such as run-length limited encoding, which determines how the data is represented by the
magnetic transitions.
A typical HDD design consists of a spindle that holds flat circular disks, also called platters, which
hold the recorded data. The platters are made from a non-magnetic material, usually aluminium
alloy, glass, or ceramic, and are coated with a shallow layer of magnetic material typically 10–20 nm
in depth, with an outer layer of carbon for protection. For reference, a standard piece of copy paper
is 0.07–0.18 millimetre (70,000–180,000 nm).
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Diagram labeling the major components of a computer hard disk drive
Recording of single magnetisations of bits on a 200MB hdd-platter (recording made visible using
CMOS-MagView).
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Report by Rohit Singh and Amit Kumar Singh for Self –Study-Course, M.Tech. (VST), Deptt. Of EE, SOE, Shiv Nadar University
Longitudinal recording (standard) & perpendicular recording diagram
The platters in contemporary HDDs are spun at speeds varying from 4,200 rpm in energy-efficient
portable devices, to 15,000 rpm for high performance servers.The first hard drives spun at 1,200 rpm
and, for many years, 3,600 rpm was the norm.Today, most consumer hard drives operate at a speed
of 7,200 rpm.
Information is written to and read from a platter as it rotates past devices called read-and-write
heads that operate very close (often tens of nanometers) over the magnetic surface. The read-and-
write head is used to detect and modify the magnetization of the material immediately under it. In
modern drives there is one head for each magnetic platter surface on the spindle, mounted on a
common arm. An actuator arm (or access arm) moves the heads on an arc (roughly radially) across
the platters as they spin, allowing each head to access almost the entire surface of the platter as it
spins. The arm is moved using a voice coil actuator or in some older designs a stepper motor.
In modern drives, the small size of the magnetic regions creates the danger that their magnetic state
might be lost because of thermal effects. To counter this, the platters are coated with two parallel
magnetic layers, separated by a 3-atom layer of the non-magnetic element ruthenium, and the two
layers are magnetized in opposite orientation, thus reinforcing each other. Another technology used
to overcome thermal effects to allow greater recording densities is perpendicular recording, first
shipped in 2005, and as of 2007 the technology was used in many HDDs.
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