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TPS2492/93 – High Voltage Hotswap Controller
The document introduces the TPS2492/93 positive high voltage hotswap controllers from Texas Instruments. It provides an overview of hotswap technology and describes the key features of the TPS2492/93 controllers, including their voltage range of 9V to 80V, fault protection capabilities, and output for monitoring load current. It also includes a functional block diagram and description of typical application and basic operation, involving turning on an external N-FET transistor during board insertion and responding to short circuits. Design tools like a calculator and evaluation modules are also mentioned.
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TPS2492/93 – High Voltage Hotswap Controller
- 1. TPS2492/93 – HighVoltage Hotswap Controller Source: T EXAS I NSTRUMENTS
- 2. Introduction Purpose Tointroduce TPS2492/93 positive high voltage power limiting hotswap controllers Outline What is hotswap? TPS2492/93 overview Functional block diagram Typical application Basic operation Content 11 pages
- 3. Hot Swap BasicsHot swap is the action of inserting modules or cables into a system with No interrupting power to the system No disturbing data transactions Target systems include Consumer devices, like laptop peripherals, digital cameras, PDAs... Telecommunication / datacommunication, like server backplanes, base stations, storage area networks... Medical systems
- 4. TPS2492/93 Hot SwapController 9-V to 80-V Operation High-Side Drive for External N-FET Programmable FET Power Limit Programmable Load Current Limit Programmable Fault Timer Load Current Monitor Output Power Good and Fault Outputs Enable/UV, OV Inputs Latch or Auto Restart After Fault EVM Available SLUU425 Calculation Tool Available SLVC033
- 5.
- 6. Typical Application CircuitInput Clamp TVS Bypass capacitor Input voltage monitoring PROG voltage setting Fault time and restart interval (TP2493 only) setting External FET
- 7. Basic Operation –Board Plug in When the board plug in, the TPS2492/93 is held inactive with GATE, PROG, and TIMER held low, and with PG and FLT open drain. After internal voltage stabilize, the GATE, PROG, TIMER, FLT and PG are released and the part begins sourcing current to the GATE pin. The external FET begins to turn on. PG TIMER VOUT Input
- 8. Short Circuit ResponseThe TPS2492/93 responds rapidly to a short circuit. The OUT voltage falls. The limiter action begins The fault timer starts. The internal GATE clamp causes the GATE voltage to follow the output voltage down and subsequently limits the negative V GS . The rapidly rising fault current overdrives the GATE amplifier causing it to overshoot and rapidly turn the external FET off. The FET will be slowly turned back on as the GATE amplifier recovers.
- 9. Gate Capacitor (dV/dt)Control When the VPROG calculates below the 0.4 V minimum, one option is to use dv/dt control to start the uncharged output capacitor. In this way, the power limiting is not used on power up.
- 10. Design Tools DesignCalculator Simply enter application specifications into this spreadsheet calculator to get the values of required external components. Download Evaluation Module TPS2492EVM-001: for positive 12V rails TPS2492EVM-003: for positive 48V rails TPS2493EVM-002: for positive 12V rails TPS2493EVM-004: for positive 48V rails
- 11. Additional Resource Forordering TPS2492/93 Hotswap controllers, please click the part list or Call our sales hotline For more product information go to http://focus.ti.com/docs/prod/folders/print/tps2492.html Visit element14 to post your question www.element-14.com For additional inquires contact our technical service hotline or even use our “Live Technical Chat” online facility Newark Farnell
Editor's Notes
- #2 Welcome to the training module on TPS2492 and 93 – High Voltage Hotswap Controller
- #3 This training module will introduce TPS2492/93 positive high voltage power limiting hotswap controllers.
- #4 Hot swap capability is a feature that has become pervasive in today’s electronic systems. Hot swap is the action of inserting modules or cables into a host system or backplane, without first interrupting power to the system, and without disturbing transactions that may be occurring within the system. Target systems range from small, consumer devices such as laptop peripherals, digital cameras, and PDAs to provider-level and infrastructure-scale equipment. To meet the high-availability and maintainability requirements, hot swap capability has been implemented in these systems for a number of years. Consequently, solutions have evolved over time, from early proprietary, discrete-component implementations, to those based on integrated controller devices designed specifically to address this function.
- #5 The TPS2492 and TPS2493 are easy-to-use, positive high voltage, 14-pin Hotswap Controllers that safely drive an external N-channel FET to control load current. The programmable power foldback protection ensures that the external FET operates inside its safe operating area (SOA) during overload conditions by controlling of power dissipation. The programmable current limit and fault timer ensure the supply, external FET, and load are not harmed by overcurrent. Features include inrush current limiting, controlled load turn-on, interfacing to down-stream DC-to-DC converters, and power feed protection. The analog current monitor output provides a signal ready for sampling with an external A/D converter. Additional features include programmable overvoltage and undervoltage shutdown, power-good for coordinating loads with inrush, and a fault indicator to indicate an over-current shutdown.
- #6 As seen in the figure, the TPS2492/93 features include adjustable undervoltage and overvoltage lockout, turn-on inrush limit, high-side gate drive for an external N-channel FET, adjustable overload timeout, output current monitor, status output, charge-complete indicator for downstream converter sequencing, and optional automatic restart mode.
- #7 Here is typical application circuit for TPS2492/93. The input analog voltage is monitored by R1, R2 and R3. the combinations of input capacitor (C1) and transient voltage suppressor diode (D1) can aid in controlling the voltage overshoot. The over-voltage monitoring pin is programmed with a resistor divider such as R1 - R3. This function forces the GATE and FLT low, while the OV condition exists. SENSE pin monitors the voltage at the drain of M1, and the downstream side of R SENSE providing the constant power limit engine with feedback of both M1 current (I D ) and voltage (V DS ). In conjunction with a resistor divider R4/R5, VREF pin provides a 4.0-V reference voltage to set the voltage on the PROG pin. The reference voltage is available once the internal POR and UVLO thresholds have been met. An integrating capacitor, C T , connected to the TIMER pin sets the fault-time for both versions and the restart interval for the TPS2493.
- #8 Only the bypass capacitor charge current and small bias currents are evident when a board is first plugged in. The TPS2492/93 is held inactive with GATE, PROG, and TIMER held low, and with PG and FLT open drain, for less than 1 ms while internal voltages stabilize. Then GATE, PROG, TIMER, FLT and PG are released and the part begins sourcing current to the GATE pin because UVEN is high and OV is low. The external FET begins to turn on while the voltage across it, V(SENSE-OUT), and current through it, V(VCC-SENSE)/RSENSE, are monitored. Current initially rises to the value which satisfies the power limit engine (PLIM/VVCC) since the output capacitor was discharged. The shape of the input current waveform shows the operation of the FET power limit. In this case, the 5-A current limit is never reached as the output reaches full charge. This is likely due to the limited gate slew rate.
- #9 An output short is applied, causing the voltage to fall, limiter action begin, and the fault timer to start. The external FET current is actively controlled by the power limiting engine and gate amplifier circuit while the TIMER pin charges CT to the 4-V threshold. Once this threshold is reached, the TPS2492/93 turns off the external FET. The TPS2492 latches off until either the input voltage drops below the UVLO threshold or UVEN cycles through the false (low) state. The TPS2493 will attempt a restart after going through a timing cycle.
- #10 The TPS2492/93 can be used with applications that require constant turn-on currents. The current is controlled by a single capacitor from the GATE terminal to ground with a series resistor. M1 appears to operate as a source follower (following the gate voltage) in this implementation. Again assuming that the output capacitor charges without additional loading, choose a time to charge, t ON , based on the load capacitor, C O input voltage V I , and desired charge current I CHARGE . When power limiting is used (VPROG < VREF) choose I CHARGE to be less than P LIM /VV CC to prevent the fault timer from starting. The fault timer starts only if power or current limit is invoked.
- #11 TI provides a series of design tools to help you use the device easily. You can download the design calculator, and simply enter the input voltage, the output current, the output capacitance, and other application specifications into this spreadsheet calculator, the values of the required external components, such as the sense resistance, the Timer capacitance, the power-limiting resistor divider, and the MOSFET parameters, are automatically calculated. TI also provides TPS2492/93 evaluation board to demonstrate how to operate these devices and evaluate their features.
- #12 Thank you for taking the time to view this presentation on “ TPS2492/93 – High Voltage Hotswap Controller” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link right beside the play button on the TechCast portal, or simply call our sales hotline. For more technical information you may either visit the TEXAS INSTRUMENT site, or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility. You may visit element14 e-community to post your questions.