SPICE MODEL of TPC6109-H (Standard+BDS Model) in SPICE PARK

Device Modeling Report

COMPONENTS: Power MOSFET (Model Parameter)
PART NUMBER: TPC6109-H
MANUFACTURER: TOSHIBA
REMARK: P Channel Model
Body Diode (Parameter) / ESD Protection Diode

Bee Technologies Inc.

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

MOSFET MODEL
Pspice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Modility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility


Transconductance Characteristic

Circuit Simulation Result

10

9

8

7

6
gfs

5

4

3

2 Measurement
Simulation
1
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
- ID - Drain Current - A

Comparison table

gfs
-Id(A) Error(%)
Measurement Simulation
0.100 1.275 1.266 -0.706
0.200 1.985 1.887 -4.937
0.500 3.724 3.688 -0.967
1.000 4.762 4.729 -0.693
2.000 5.982 5.821 -2.691


Vgs-Id Characteristic

Circuit Simulation result

-10A

-8A

-6A

-4A

-2A

0A
-1.0V -1.5V -2.0V -2.5V -3.0V -3.5V -4.0V
I(V3)
V_V1

Evaluation circuit

V3

0Vdc

U1 V2
TPC6109-H

-10

V1

-3

0


Comparison Graph


10
Measurement
Simulation

8
- ID - Drain Current - A

6

4

2

0
0.0 2.0 4.0 6.0 8.0 10.0
- VGS - Gate to Source Voltage - V

Simulation Result

-VGS(V)
-ID(A) Error (%)

0.500 2.100 2.123 1.095
1.000 2.250 2.256 0.267
2.000 2.350 2.444 4.000
5.000 2.700 2.831 4.852
10.000 3.200 3.282 2.563


Rds(on) Characteristic


-3.0A

-2.0A

-1.0A

0A
0V -50mV -100mV -150mV -200mV
I(V2)
V_V3

Evaluation circuit

V2

0Vdc

U1 V3
TPC6109-H 0Vdc

V1

-10

0

Simulation Result

ID=-2.5A, VGS=-10V Measurement Simulation Error (%)
R DS (on) (m) 44.000 43.700 -0.682


Gate Charge Characteristic

-12V

-10V

-8V

-6V

-4V

-2V

0V
0 2n 4n 6n 8n 10n 12n 14n 16n
V(W1:4)
Time*1mA

Evaluation circuit

U1

TPC6109-H

W
-
+ I2
D1
W1 Dbreak -5
IOFF = 1mA
I1 TD = 0 ION = 0
TF = 1n ROFF = 1e6
PW = 600u RON = 1.0 V1
PER = 1500u
I1 = 0
I2 = 1m -24
TR = 1n

0

Simulation Result

VDD=-24V,ID=-5A Measurement Simulation Error (%)
,VGS=-10V
Qgs(nC) 1.700 1.697 -0.176
Qgd(nC) 3.600 3.557 -1.194
Qg(nC) 12.800 10.775 -15.820


Capacitance Characteristic

Measurement
Simulation

Simulation Result

Cbd(pF)
VDS(V) Error(%)
0.100 139.000 138.400 -0.417
0.200 130.000 129.800 -0.192
0.500 112.000 112.400 0.357
1.000 958.000 958.500 0.052
2.000 800.000 795.000 -0.625
5.000 600.000 599.000 -0.167
10.000 480.000 475.000 -1.042
20.000 380.000 375.000 -1.316


Switching Time Characteristic


-10V

-5V

0V

1.96us 1.98us 2.00us 2.02us 2.04us 2.06us
V(U1:3) V(U1:1)/1.5
Time

Evaluation circuit

L1 R2

50nH
6

U1
TPC6109-H

-15 V1
L2

V1 = 0 V2 30nH
V2 = -10
TD = 2u R4
TR = 4n
TF = 4n 4.7
PW = 10u
PER = 30u

0

Simulation Result

ID=-2.5A, VDD=-15V
Measurement Simulation Error(%)
VGS=0/10V
Ton(ns) 10.700 10.698 -0.019


Output Characteristic


-10A
-3.5v
-4.0V
V
-6.0V
-8.0V -3.2V
-8A -10.0V

-3.0V
-6A

-2.8V
-4A
-2.6V

-2A -2.4V

VGS=-2.2V

0A
0V -2V -4V -6V -8V -10V
I(V3)
V_V2

Evaluation circuit

V3

0Vdc

U1
TPC6109-H

V2

0
V1

0

0


BODY DIODE SPICE MODEL
Forward Current Characteristic


100A

10A

1.0A

100mA
0V 0.4V 0.8V 1.2V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m

V1
0Vdc

U1 TPC6109-H

0


Comparison Graph


100.00
Measurement
Simulation
Drain reverse current IDR(A)

10.00

1.00

0.10
0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60

Source-Drain voltage VSD(V)

Simulation Result

VDS(V) VDS(V)
IDR(A) Measurement Simulation %Error
0.100 0.660 0.659 -0.227
0.200 0.680 0.681 0.147
0.500 0.720 0.716 -0.611
1.000 0.740 0.747 0.946
2.000 0.790 0.788 -0.316
5.000 0.860 0.863 0.349
10.000 0.950 0.946 -0.453
20.000 1.070 1.071 0.093


Reverse Recovery Characteristic


400mA

200mA

0A

-200mA

-400mA
14.94us 14.98us 15.02us 15.06us 15.10us
I(RL)
Time

Evaluation Circuit

R1

V1 = {-9.5}
50
V2 = {10.6}

TD = 203n
V1
TR = 10n

TF = 10n U1
TPC6108
PW = 15u

PER = 100u

0

Compare Measurement vs. Simulation

Measurement Simulation Error (%)
Trj(ns) 10.000 9.586 -4.140
Trb(ns) 15.600 15.954 2.269
Trr(ns) 25.600 25.540 -0.234


Reverse Recovery Characteristic Reference

Trj=10(ns)
Trb=15.6(ns)
Conditions:Ifwd=lrev=0.2(A),Rl=50

Example

Relation between trj and trb


ESD PROTECTION DIODE SPICE MODEL
Zener Voltage Characteristic

10mA

5mA

0A
0V 5V 10V 15V 20V 25V 30V 35V 40V 45V 50V
I(R1)
V_V1

Evaluation Circuit

U1

R1

0.01m

TPC6109-H R2
1G
V1
0Vdc

0


Zener Voltage Characteristic Reference


SPICE MODEL of TPC6109-H (Standard+BDS Model) in SPICE PARK

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