This document summarizes the PSpice model and simulation results for a Junction Field Effect Transistor (JFET) with part number SST270. It describes the device components and parameters, shows circuit schematics used in simulations, and provides comparison tables and graphs of measurement and simulation results for various device characteristics like transconductance, transfer curves, input and reverse transfer capacitances, and gate leakage currents. Close agreement is shown between measured and simulated device performance.

1. Device Modeling Report
COMPONENTS: Junction Field Effect Transistor (JFET)
PART NUMBER: SST270
MANUFACTURER: Vishay Siliconix
Bee Technologies In.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

2. PSpice model
Model description
parameter
BETA Transconductance coefficient
RD Drain resistance
RS Source resistance
BETATCE Temperature coefficient for BETA
LAMBDA Channel-length modulation
VTO Threshold voltage
VTOTC Temperature coefficient for VTO
CGD Zero-bias gate-drain capacitance
M Junction grading factor
PB Built-in potential
FC Forward-bias coefficient
CGS Zero-bias gate-source capacitance
ISR Recombination current saturation value
NR Recombination current emission coefficient
IS Junction saturation current
N Junction emission coefficient
XTI IS temperature coefficient
ALPHA Impact ionization coefficient
VK Ionization “knee” voltage
KF Flicker noise coefficient
AF Flicker noise exponent
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

3. Transconductance Characteristic
Circuit Simulation Result
Evaluation Circuit
Q1
SST270
-15Vdc V1
0Vdc V2
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

4. Comparison Graph
Circuit Simulation Result
Comparison table
Vgs(V) Error
Id(mA)
Measurement Simulation (%)
0.1 1.6 1.56 2.5
0.2 2.2 2.17 1.363
0.5 3.4 3.26 4.11
1 4.6 4.38 4.782
2 6.2 6.21 0.161
5 8.75 8.53 1.514
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

5. Transfer Curve Characteristic
Circuit Simulation Result
Evaluation Circuit
Q1
SST270
-15Vdc V1
0Vdc V2
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

6. Comparison Graph
Circuit Simulation Result
Comparison table
Vgs(V) Error
Id(A)
Measurement Simulation (%)
-0.016 0.6 0.598 0.33
-0.0085 1.2 1.209 0.75
-0.0035 1.8 1.734 3.66
-0.0001 2.4 2.401 0.041
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

7. Reverse Transfer Capacitance
Circuit Simulation Result
Evaluation Circuit
V1 = 0 V1 V2
V2 = - 20 0Vdc
TD = 0
TR = 10n
TF = 10n
PW = 5u
PER = 10u
Q1
SST270
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

8. Comparison Graph
Circuit Simulation Result
Comparison table
Crss (pF)
VGS (V) Error (%)
Measurement Simulation
8 6 6.015 0.25
12 5 4.94 1.2
16 4 4.2 5
20 3.7 3.81 2.97
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

9. Input Capacitance
Circuit Simulation Result
Evaluation Circuit
V1 = 0 V1
V2 = - 20
TD = 0
TR = 10n
TF = 10n
PW = 5u
PER = 10u V2
Q1
SST270
0Vdc
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

10. Comparison Graph
Circuit Simulation Result
Simulation Result
Ciss (pF)
VGS (V) Error (%)
Measurement Simulation
8 10.2 10.36 1.56
12 8.5 8.53 0.35
16 7.5 7.4 1.33
20 6.5 6.59 1.38
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

11. Passive Gate Leakage
Circuit Simulation Result
Evaluation Circuit
Q1 V2
SST270 0Vdc
V1
0Vdc
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

12. Comparison Graph
Circuit Simulation Result
Simulation Result
Igss (pF)
VDS (V) Error (%)
Measurement Simulation
-5 1 1.029 2.9
-10 1.2 1.255 4.58
-15 1.5 1.47 2
-20 1.8 1.76 2.22
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

13. Active Gate Leakage
Circuit Simulation Result
Evaluation Circuit
Q1
SST270
V1 V2
2.13Vdc 0Vdc
0
VDG=-15V,ID-1mA IG (pA)
Error (%)
(Test Conditions) Measurement Simulation
Gate Operating
10 10.077 0.77
Current(IG)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004