The document provides a detailed modeling report for the junction field-effect transistor (JFET) part number 2N5484, manufactured by Vishay Siliconix. It includes key parameters for the PSPICE model, transconductance characteristics, circuit simulation results, and comparisons of measurement vs simulation data for input and output characteristics. The report also addresses gate leakage measurements and simulation results, emphasizing the statistical errors in the comparisons.

1. Device Modeling Report
COMPONENTS: Junction Field Effect Transistor (JFET)
PART NUMBER: 2N5484
MANUFACTURER: Vishay Siliconix
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

2. PSpice model
Model description
parameter
BETA Transconductance coefficient
RD Drain resistance
RS Source resistance
BETATCE Temperature coefficient for BETA
LAMBDA Channel-length modulation
VTO Threshold voltage
VTOTC Temperature coefficient for VTO
CGD Zero-bias gate-drain capacitance
M Junction grading factor
PB Built-in potential
FC Forward-bias coefficient
CGS Zero-bias gate-source capacitance
ISR Recombination current saturation value
NR Recombination current emission coefficient
IS Junction saturation current
N Junction emission coefficient
XTI IS temperature coefficient
ALPHA Impact ionization coefficient
VK Ionization “knee” voltage
KF Flicker noise coefficient
AF Flicker noise exponent
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

3. Transconductance Characteristic
Measurement
Simulation
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

4. Transfer Curve Characteristic
Circuit Simulation Result
Evaluation Circuit
Q1
2N5484
10Vdc V1
0Vdc V2
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

5. Comparison Graph
Circuit Simulation Result
Simulation Result
VGS (V)
ID (mA) Error (%)
Measurement Simulation
7.2 -0.6 -0.608 1.333
4.3 -1.2 -1.19 -0.833
2.1 -1.8 -1.75 -2.777
0.5 -2.4 -2.4 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

6. Reverse Transfer Capacitance
Circuit Simulation Result
Evaluation Circuit
V1 = 0 V1 V2
V2 = 20 0Vdc
TD = 0
TR = 10n
TF = 10n
PW = 5u
PER = 10u
Q1
2N5484
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

7. Comparison Graph
Circuit Simulation Result
Simulation Result
Crss (pF)
VGS (V) Error(%)
Measurement Simulation
-4 1.05 1.09 3.809
-8 0.95 0.93 -2.105
-12 0.9 0.85 -5.555
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

8. Input Capacitance
Circuit Simulation Result
Evaluation Circuit
V1 = 0 V1
V2 = 20
TD = 0
TR = 10n
TF = 10n
PW = 5u
PER = 10u V2
Q1
2N5484
0Vdc
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

9. Comparison Graph
Circuit Simulation Result
Simulation Result
Ciss (pF)
VGS (V) Error(%)
Measurement Simulation
-4 2 2.02 1
-8 1.7 1.71 0.588
-12 1.53 1.55 1.307
-16 1.42 1.45 2.112
-20 1.35 1.37 1.481
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

10. Passive Gate Leakage
Circuit Simulation Result
Evaluation Circuit
Q1
2N5484 V2
V1
0Vdc
-2Vdc
0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

11. Comparison Graph
Circuit Simulation Result
Simulation Result
Igss (pA)
VDS (V) Error(%)
Measurement Simulation
2 0.9 0.892 -0.888
4 0.95 0.974 2.526
6 1 1.022 2.2
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

12. Active Gate Leakage
Circuit Simulation Result
Evaluation Circuit
Q1 V2
2N5484 0Vdc
V1
0Vdc
0
VDG=10V,ID=1mA IG (pA)
Error(%)
(Test Conditions) Measurement Simulation
Gate Operating
-20 -19.4 -3
Current(IG)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004