SPI PROTOCOL:
 The SPI communication is using master and slave relationship.
 The master is controlling device, while the slave takes the instructions from
the master.
 Single master Single slave and single master multiple slaves.
Clock signal:
 The clock signal is synchronize the output of the data bits from the master to
the sampling the bits by the slave.
 One bit of data transferred is each clock cycle, so the speed of the data
transfer determined by the frequency of clock signal.
 SPI communication always initiate by the master since master configure and
generate the clock signal.
 Any communication protocol where devices share a clock signal is known as a
synchronous.
 The clock signal in SPI can be modified using the properties of clock
polarity and clock phase.
 These two properties work together to define when the bits are output and
when they are sampled.
 Clock polarity can be set by the master to allow for bits to be output and
sampled on either the rising or falling edge of the clock cycle.
 Clock phase can be set for output and sampling to occur on either the first
edge or second edge of the clock cycle, regardless of whether it is rising or
falling.
Slave select:
 the master can choose which slaves it want to talk by setting the ss pin=low
voltage level,
 Idle or non transmitting level SS pin=high.
 We can use multiple slaves using two method parallel and daisy chain
method.
 If it has only one SS pin means will use daisy chain method,
 If it has multiple SS pin means will use parallel method.
MOSI: master sends data to the slave bit by bit , in serial through MOSI line.
Data sent from the master to the slave is usually sent with the most significant bit first.
MISO: The slave can also send data back to the master through the MISO line in serial. The
data sent from the slave back to the master is usually sent with the least significant bit first.
ADVANTAGES:
 No start and No stop bits data can be streamed continuously without
interruption.
 No complicated slave addressing like i2c
 Higher data transfer rate than i2c
 Separate MOSI AND MISO lines, so data can send and receive at the same
time.
DISADVANTAGE:
 Used four wires
 No Acknowledgement that the data has been received successfully.(i2c has
this)
 No error checking like the parity bit in the UART
 Only allows a single master.
UART PROTOCOL:
 Uart is the serial communication device.
 Its perform serial to parallel at the transmitter side and parallel to serial
side at the receiver side.
 In uart serial communication, the data is transmitted asynchrouns there is no
clock signal or timing signal involved in between the sender and transmitter.
 Instead of clock signal uart used some special bits that are called start bits
and stop bits. These bits are added to the actual data packet at the beginning
and end respectively.
 These additional bits are allowing the receiver side uart to identify the actual
data. Parity bit also added to that data packet, it is used to to check the
integrity of the data.
Start Data Parity Stop
1 5-9 0-1 1-2
Start bit:
 Uart transmission line normally held =high voltage level when its not
transmitting data.
 To start the transmitting data, the transmitting uart pulls the transmission
line =high to low for one clock cycle.
 When receiving uart detects the high to low voltage transistion, its begins the
reading the data bits in the date frames at the frequency of the baudrate.
Data frame:
 The data frame contains the actual data being transferred.
 It can be 5 up to 8 parity bits if parity bits used.
 If no parity bits used the data bits upto 9bit long.
 The data is sent with the least significant bit first.
Parity:
 Parity describes the oddness or evenness of a number.
 The parity bit is way for rreceiving uart to tell if data has changed during
transmission.
 Bits can be changed by the electromagnetic radiation, mis match radiation and
long distance data transfer.
 After the receiving UART reads the data frame, it counts the number of bits
with a value of 1 and checks if the total is an even or odd number.
 If the parity bit is a 0 (even parity), the 1 bits in the data frame should total to
an even number.
 If the parity bit is a 1 (odd parity), the 1 bits in the data frame should total to
an odd number.
 When the parity bit matches the data, the UART knows that the transmission
was free of errors.
 But if the parity bit is a 0, and the total is odd; or the parity bit is a 1, and the
total is even, the UART knows that bits in the data frame have changed.
Stop bits:
 To signal the end of the data packet, the sending UART drives the data
transmission line from a low voltage to a high voltage for at least two bit
durations.
ADVANTAGES:
 Only two wires.
 It has parity bits for error checking.
DIADVANTAGE:
 The size of the data frame has limited to a maximum of 9 bits.
 It does not support the multiple masters and multiple slave system.
 The baudrate of each uart must within 10% of each other.

SPI AND UART COMMUNICATION PROTOCOLS

  • 1.
    SPI PROTOCOL:  TheSPI communication is using master and slave relationship.  The master is controlling device, while the slave takes the instructions from the master.  Single master Single slave and single master multiple slaves. Clock signal:  The clock signal is synchronize the output of the data bits from the master to the sampling the bits by the slave.  One bit of data transferred is each clock cycle, so the speed of the data transfer determined by the frequency of clock signal.  SPI communication always initiate by the master since master configure and generate the clock signal.  Any communication protocol where devices share a clock signal is known as a synchronous.  The clock signal in SPI can be modified using the properties of clock polarity and clock phase.  These two properties work together to define when the bits are output and when they are sampled.  Clock polarity can be set by the master to allow for bits to be output and sampled on either the rising or falling edge of the clock cycle.  Clock phase can be set for output and sampling to occur on either the first edge or second edge of the clock cycle, regardless of whether it is rising or falling. Slave select:  the master can choose which slaves it want to talk by setting the ss pin=low voltage level,  Idle or non transmitting level SS pin=high.  We can use multiple slaves using two method parallel and daisy chain method.  If it has only one SS pin means will use daisy chain method,  If it has multiple SS pin means will use parallel method. MOSI: master sends data to the slave bit by bit , in serial through MOSI line. Data sent from the master to the slave is usually sent with the most significant bit first. MISO: The slave can also send data back to the master through the MISO line in serial. The data sent from the slave back to the master is usually sent with the least significant bit first. ADVANTAGES:
  • 2.
     No startand No stop bits data can be streamed continuously without interruption.  No complicated slave addressing like i2c  Higher data transfer rate than i2c  Separate MOSI AND MISO lines, so data can send and receive at the same time. DISADVANTAGE:  Used four wires  No Acknowledgement that the data has been received successfully.(i2c has this)  No error checking like the parity bit in the UART  Only allows a single master. UART PROTOCOL:  Uart is the serial communication device.  Its perform serial to parallel at the transmitter side and parallel to serial side at the receiver side.  In uart serial communication, the data is transmitted asynchrouns there is no clock signal or timing signal involved in between the sender and transmitter.  Instead of clock signal uart used some special bits that are called start bits and stop bits. These bits are added to the actual data packet at the beginning and end respectively.  These additional bits are allowing the receiver side uart to identify the actual data. Parity bit also added to that data packet, it is used to to check the integrity of the data. Start Data Parity Stop 1 5-9 0-1 1-2 Start bit:  Uart transmission line normally held =high voltage level when its not transmitting data.  To start the transmitting data, the transmitting uart pulls the transmission line =high to low for one clock cycle.  When receiving uart detects the high to low voltage transistion, its begins the reading the data bits in the date frames at the frequency of the baudrate.
  • 3.
    Data frame:  Thedata frame contains the actual data being transferred.  It can be 5 up to 8 parity bits if parity bits used.  If no parity bits used the data bits upto 9bit long.  The data is sent with the least significant bit first. Parity:  Parity describes the oddness or evenness of a number.  The parity bit is way for rreceiving uart to tell if data has changed during transmission.  Bits can be changed by the electromagnetic radiation, mis match radiation and long distance data transfer.  After the receiving UART reads the data frame, it counts the number of bits with a value of 1 and checks if the total is an even or odd number.  If the parity bit is a 0 (even parity), the 1 bits in the data frame should total to an even number.  If the parity bit is a 1 (odd parity), the 1 bits in the data frame should total to an odd number.  When the parity bit matches the data, the UART knows that the transmission was free of errors.  But if the parity bit is a 0, and the total is odd; or the parity bit is a 1, and the total is even, the UART knows that bits in the data frame have changed. Stop bits:  To signal the end of the data packet, the sending UART drives the data transmission line from a low voltage to a high voltage for at least two bit durations. ADVANTAGES:  Only two wires.  It has parity bits for error checking. DIADVANTAGE:  The size of the data frame has limited to a maximum of 9 bits.  It does not support the multiple masters and multiple slave system.  The baudrate of each uart must within 10% of each other.