Asia 14-garcia-illera-dude-wtf-in-my-caninjenerzntu
The document discusses vehicle electronic control units (ECUs) and techniques for interacting with a vehicle's CAN bus. It provides details on:
1) The ELM327 interface that is commonly used to communicate with the OBD-II port and protocols like CAN bus.
2) The CHT (CAN Hack Tool) hardware that was created to capture and inject CAN data at various speeds, beyond what the ELM327 supports.
3) How statistical analysis of CAN bus data can help determine common commands like unlocking doors based on identifying frequently transmitted packet IDs and payloads.
Node architecture consists of four main subsystems: sensing, processing, communication, and power. The sensing subsystem converts analog sensor signals to digital with an analog-to-digital converter (ADC). The processing subsystem executes instructions and includes a microcontroller, digital signal processor (DSP), application-specific integrated circuit (ASIC), or field-programmable gate array (FPGA). These processor options provide different balances of flexibility, efficiency, and performance. The communication subsystem interfaces with other nodes to transmit and receive data.
MIPI DevCon 2016: MIPI DisCo and ACPI - Streamlining MIPI Component IntegrationMIPI Alliance
The various MIPI hardware specifications lack support for a uniform software interface by which devices and functions can be discovered and enumerated by the operating system or similar software. The lack of an architected, self-describing hardware mechanism has undesirable consequences for producers and
consumers of mobile appliances. For the producer, it can drive up product cost and complexity, while for the consumer it can impede the availability of innovative products. MIPI Software Working Group Chair Rob Gough describes the forthcoming a standardized device discovery and configuration mechanism (MIPI DisCo) for MIPI specification-based interfaces that can simplify component design and integration in mobile appliances.
"ZYNQ-7000 High Performance Electric Drive and Silicon Carbide Multilevel inverter with Scilab Hardware-in-the-loop"
By Giulio Corradi, Xilinx for ScilabTEC 2015
RTOS based Confidential Area Security Systemajinky gadewar
This document describes an RTOS based security system that uses multiple authentication methods and sensors for access control. The system uses two ARM boards - one with fingerprint, RFID and password authentication and the other with sensors. If authentication matches on the first board, the second board is disabled, otherwise it is enabled along with the sensors. The system provides three-factor security and protects areas by detecting intrusions through various sensors while reducing bandwidth consumption compared to video surveillance.
This document discusses the verification of Intel's Atom processor. It describes the key verification challenges, methodology used, and results. The main challenges were verifying a new microarchitecture with aggressive schedules and limited resources. The methodology involved cluster-level validation, functional coverage, architectural validation, and formal verification. Metrics like coverage, bug rates, and a "health of model" indicator were used. The results showed a successful pre-silicon verification with few escapes and debug/survivability features working as intended. Key learnings included the importance of keeping the full-chip design healthy early and putting equal focus on testability features.
1. Embedded systems are computer systems designed to perform dedicated functions within larger mechanical or electrical systems, with software embedded in the hardware.
2. Hardware and software must be designed together in embedded systems. Key considerations include partitioning tasks between hardware and software, hardware design for low power and real-time needs, and software design for modularity, reusability, and real-time guarantees.
3. Real-time systems, including both soft and hard real-time systems, must guarantee response to external events within specified times to avoid glitches or catastrophic failures. The choice of hardware, software, and real-time operating system depends on these timing requirements.
Open programmable architecture for java enabled network devicesTal Lavian Ph.D.
Supports non-vendor applications
End-user custom application development
Tight interaction between business applications and network devices
Domain experts who understand business goals
Innovative approaches
“Features on Demand”
download software services
dynamically add new capabilities
Asia 14-garcia-illera-dude-wtf-in-my-caninjenerzntu
The document discusses vehicle electronic control units (ECUs) and techniques for interacting with a vehicle's CAN bus. It provides details on:
1) The ELM327 interface that is commonly used to communicate with the OBD-II port and protocols like CAN bus.
2) The CHT (CAN Hack Tool) hardware that was created to capture and inject CAN data at various speeds, beyond what the ELM327 supports.
3) How statistical analysis of CAN bus data can help determine common commands like unlocking doors based on identifying frequently transmitted packet IDs and payloads.
Node architecture consists of four main subsystems: sensing, processing, communication, and power. The sensing subsystem converts analog sensor signals to digital with an analog-to-digital converter (ADC). The processing subsystem executes instructions and includes a microcontroller, digital signal processor (DSP), application-specific integrated circuit (ASIC), or field-programmable gate array (FPGA). These processor options provide different balances of flexibility, efficiency, and performance. The communication subsystem interfaces with other nodes to transmit and receive data.
MIPI DevCon 2016: MIPI DisCo and ACPI - Streamlining MIPI Component IntegrationMIPI Alliance
The various MIPI hardware specifications lack support for a uniform software interface by which devices and functions can be discovered and enumerated by the operating system or similar software. The lack of an architected, self-describing hardware mechanism has undesirable consequences for producers and
consumers of mobile appliances. For the producer, it can drive up product cost and complexity, while for the consumer it can impede the availability of innovative products. MIPI Software Working Group Chair Rob Gough describes the forthcoming a standardized device discovery and configuration mechanism (MIPI DisCo) for MIPI specification-based interfaces that can simplify component design and integration in mobile appliances.
"ZYNQ-7000 High Performance Electric Drive and Silicon Carbide Multilevel inverter with Scilab Hardware-in-the-loop"
By Giulio Corradi, Xilinx for ScilabTEC 2015
RTOS based Confidential Area Security Systemajinky gadewar
This document describes an RTOS based security system that uses multiple authentication methods and sensors for access control. The system uses two ARM boards - one with fingerprint, RFID and password authentication and the other with sensors. If authentication matches on the first board, the second board is disabled, otherwise it is enabled along with the sensors. The system provides three-factor security and protects areas by detecting intrusions through various sensors while reducing bandwidth consumption compared to video surveillance.
This document discusses the verification of Intel's Atom processor. It describes the key verification challenges, methodology used, and results. The main challenges were verifying a new microarchitecture with aggressive schedules and limited resources. The methodology involved cluster-level validation, functional coverage, architectural validation, and formal verification. Metrics like coverage, bug rates, and a "health of model" indicator were used. The results showed a successful pre-silicon verification with few escapes and debug/survivability features working as intended. Key learnings included the importance of keeping the full-chip design healthy early and putting equal focus on testability features.
1. Embedded systems are computer systems designed to perform dedicated functions within larger mechanical or electrical systems, with software embedded in the hardware.
2. Hardware and software must be designed together in embedded systems. Key considerations include partitioning tasks between hardware and software, hardware design for low power and real-time needs, and software design for modularity, reusability, and real-time guarantees.
3. Real-time systems, including both soft and hard real-time systems, must guarantee response to external events within specified times to avoid glitches or catastrophic failures. The choice of hardware, software, and real-time operating system depends on these timing requirements.
Open programmable architecture for java enabled network devicesTal Lavian Ph.D.
Supports non-vendor applications
End-user custom application development
Tight interaction between business applications and network devices
Domain experts who understand business goals
Innovative approaches
“Features on Demand”
download software services
dynamically add new capabilities
Open Programmable Architecture for Java-enabled Network DevicesTal Lavian Ph.D.
Programmable Network Devices
Openly Programmable devices enable new types of intelligence on the network.
Changing the Rules of the Game.
The Web Changed Everything
-Introducing JVM to browsers allowed dynamic loading of Java Applets to end stations
-Introducing JVM to routers allows dynamic loading of Java Oplets to routers
The document discusses National Instruments' CompactRIO system, a reconfigurable input/output system for industrial control applications. It consists of a real-time controller running LabVIEW that can be paired with modular I/O modules. CompactRIO offers benefits like ruggedness, flexibility, and ease of programming compared to traditional PLC or PC-based systems. Specific modules mentioned include analog input, digital I/O, and thermocouple modules. CompactRIO is targeted at applications requiring control, measurement, processing or communication capabilities.
The transformation of the car into a connected mobile device is occurring from the inside out, and is a perfect setting for leveraging the work done in the MIPI Alliance. The intimate (vendor controlled) system interfaces of a smartphone supplier mirror those developing to serve the auto industry. Mixel Inc.'s Ashraf Takla discusses this transformation, and how MIPI Alliance and its member companies are helping to make it happen.
This document discusses embedded systems and provides information on:
- The components of an embedded system including a processor, peripherals, and software.
- Major application areas such as consumer electronics, automation, and networking.
- The embedded system design process including determining requirements, designing architecture, selecting hardware and software, and testing.
- Recent trends in embedded systems including reduced size, cost and power consumption.
Julia - THE FIRST BRAIN COMPUTER FIELDBUS INTERFACE ON THE MARKETNicola Urbano
A universal native Fieldbus Slave born with the goal of being used in every sector (e.g. industrial, building automation, medical, etc).
It collects biomedical signals in a synchronized manner using Ethernet Deterministic Fieldbus.
Embedded with modularity that allows integration of more than one slave at at time whether on the same network or different networks using synchronized protocols such as PTP 1588, TSN, etc.
Offers analysis, control, and diagnostics of a single or multi-user scenarios.
MIPI DevCon 2016: Troubleshooting MIPI M-PHY Link and Protocol IssuesMIPI Alliance
The M-PHY specification is designed to allow mobile devices to have a low power, high performance interface. Several higher level protocols use the M-PHY physical layer for storage, I/O and memory in mobile devices. In this presentation, Gordon Getty of Teledyne LeCroy discusses how higher layer protocols, including UniPro and UFS, use the M-PHY physical layer to provide an efficient, low power storage protocol to be enabled on mobile platforms. It also covers debug and analysis techniques for UFS and UniPro technologies to allow root-cause analysis to be performed in an efficient and effective manner.
The document discusses different types of reusable components in system-on-chip (SoC) design including intellectual property (IP) cores. It describes synthesizable cores as having a high-level description but requiring synthesis and layout, soft cores as having a technology-dependent netlist but layout is required, and firm cores as having an encrypted netlist with layout and size/speed predictability. Hard cores are described as having a fixed, technology-specific layout with determined size and speed but lack portability between foundries. The document notes that hard cores provide benefits of high performance, low power consumption, and predictability for applications like processor cores, memories, and FPGAs.
The presentation discusses FPGAs and their use in automation systems. FPGAs provide benefits like reliability, determinism, parallelism, and reconfigurability. National Instruments offers LabVIEW software and CompactRIO hardware to program FPGAs for applications such as fast control, sensor processing, triggering, and data acquisition. The CompactRIO architecture uses an FPGA for timing-critical tasks and a real-time processor for control, analysis, and communication. LabVIEW provides graphical programming for both.
EFFICIENT POWER MANAGEMENT TECHNIQUES SUCH AS SKIN TEMPERATURE AWARE POWER MANAGEMENT AND BATTERY BOOST FOR IMPROVED ENERGY EFFICIENCY [PERFORMANCE/WATT]
DEVELOPING PERFORMANCE ANALYSIS ENVIRONMENT BY REUSING EXISTING VERIFICATION ENVIRONMENT
HOLISTIC VIEW OF SOC VERIFICATION :
EVOLUTION OF UVM METHDOLOGY, UVM 1.2 AND CHALLENGES WITH MULTI LANGUAGE SUPPORT/AMS SUPPORT.
EDA INDUSTRY/TOOL CHALLENGES WITH HW-SW DEBUG, VP MODEL VERIFICATION.
H/W ASSISTED SIMULATION ACCELERATION, CHOOSING EMULATION CONFIGURATION FOR YOUR DESIGN.
This document provides a summary of Tieng D. Nguyen's experience and qualifications as a Principal Hardware/FPGA Engineer. Over his career, Nguyen has led numerous hardware design projects involving FPGAs, PCB design, signal integrity, and power distribution. Recent experience includes helping to redesign parts of a robotic surgical machine to meet safety standards and improve performance. Nguyen has extensive experience with FPGA design processes, high-speed PCB design, and managing hardware engineering teams.
Trixboxbeta - One stop solution for all your design problemscontroltrix
The document describes TRIXbox, a web-based software tool that provides a one-stop solution for designing power control systems. It allows users to simulate different power converter topologies, control modes, and effects. TRIXbox generates time and frequency domain plots, error checks, and customizable C code for microcontrollers. The tool aims to simplify the complex design process and make control solutions more accessible.
The Microarchitecure Of FPGA Based Soft ProcessorDeepak Tomar
this presentation is on the Paper "The Microarchitecure Of FPGA Based Soft Processor" by Peter Yiannacouras, Jonathan Rose and
J Gregory Steffan
Dept. of Electrical and Computer Engineering
University of Toronto
The document discusses system-on-chip (SOC) architectures and designs. It covers topics like different processor types (e.g. superscalar, VLIW), on-chip storage like caches and memory, interconnects like buses and networks-on-chip, and how SOCs are customized for applications like graphics, media, and security. Examples of SOCs include the iPhone SOC with an ARM processor and AMD's Barcelona multicore processor. The document also discusses design tradeoffs involving time, area, power, and costs as SOCs increase in complexity.
This document discusses four approaches to improving Linux performance in embedded multicore devices: 1) the Linux PREEMPT_RT patch set, which replaces kernel spinlocks with mutexes to improve real-time responsiveness but can reduce throughput; 2) LWRT, which partitions Linux into real-time and non-real-time domains to avoid using the kernel and improves both real-time performance and throughput; 3) the Open Event Machine, which partitions Linux and runs some processes on a non-Linux runtime; and 4) hypervisors or "thin kernels", which add a real-time kernel underneath Linux. The document focuses on explaining LWRT and how it compares to PREEMPT_RT in improving both real
The document provides a history of digital logic and programmable logic devices such as PLDs, CPLDs, and ASICs. It describes the advantages of FPGAs over other technologies including lower costs, faster time to market, and easier design changes. The architecture of FPGAs is explained including logic blocks, interconnects, embedded memory and DSP blocks. Modern SoC FPGAs integrate an ARM processor for improved performance. Applications include automotive, wireless, military, and medical imaging systems.
The document discusses a project to implement a distributed process control system with wireless accessibility. It describes the Process Control Studio software, which allows designing and monitoring industrial processes on a laptop or PDA. The software includes features like alarming, data storage, and a mobile edition. Wireless connectivity is provided via WiFi, and an Ethernet controller allows interfacing with local measurements and controls. The controller performs data acquisition from analog and digital sensors using an ADC and can control actuators with a DAC. It also implements on-off and PID control algorithms using a microcontroller. The goal is to provide localized wireless monitoring and control of industrial processes.
This document discusses real-time and embedded systems. It defines embedded systems as computer systems that perform specific functions and often interact with their environment. Real-time systems are systems where the correctness depends on both the logical results and the time the results are produced. Examples of real-time embedded systems include nuclear reactor control and flight control systems. The document discusses characteristics of real-time systems like being event-driven, having high failure costs, and requiring predictable behavior. It also defines types of real-time systems like hard, soft, and firm real-time systems.
This document discusses System on Chip (SoC) design and related topics. It provides an overview of SoC design, including definitions of SoC, typical architectures, challenges, and applications. It also summarizes System Generator, a tool for designing DSP applications on FPGAs, and DIP Lab software, which is used for image and video processing applications.
Implementation of Soft-core Processor on FPGADeepak Kumar
We can add a soft-core processor to a FPGA-based system after it's already designed. However, adding a hard-core processor requires either a different FPGA, or an additional chip on the board.
Principal Component Analysis For Novelty DetectionJordan McBain
This document summarizes a journal article that proposes using principal component analysis (PCA) for novelty detection in condition monitoring applications. It describes how PCA can be used to reduce the dimensionality of feature spaces while retaining most of the variation in the data. The authors modify the standard PCA technique to maximize the difference between the spread of normal data and the spread of outlier data from the mean of the normal data. They validate the approach on artificial and machinery vibration data and show it can effectively distinguish outliers. Future work could involve extending the technique to non-linear data using kernel methods.
Condition Monitoring of Variable Speed MachineryJordan McBain
This document proposes methods for novelty detection in variable speed machinery. It summarizes that:
1) Monitoring machinery is limited by changes in speed and load, termed "nuisance parameters".
2) A novel method called "multi-modal novelty detection" is proposed to employ intuition from "statistical parameterization" without its limitations by adding modal parameters like speed to feature vectors.
3) An experimental methodology is described involving sensors, data acquisition, and segmentation to generate feature vectors from variable speed tests with simulated faults, and results show standard techniques fail without speed adaptation while multi-modal novelty detection compares well.
Open Programmable Architecture for Java-enabled Network DevicesTal Lavian Ph.D.
Programmable Network Devices
Openly Programmable devices enable new types of intelligence on the network.
Changing the Rules of the Game.
The Web Changed Everything
-Introducing JVM to browsers allowed dynamic loading of Java Applets to end stations
-Introducing JVM to routers allows dynamic loading of Java Oplets to routers
The document discusses National Instruments' CompactRIO system, a reconfigurable input/output system for industrial control applications. It consists of a real-time controller running LabVIEW that can be paired with modular I/O modules. CompactRIO offers benefits like ruggedness, flexibility, and ease of programming compared to traditional PLC or PC-based systems. Specific modules mentioned include analog input, digital I/O, and thermocouple modules. CompactRIO is targeted at applications requiring control, measurement, processing or communication capabilities.
The transformation of the car into a connected mobile device is occurring from the inside out, and is a perfect setting for leveraging the work done in the MIPI Alliance. The intimate (vendor controlled) system interfaces of a smartphone supplier mirror those developing to serve the auto industry. Mixel Inc.'s Ashraf Takla discusses this transformation, and how MIPI Alliance and its member companies are helping to make it happen.
This document discusses embedded systems and provides information on:
- The components of an embedded system including a processor, peripherals, and software.
- Major application areas such as consumer electronics, automation, and networking.
- The embedded system design process including determining requirements, designing architecture, selecting hardware and software, and testing.
- Recent trends in embedded systems including reduced size, cost and power consumption.
Julia - THE FIRST BRAIN COMPUTER FIELDBUS INTERFACE ON THE MARKETNicola Urbano
A universal native Fieldbus Slave born with the goal of being used in every sector (e.g. industrial, building automation, medical, etc).
It collects biomedical signals in a synchronized manner using Ethernet Deterministic Fieldbus.
Embedded with modularity that allows integration of more than one slave at at time whether on the same network or different networks using synchronized protocols such as PTP 1588, TSN, etc.
Offers analysis, control, and diagnostics of a single or multi-user scenarios.
MIPI DevCon 2016: Troubleshooting MIPI M-PHY Link and Protocol IssuesMIPI Alliance
The M-PHY specification is designed to allow mobile devices to have a low power, high performance interface. Several higher level protocols use the M-PHY physical layer for storage, I/O and memory in mobile devices. In this presentation, Gordon Getty of Teledyne LeCroy discusses how higher layer protocols, including UniPro and UFS, use the M-PHY physical layer to provide an efficient, low power storage protocol to be enabled on mobile platforms. It also covers debug and analysis techniques for UFS and UniPro technologies to allow root-cause analysis to be performed in an efficient and effective manner.
The document discusses different types of reusable components in system-on-chip (SoC) design including intellectual property (IP) cores. It describes synthesizable cores as having a high-level description but requiring synthesis and layout, soft cores as having a technology-dependent netlist but layout is required, and firm cores as having an encrypted netlist with layout and size/speed predictability. Hard cores are described as having a fixed, technology-specific layout with determined size and speed but lack portability between foundries. The document notes that hard cores provide benefits of high performance, low power consumption, and predictability for applications like processor cores, memories, and FPGAs.
The presentation discusses FPGAs and their use in automation systems. FPGAs provide benefits like reliability, determinism, parallelism, and reconfigurability. National Instruments offers LabVIEW software and CompactRIO hardware to program FPGAs for applications such as fast control, sensor processing, triggering, and data acquisition. The CompactRIO architecture uses an FPGA for timing-critical tasks and a real-time processor for control, analysis, and communication. LabVIEW provides graphical programming for both.
EFFICIENT POWER MANAGEMENT TECHNIQUES SUCH AS SKIN TEMPERATURE AWARE POWER MANAGEMENT AND BATTERY BOOST FOR IMPROVED ENERGY EFFICIENCY [PERFORMANCE/WATT]
DEVELOPING PERFORMANCE ANALYSIS ENVIRONMENT BY REUSING EXISTING VERIFICATION ENVIRONMENT
HOLISTIC VIEW OF SOC VERIFICATION :
EVOLUTION OF UVM METHDOLOGY, UVM 1.2 AND CHALLENGES WITH MULTI LANGUAGE SUPPORT/AMS SUPPORT.
EDA INDUSTRY/TOOL CHALLENGES WITH HW-SW DEBUG, VP MODEL VERIFICATION.
H/W ASSISTED SIMULATION ACCELERATION, CHOOSING EMULATION CONFIGURATION FOR YOUR DESIGN.
This document provides a summary of Tieng D. Nguyen's experience and qualifications as a Principal Hardware/FPGA Engineer. Over his career, Nguyen has led numerous hardware design projects involving FPGAs, PCB design, signal integrity, and power distribution. Recent experience includes helping to redesign parts of a robotic surgical machine to meet safety standards and improve performance. Nguyen has extensive experience with FPGA design processes, high-speed PCB design, and managing hardware engineering teams.
Trixboxbeta - One stop solution for all your design problemscontroltrix
The document describes TRIXbox, a web-based software tool that provides a one-stop solution for designing power control systems. It allows users to simulate different power converter topologies, control modes, and effects. TRIXbox generates time and frequency domain plots, error checks, and customizable C code for microcontrollers. The tool aims to simplify the complex design process and make control solutions more accessible.
The Microarchitecure Of FPGA Based Soft ProcessorDeepak Tomar
this presentation is on the Paper "The Microarchitecure Of FPGA Based Soft Processor" by Peter Yiannacouras, Jonathan Rose and
J Gregory Steffan
Dept. of Electrical and Computer Engineering
University of Toronto
The document discusses system-on-chip (SOC) architectures and designs. It covers topics like different processor types (e.g. superscalar, VLIW), on-chip storage like caches and memory, interconnects like buses and networks-on-chip, and how SOCs are customized for applications like graphics, media, and security. Examples of SOCs include the iPhone SOC with an ARM processor and AMD's Barcelona multicore processor. The document also discusses design tradeoffs involving time, area, power, and costs as SOCs increase in complexity.
This document discusses four approaches to improving Linux performance in embedded multicore devices: 1) the Linux PREEMPT_RT patch set, which replaces kernel spinlocks with mutexes to improve real-time responsiveness but can reduce throughput; 2) LWRT, which partitions Linux into real-time and non-real-time domains to avoid using the kernel and improves both real-time performance and throughput; 3) the Open Event Machine, which partitions Linux and runs some processes on a non-Linux runtime; and 4) hypervisors or "thin kernels", which add a real-time kernel underneath Linux. The document focuses on explaining LWRT and how it compares to PREEMPT_RT in improving both real
The document provides a history of digital logic and programmable logic devices such as PLDs, CPLDs, and ASICs. It describes the advantages of FPGAs over other technologies including lower costs, faster time to market, and easier design changes. The architecture of FPGAs is explained including logic blocks, interconnects, embedded memory and DSP blocks. Modern SoC FPGAs integrate an ARM processor for improved performance. Applications include automotive, wireless, military, and medical imaging systems.
The document discusses a project to implement a distributed process control system with wireless accessibility. It describes the Process Control Studio software, which allows designing and monitoring industrial processes on a laptop or PDA. The software includes features like alarming, data storage, and a mobile edition. Wireless connectivity is provided via WiFi, and an Ethernet controller allows interfacing with local measurements and controls. The controller performs data acquisition from analog and digital sensors using an ADC and can control actuators with a DAC. It also implements on-off and PID control algorithms using a microcontroller. The goal is to provide localized wireless monitoring and control of industrial processes.
This document discusses real-time and embedded systems. It defines embedded systems as computer systems that perform specific functions and often interact with their environment. Real-time systems are systems where the correctness depends on both the logical results and the time the results are produced. Examples of real-time embedded systems include nuclear reactor control and flight control systems. The document discusses characteristics of real-time systems like being event-driven, having high failure costs, and requiring predictable behavior. It also defines types of real-time systems like hard, soft, and firm real-time systems.
This document discusses System on Chip (SoC) design and related topics. It provides an overview of SoC design, including definitions of SoC, typical architectures, challenges, and applications. It also summarizes System Generator, a tool for designing DSP applications on FPGAs, and DIP Lab software, which is used for image and video processing applications.
Implementation of Soft-core Processor on FPGADeepak Kumar
We can add a soft-core processor to a FPGA-based system after it's already designed. However, adding a hard-core processor requires either a different FPGA, or an additional chip on the board.
Principal Component Analysis For Novelty DetectionJordan McBain
This document summarizes a journal article that proposes using principal component analysis (PCA) for novelty detection in condition monitoring applications. It describes how PCA can be used to reduce the dimensionality of feature spaces while retaining most of the variation in the data. The authors modify the standard PCA technique to maximize the difference between the spread of normal data and the spread of outlier data from the mean of the normal data. They validate the approach on artificial and machinery vibration data and show it can effectively distinguish outliers. Future work could involve extending the technique to non-linear data using kernel methods.
Condition Monitoring of Variable Speed MachineryJordan McBain
This document proposes methods for novelty detection in variable speed machinery. It summarizes that:
1) Monitoring machinery is limited by changes in speed and load, termed "nuisance parameters".
2) A novel method called "multi-modal novelty detection" is proposed to employ intuition from "statistical parameterization" without its limitations by adding modal parameters like speed to feature vectors.
3) An experimental methodology is described involving sensors, data acquisition, and segmentation to generate feature vectors from variable speed tests with simulated faults, and results show standard techniques fail without speed adaptation while multi-modal novelty detection compares well.
Condition Monitoring Of Unsteadily Operating EquipmentJordan McBain
The document discusses techniques for condition monitoring of unsteadily operating equipment. It proposes a statistical parameterization approach involving segmenting vibration data based on steady speeds/loads, extracting statistical parameters from segments, and using novelty detection with support vectors to classify patterns as normal or faulted while accounting for changing operating conditions. Experimental results on gearbox data demonstrated superior fault detection performance compared to alternative approaches.
The document discusses condition monitoring of machinery using artificial intelligence techniques. It presents:
1) Condition monitoring and artificial intelligence can help automate monitoring of steady and unsteady equipment by analyzing variable parameters like loads, speeds and temperatures.
2) The theory of condition monitoring and artificial intelligence is explained, along with experimental work on methodology and results.
3) Monitoring multi-modal machinery requires techniques spanning sensing, segmentation, feature extraction, classification and post-processing to determine machinery health from noisy parameter data.
Condition Monitoring of Variable State MachineryJordan McBain
DataSource
- Channels to monitor signals from various sources
- Queues to store incoming samples
- Registration allows components to subscribe to updates
ProcessingEngine
- Applies signal processing techniques
- Subscribes to DataSource for raw signals
- Processes and returns processed signals
UserInterface
- Allows selection of processing techniques
- Displays processed signals for analysis
- Notifies user of faults or anomalies
The software architecture supports flexible routing of signals from multiple sources to processing techniques. Object-oriented design allows new processing techniques and data sources to be added dynamically. This enables online condition monitoring of variable state machinery using intelligent signal processing.
The document discusses the system design of multiprotocol IoT. It provides an overview of IoT capabilities and architecture, covering multiple protocols at both the application and lower layers. Requirements for IoT "Things" are outlined, such as functional modes, power consumption, and security considerations. Challenges for designing low-power IoT Things are also examined, along with potential solutions.
Internet of things applications covering industrial domainDev Bhattacharya
Internet of things (IOT) applications covering industrial domain was presented at World congress on Industrial Automation on July 22 '15. This presentation provides an overview of IOT and industrial IOT including protocols, system architecture, industrial IOT key differences, industrial IOT system architecture and requirements, architectural components such as operational technology(OT) and informational technology components (IT), Edge processing device hardware and software.
Object oriented design patterns for distributed systemsJordan McBain
This document proposes an object-oriented design pattern for distributed systems using LabVIEW. The pattern involves published variable classes that can be inherited from and instantiated. Published variables are registered with aggregators and broadcast across networks by a broadcastor. Services can subscribe to published variables to update their state based on variable values. The goal is to abstract away networking and communication details while promoting reuse through encapsulation and inheritance. Sample code is provided as a proof of concept, but further work is needed to implement error handling and optimize the networking architecture.
The document discusses maintaining non-stop services through multi-layered monitoring. It recommends monitoring each process, component and application separately as well as collectively to proactively identify and address problems. A multi-layered approach including monitoring services, applications, operating systems and infrastructure helps correlate information and troubleshoot issues. Visual dashboards can aggregate and display monitoring data across these layers to provide a unified view of system health and performance.
The Need for Complex Analytics from Forwarding Pipelines Netronome
Nic Viljoen, Research Engineer, (including Tom Tofigh and Bryan Sullivan form AT&T) presentation from ONS 2016 at Santa Clara Convention Center in Santa Clara, CA.
Smart Manufacturing Requirements forEquipment Capability and ControlKimberly Daich
This document discusses smart manufacturing and how SEMI standards support it. It describes the SEMI Equipment Data Acquisition (EDA) standards which allow equipment to be queried for metadata and process data to be collected. This enables smart factory applications for real-time monitoring, fault detection, analysis, and optimization. The EDA standards also have implications for equipment design like supporting various sensor data sampling and providing built-in control algorithms. The document concludes that the EDA standards directly enable smart manufacturing and equipment suppliers have a key role in implementing them.
1) Embedded systems are computer systems designed to perform dedicated functions within larger mechanical or electrical systems, often with real-time computing constraints.
2) Hardware platforms for embedded systems include microcontrollers optimized for control applications, digital signal processors for data-intensive applications, and programmable hardware or ASICs.
3) System specialization is important for embedded systems, through techniques like application-specific instruction sets, optimized memory architectures, and heterogeneous registers. This improves properties like performance, power efficiency, and predictability.
The document discusses new trends in embedded systems like mobility, cloud connectivity, and improved user interfaces that require operating systems to adapt. It notes the increasing demand for reliability, safety and security. Real-time embedded operating systems like QNX are better suited than general purpose OSes for applications that have strict availability and reliability requirements due to their deterministic scheduling and memory protection. The document outlines how QNX's microkernel architecture isolates applications and drivers to improve fault containment and system uptime.
This document discusses a technology that aims to teach unmanned vehicles to see as humans do. It summarizes the team developing the technology, including their backgrounds and areas of expertise. It then describes the system architecture which includes producer nodes that perform dense 3D reconstruction and tracking in real-time, server nodes that combine mapping data and refine global consistency, and consumer nodes that enable visual localization and situational awareness. The document outlines several applications for the technology and provides examples of the producer nodes' capabilities for tasks like visual odometry, landmark extraction, and dense reconstruction.
When it comes to improving process efficiency for E-Business Suite, customers are often faced with many options: mobile apps, barcoding on various mobile devices, RFID, and so on. This presentation shares CSX and BullsEye’s experience on using mobile technologies to achieve the desired process efficiency improvement, including some less glamorous yet powerful solutions.
CSX will use the following case studies to share its corporate goals for investing in these projects, its process for solution evaluation, the implementation experience, the process efficiency achieved, and lessons learned.
1. Mobile barcode solution at 10 mechanical shops nationwide
2. RFID solution for automated asset tracking at the coal pier
3. Offline-enabled mobile barcode solution for remote work-order equipment trailers
Using CSX and other customer case studies, we will also provide guiding principles and tips on how to select the most appropriate mobile and other hardware devices for optimal efficiency gains while minimizing total cost of ownership.
1. Handheld barcode/RFID scanners
2. Vehicle mounts
3. Ruggedized vs. consumer grade tablets
4. Other less glamorous but powerful options
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Software Architecture For Condition Monitoring Of Mobile Underground
1. Software Architecture for
Condition Monitoring of
Mobile Underground
Mining Machinery
Presented by: Dr. Markus Timusk, P.Eng.
Paper by: Jordan McBain, P.Eng. and Dr. Markus Timusk, P.Eng.
1
3. Overview
• Problem:
• Diversity of automated condition monitoring applications
• Requires a diversity of signal processing and decision-making algorithms
• No singular technique suitable for the broad range of applications
• A software architecture must facilitate this broad problem
• Generalization:
• This problem is a subset of a broader class of computing problems
• Acknowledge this perspective and design for change!
• Intelligent Signal Processing and Analysis
• Scope:
• Design for the broader problem
• Implement for condition monitoring of mobile underground mining 3
equipment
4. Outline
• Introduction
• Reach of Intelligent Signal Processing and Analysis
Applications
• Condition Monitoring of Variable-State Machinery
• Software Design Considerations
• Vision
• Use Cases
• Functionality
• Software/Hardware Implementation
• Proposed Architecture
• Enterprise Level Architectures for CBM in Mines (IREDES)
4
• Conclusion
5. Introduction
• Primary research focus:
• Monitoring Mobile underground mining equipment
• Algorithms and analysis to advance the state of the art for
variable speed/load machinery towards this problem
• Experimental laboratory test bench:
• Gearbox subject to dynamic load/speed
• Predictive maintenance strategies for this environment:
• Fault detection
• Fault identification/diagnosis
• Prognosis
• Sensor failure analysis
• Integration into enterprise computing systems
• The problem can be generalized further 5
• Intelligent Signal Processing and Analysis
7. Condition Monitoring of
Variable-State Machinery
• A first step towards monitoring
mobile underground equipment
• Gearbox components subject to
variable load and speed
• A challenging problem
• Non-linear mechanical response
• Complex vibration spectra
• Limited data availability
• Able to characterize normal
“healthy” state with ease
• Faulted data too difficult/expensive
• Novelty Detection
• Tax’s SVDD preferred 7
8. CBM Variable-
State Machinery
• Research focused on gearboxes
• 50 Hp “speed” motor/VFD
• 25 Hp “load” motor/VFD
• Bearing and gear faults
8
9. CBM Variable-State Machinery
Failing to consider speed or load Multi-modal novelty detection
• Speed considered (fail to consider load)
• Technique: novelty detection (SVDD) • Technique: “multi-modal novelty 9
• Features: auto-regressive (AR) detection” with SVDD
model for features • Features: Average speed and AR
model
10. CBM Variable-State Machinery
System Identification Cross-Correlation
• Technique: normal novelty • Technique: normal novelty
detection (SVDD) detection (SVDD)
• Features: system identification • Features: parameters of cross-
parameters correlation signal from
• (input shaft speed and load as accelerometers on disparate
inputs to system model and locations of machine
vibration as output) • Advantage:
• Advantage: • Feature vectors insensitive to
• Feature vectors from transfer time-varying parameters
function insensitive to time- • Efficient
varying parameters • No speed/load sensors required
• No double curse of dimensionality • No double curse of dimensionality
• Generalizes well across untrained • Generalizes well across untrained
speed/load speed/load 10
• Disadvantage: • Disadvantage:
• Computationally inefficient • ?
• Measure load and speed
12. Software Design: Vision
• Intelligent signal processing
• Takes multitude of real-world signals
• Processes
• Segments
• Extracts relevant information
• Classifies
• Dynamic routing of signals through each stage
• At run time
• As configured by expert at setup
• Pattern recognition problem (next slide)
12
14. Software Design: Use Cases
• Range of solutions
• A reflection of the market for various cost-benefit analyses
• Design suitable for broad range
• Dedicated in-situ online monitoring
• Periodic monitoring
• One monitoring computer transported from application to
application
• Environments
• Underground
• Caustic
• Bandwidth limited
• Limited network connectivity
• Remote monitoring
14
• Pipeline compressor stations?
15. Software Design: Functionality
• Software interface
• Remote networked
• Complete configuration of all algorithms and their interconnections
• Wide range of algorithms
• Signal processing
• Decision
• Pattern recognition
• Novelty Detection
• Classification
• Expert systems
• Post-processing options
• Sensor failure analysis
• Prognostics
• Diagnostics 15
• Alarm reporting, storage, integration with other systems
16. Software Design:
Hardware/Software
• Generic software designs preferred with no minimal
implementation language bias
• Idealized but unrealistic
• Object-oriented programming (OOP)
• Initial prototype developed in MatLAB OOP
• Final implementation in National Instruments’ (NI) LabVIEW
• NI hardware ideal for mobile underground mining environment
• Architecture demonstrated to be effective in MatLAB OOP
• Research results generated with this system
16
17. Proposed Architecture
• Extensible Intelligent Signal Processing
• At run time not just design time!
• Software design patterns advanced
• Design for broader problem but implement for CBM
• Challenge #1: Data comes from a variety of locations (e.g. networked
sensors, historians, live sensors, disk)
• Solution: Define a DataSource module that will be common for all
types of sources
• Handlers don’t need to know the actual source just how to ask for data
• Challenge #2: Need to dynamically route signals from DataSources
• Solution: Define a “Multiple User Samples Queue” to allow handlers
to register for data and to retrieve that data at later times with a
registration token received at registration time 17
18. Proposed Architecture
• Challenge #3: Handle different signal processing techniques in a
common way
• Solution: Define a SignalConditionStrategy to allow the handler to
pass signals through any of a variety of different strategies but with a
common interface
• Different types of algorithms for feature vector generation is a type of
this problem
• Filtering a noisy signal is a different example
• Generating features is a kind of signal conditioning
• Challenge #4: Handle different signal segmentation techniques in a
common way
• Solution: Define a SegmentationStrategy module to define a
common way of handling signals segmented with varying techniques
• Monitoring variable speed machinery: expert prefers segments based on 18
constant number of shaft rotations rather than samples
19. Proposed Architecture
• Challenge #5: Dynamic run-time signal routing
• The user should be capable of selecting which data sources get
routed through any of a variety of signal conditioning strategies
that are in turn segmented and fed through analysis techniques
• Solution: create a SignalConditioner module that creates a
hierarchy of DataSources and SignalConditioningStrategies
• Challenge #6: Support a variety of algorithms for decision-
making purposes
• Pattern recognition, experts systems, etc.
• Solution: define a IntelligentAnalyzerStrategy module that allows
the handler to route signals (i.e. feature vectors) through a
number of user-selectable algorithms
19
20. Enterprise Level Architectures
for CBM in Mines
• Proposed architecture handles low-level processing of data for
intelligent signal processing and analysis
• Many applications of this broad class of problem could add
significant value through integration at the enterprise level
• Particularly true for condition monitoring in mines
• Integration at the enterprise level could augment
• Operations planning
• Maintenance decisions
• Spare parts inventories
• This process is too often done in silos!
• A common standard for integration required
• International Rock Excavation Data Exchange Standard (IREDES) 20
21. IREDES
• XML-based communication schema
• Designed to make data exchanges generated by common
classes of mining machinery the same
• Enables transmission of real-time data
• Portion of standard for CBM undefined at present
• Consider Open Systems Architecture for Condition-Based
Maintenance
• Fulfillment of ISO 13374
• Lead by Boeing, US Navy, Rockwell Automation, Caterpillar
• Extensive UML model of high-level integration considerations
• Ideal for IREDES?
21
22. Conclusion
• CBM for mobile underground mining equipment a challenge
• Automated fault detection of variable speed/load machinery a
first step
• Sound techniques developed that minimize classification error and
should lead to early detection times
• Extension to true mobile underground equipment
• Consider diagnosis and prognosis
• Low-level data processing achieved with robust software
architecture
• Implemented for CBM but designed for broader analysis problem
• Integration of low-level system achievable with OSA-CBM
• Mining can exploit these benefits via IREDES augmentation
22