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Pankaj Singh

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Universal Chip interconnect Verification
An Approach to Overcome Modeling Inaccuracies for Performance Simulation Signoff of High-Speed SerDes
Unified methodology for effective correlation of soc power
Overcoming challenges of_verifying complex mixed signal designs
Qualifying a high performance memory subsysten for Functional Safety
Safety Verification and Software aspects of Automotive SoC
Managing securityforautomotivesoc
Panel:The secret of Indian leadership in Electronic Design skill... From Design to Services to Embedded Software
OVERCOMING KEY CHALLENGES OF TODAY'S COMPLEX SOC: PERFORMANCE OPTIMIZATION AND VERIFICATION QUALITY
AMD_11th_Intl_SoC_Conf_UCI_Irvine
Power Optimization with Efficient Test Logic Partitioning for Full Chip Design
FUSION APU & TRENDS/ CHALLENGES IN FUTURE SoC DESIGN