Peraso X710 Chipset 60GHz Outdoor Wireless Broadband Solution

©2018 by System Plus Consulting | Peraso X710 Chipset 1
22 Bd Benoni Goullin
44200 NANTES - FRANCE +33 2 40 18 09 16 info@systemplus.fr www.systemplus.fr
Peraso X710 Chipset
60 GHz Outdoor Wireless Broadband Solution
RF report by Stéphane ELISABETH
August 2018 – sample
REVERSE COSTING® – STRUCTURAL, PROCESS & COST REPORT

Table of Contents
Overview / Introduction 4
o Executive Summary
o Reverse Costing Methodology
Company Profile 8
o Company Profile – Peraso technologies
o WiFi History & Evolution
o WiFi Challenges – Residential & Infrastructure
o Peraso PortFolio
o IgniteNet ML-60-LW Teardown
Market Analysis 26
o mmWave Certification protocol
o mmWave Communication Penetration rate
o Wireless Infrastructure Wafer Count
o Infrastructure Process Technology Forecast
Physical Analysis 31
o Summary of the Physical Analysis 32
o Board Assembly 34
 Board Views, Marking & Dimensions
 Board Dissassembly & Cross-Section
o Baseband IC 41
 Package Views & Dimensions
 Package Opening & Cross-Section
 Die View & Dimensions
 Die Delayering & main Blocs
 Die Process & Cross-Section:
Substrate, Metal layers, CMOS Transistors, Memory
 Die Process Characteristic
o RFIC 58
 Package Views & Dimensions
 Package Overview, Opening & Cross-Section
 Die View, Marking & Dimensions
 Die Overview:
Tx/Rx Area, VCO, Power Amplifier, Tx/Rx Mixer, Tx/Rx Channel, Wilkinson, LNA & ADC
 Die Delayering & main Blocs
 Die Process & Cross-Section:
Substrate, Metal Layers, CMOS, FET & SiGe HBT Transistors
 Die Process Characteristic
o Antenna Board 95
 Board Views & Dimensions
 Board Overview: Antenna Patch
 Board Deprocessing: Via, Embedded Microstrip
 Board Cross-Section: Substrate, Ground Planes, Dimensions
 Board Process Characteristic
Physicla Comparison 112
o Peraso Chipset packaging – Baseband IC vs. RFIC
o Peraso vs. Qualcomm – Baseband IC, RFIC, Antennae
o Backhaul vs. Router vs. Smartphone – Chipset, Formfactor
Manufacturing Process 119
o Baseband IC & RFIC Front-End Process & Fabrication Unit
o Packaging Process & Fabrication unit
Cost Analysis 128
o Summary of the cost analysis 129
o Yields Explanation & Hypotheses 131
o Baseband IC & RFIC 133
 Die Front-End Cost
 Die Probe Test, Thinning & Dicing
 Wafer & Die Cost
 Packaging Cost
 Component Cost
o Chipset Cost estimation 141
Selling price 142
Feedbacks 145
SystemPlus Consulting services 147

Overview / Introduction
o Executive Summary
o Reverse Costing Methodology
o Glossary
Company Profile & Supply Chain
Market Analysis
Physical Analysis
Physical Comparison
Manufacturing Process Flow
Cost Analysis
Selling Price Analysis
Feedbacks
About System Plus
Executive Summary
Even though millimeter-wave (mmWave) technology has become better defined this year, several questions remain
unanswered. How will the technology be implemented? Which manufacturing technology will be used? Will it be used in
cellphone handsets? Which companies will prevail in the market? Today, the only glimpse of what could be done in the near
future is the WiGig application, which spans handsets, routers and backhaul products. Qualcomm is already in prime position
in radio-frequency (RF) CMOS technology in handset applications. But for backhaul, where the power and performance
requirements are higher, there’s room for other technologies and competitors. Peraso Technologies is one that is already well
positioned, with several design wins for its X710 chipset.
Peraso Technologies’ three product series target consumer, industrial and augmented and virtual reality (AR/VR) applications.
The X series chipset for outdoor wireless broadband solutions is composed of two separate components, a baseband
integrated circuit (IC) and an RFIC. Integrated into the IgniteNet ML-690-LW device, the solution features also a ceramic
substrate-based phase array antenna. Soldered on the same board as 32 antennae, the all-60GHz solution takes up only 5% of
the device volume.
Based on STMicroelectronics’ silicon germanium (SiGe) technology, the RFIC features up to eight transceivers controlling 32
patch antennas for beamforming at 60GHz. Packaging and integration has been optimized to maintain RFIC performance.
Featuring exposed die packaging, the component is directly in contact with thermal paste to dissipate heat. Also, to increase
the reactivity of the system, the baseband processor is soldered right next to the RFIC.
This report includes a full investigation of the system, featuring a detailed study of the baseband processor, the RFIC and the
antenna board including die analyses, processes and board cross-sections. We focus on the RFIC block diagram and the
antenna board routing view and dimensions. The report contains a complete cost analysis and a selling price estimation of the
chipset. Finally, it features an exhaustive comparison with the Qualcomm chipset for router and handset applications.

o Peraso Technologies
o WiFi History
o WiFi Challenges
o Peraso PortFolio
o Ignite ML-60-LW Teardown
Market Analysis
Physical Analysis
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
IgniteNet ML-60-LW Teardown

Market Analysis
o mmWave Cerification
o mmWave Penetration Rate
o Market Forecast
Physical Analysis
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Wireless Infrastructure Wafer Count

Market Analysis
Physical Analysis
o Summary
o Main Board Assembly
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
 Board Deprocessing
 Board Cross-Section
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Summary of the Physical Analysis

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Board View & Dimensions

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Board Disassembly

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Board Cross-Section

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Baseband IC – Package Cross-Section

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Baseband IC – Package Cross-Section
Underfill
Solder mask
Layer #1
Layer #2
Layer #3
Layer #4
Solder mask
Dielectric Layer #1
Core
Dielectric Layer #2
Package Cross-Section – SEM View
©2018 by System Plus Consulting
• Dielectric Thickness:
• Layer #1 : xxx µm
• Core: xxx µm
• Layer #2 : xxx µm
• Solder Mask : xxx µm
• Copper Line Thickness:
• Line #4 : xxx µm
• Measured Line/Space Width
in Cross-Section:
xxx µm / xxx µm
• The PCB substrate is
manufactured with the
layer #3 as dielectric core.

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Baseband IC – Die View & Dimensions
xxxx mm
xxxmm
Die Overview – Optical View
• Die area: xxxx mm2
(xxxx x xxx mm)
• Nb of PGDW per 12-inch wafer: xxxxx
• Pad Number: xxxx

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
RFIC – Package Opening

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
RFIC – Package Cross-Section

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
RFIC – Die Overview – VCO
• The VCO supply the Tx and the Rx blocks with high frequency signal.

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
RFIC – Die Process – HBT Transistors
Die Overview – SEM View
Die Process – Bipolar Transistors – SEM View
Emitter
CollectorCollector
Base
Trench Isolation Poly #2
Poly #1
Oxide Spacer
xxxx µm
xxxx µm
xxx µm

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Antenna Board – Board View & Dimensions

Market Analysis
Physical Analysis
o Summary
o Baseband IC
 Package
 Die Views
 Die Process
o RFIC
 Package
 Die Views
 Block Overview
 Die Process
o Antenna Board
 Board View
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
Antenna Board – Antenna Deprocessing
Board Top View – Optical View
Layer #3
Ground Plane
Hole (Øxxxxx mm)

Market Analysis
Physical Analysis
Physical Comparison
o Peraso Chipset Packaging
o Peraso vs. Qualcomm
o Backhaul vs. Router vs. Handset
Cost Analysis
Feedbacks
About System Plus
Backhaul vs. Router vs. Smartphone – Chipset
ZenFone 4 ProTalon AD7200ML-60-LW
Antenna Board
Antenna Board
RFIC
Baseband
Processor
RFIC
Baseband
Processor
Baseband Processor Board
Smartphone Main Board
Antenna SiP

Market Analysis
Physical Analysis
Physical Comparison
o Summary
o Baseband IC Front-End
o Baseband IC Fabrication Unit
o RFIC Front-End Process
o RFIC Fabrication Unit
o Packaging Process Flow
o Packaging Fabrication Unit
Cost Analysis
Feedbacks
About System Plus
Exposed Die FCBGA Packaging Process Flow
Panel PCB
Substrate
•Panel PCB Substrate
Panel PCB
Substrate
•NCF deposition
•Thermo Compression
Panel PCB
Substrate
•Cavity Thermo Compression
Molding
Panel PCB
Substrate
•Solder Ball Dropping
•Dicing

Market Analysis
Physical Analysis
Physical Comparison
Cost Analysis
o Summary
o Yields Hypothesis
o Baseband IC FE Cost
o Baseband IC Wafer & Die Cost
o Packaging & Component Cost
o RFIC Front-End Cost
o RFIC Wafer & Die Cost
o Chipset Cost Estimation
Feedbacks
About System Plus
Baseband Processor Front-End Cost
The front-end cost for the Baseband Processor Die ranges from $xxxx to $xxxx
according to yield variations.
The largest portion of the manufacturing cost is due to the Consumable at xxx%.
We estimate a gross margin of xxxx% for TSMC, which result in a Front-End price
ranging from $xxxx to $xxxxx. This corresponds to the selling price to Peraso.

Market Analysis
Physical Analysis
Physical Comparison
Cost Analysis
o Summary
o Yields Hypothesis
Feedbacks
About System Plus
RFIC Packaging Cost
The Packaging cost for the RFIC ranges from $xxxx to $xxxx per components
according to yield variations.
The largest portion of the manufacturing cost is due to the PCB substrate at xxx%.
We estimate a gross margin of xxxx% for xxxx, which result in a package price
ranging from $xxxx to $xxxx.

Market Analysis
Physical Analysis
Physical Comparison
Cost Analysis
o Summary
o Yields Hypothesis
Feedbacks
About System Plus
Chipset Component Cost
By adding the Antenna Substrate, the Chipset Component cost
ranges from $xxxx to $xxx according to yield variations.
o The Baseband processor Component represent xxxx% of the
component cost.
o The RFIC Component represent xxxx% of the component cost.
o The Antenna Substrate represent xxx% of the component cost.

Market Analysis
Physical Analysis
Physical Comparison
Cost Analysis
o Definition of Prices
o Estimated Selling Price
Feedbacks
About System Plus
Estimated Manufacturer Price
Estimated Financial ratios of Peraso:
60.0% for Cost Of Sales (40% gross margin)
10.0% for G&A
15.0% for R&D
15.0% for Operating income
We estimate that Peraso realizes a gross
margin of 40% on the module, which results in
a final component price ranging from $xxx to
$xxxx.
This corresponds to the selling price for large
volume to OEMs.

Market Analysis
Physical Analysis
Physical Comparison
Cost Analysis
Feedbacks
About System Plus
o Company services
o Related reports
o Contact
o Legal
REVERSE COSTING ANALYSES - SYSTEM PLUS CONSULTING
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