This whitepaper describes practical considerations and best practices for Mobile Imaging and Display for Smartphone and Tablet Computing applications as well as exploring Silicon IP selection and successful adoption based on Arasan’s experience with customer engagements.
BULK BINDING UPDATE PROCEDURE FOR PMIPV6 BASED INTELLIGENT TRANSPORTATION SYS...cscpconf
Intelligent transportation system (ITS) consists of moving networks, where the network mobility
(NEMO) basic support is adopted as a mobility management protocol for moving networks.
Even though NEMO basic support (NBS) provides a basic mobility support for ITS systems, the
mobile routers (MR) need to participate in the mobility signaling. In the literature, network
based mobility management such as Proxy Mobile IPv6 (PMIPv6) based solutions are explored
for mobility management. However, the signaling overhead incurred due to this approach is still
need to be optimized. In this paper, we introduce a bulk binding update solution for the
registration of MR with local mobility anchor (LMA) in moving networks. The bulk binding
update procedure uses a group identifier for group of MRs during the periodic binding update
process which reduces the signaling overhead compared with the basic PMIPv6 based
approach. The numerical results demonstrate that the proposed approach gives a better
performance in terms of signaling overhead and handover latency than NBS, and simplePIMPv6 based solutions.
Analytical Execution of Dynamic Routing Protocols For Video Conferencing Appl...theijes
In modern network communications, Routing protocols are getting an important function for the user data path that are responsible for controlling the routers to communicate together and forward packets by routers over the best trip path from a base node to a destination one. Dynamic routing protocols represented by RIP, OSPF and EIGRP are explained here for addressing various networks with different traffic environments. In this paper, the performance of these protocols are estimating with many factors like convergence activity and duration, average throughput, network end-to-end delay, Point-to-Point Utilization over the simulation based on OPNET academic version. From Simulation results, EIGRP have a fastest time convergence compared with other topologies of networks are confirmed and the OSPF has the highest Point-to-Point Utilization in the network followed by EIGRP then RIP. So, there is an attempt for finding out which protocols are suitable for the networks and from analyses to understand the role of the routing protocols in different network scenarios
Performance analysis of gesture controlled robotic careSAT Journals
Abstract
“ROBOT” is any automatically operated machine or a device that reduces human effort, though it may not look much like a
human being or function in a humanlike manner. Advanced, high-performance robots are used today in automobile
manufacturing and aircraft assembly, and electronics firms use robotic devices together with other computerized instruments to
sort or test finished products. Due to the demand of intelligent systems in every field of technology, automated systems are
preferred much for the betterment of the society.The main objective of designing this robo car is to make the world work with
more comfort and more easier way with the way they use today ,as in the recent era there were too many research in the field of
robotics and communication has happened ,so we tried to focus both robotics as by designing a small robocar and controlling
over RF frequency wirelessly for communication as the ease of access is our main priority we tried to focus also the comfort
ability and design a gesture based robotic car. This car not only detects the motion of a human hand but also reacts according to
the gesture, the main purpose of the bot is to make the world work with more ease or where the work of precision or accuracy is
needed it can also be used for the spying and for the field observation or in the industries where the work precision is made with
the use of human hand but it’s not comfortable due to hazardous object, we can have example of industries where furnace
temperature or a pressure is controlled through the accuracy of a knob controlled with human hand but working beside the boiler
or a furnace is always a risk task hence it is not possible so can be operated through gesture at a distance and operated can
operate knob by simply sitting in the cabin and through gesture of the handjust like virtually adjusting the knob or the control of
the robotic car.
Keywords: Gesture Based Robotic Car, Robotic Car, Robocar,
BULK BINDING UPDATE PROCEDURE FOR PMIPV6 BASED INTELLIGENT TRANSPORTATION SYS...cscpconf
Intelligent transportation system (ITS) consists of moving networks, where the network mobility
(NEMO) basic support is adopted as a mobility management protocol for moving networks.
Even though NEMO basic support (NBS) provides a basic mobility support for ITS systems, the
mobile routers (MR) need to participate in the mobility signaling. In the literature, network
based mobility management such as Proxy Mobile IPv6 (PMIPv6) based solutions are explored
for mobility management. However, the signaling overhead incurred due to this approach is still
need to be optimized. In this paper, we introduce a bulk binding update solution for the
registration of MR with local mobility anchor (LMA) in moving networks. The bulk binding
update procedure uses a group identifier for group of MRs during the periodic binding update
process which reduces the signaling overhead compared with the basic PMIPv6 based
approach. The numerical results demonstrate that the proposed approach gives a better
performance in terms of signaling overhead and handover latency than NBS, and simplePIMPv6 based solutions.
Analytical Execution of Dynamic Routing Protocols For Video Conferencing Appl...theijes
In modern network communications, Routing protocols are getting an important function for the user data path that are responsible for controlling the routers to communicate together and forward packets by routers over the best trip path from a base node to a destination one. Dynamic routing protocols represented by RIP, OSPF and EIGRP are explained here for addressing various networks with different traffic environments. In this paper, the performance of these protocols are estimating with many factors like convergence activity and duration, average throughput, network end-to-end delay, Point-to-Point Utilization over the simulation based on OPNET academic version. From Simulation results, EIGRP have a fastest time convergence compared with other topologies of networks are confirmed and the OSPF has the highest Point-to-Point Utilization in the network followed by EIGRP then RIP. So, there is an attempt for finding out which protocols are suitable for the networks and from analyses to understand the role of the routing protocols in different network scenarios
Performance analysis of gesture controlled robotic careSAT Journals
Abstract
“ROBOT” is any automatically operated machine or a device that reduces human effort, though it may not look much like a
human being or function in a humanlike manner. Advanced, high-performance robots are used today in automobile
manufacturing and aircraft assembly, and electronics firms use robotic devices together with other computerized instruments to
sort or test finished products. Due to the demand of intelligent systems in every field of technology, automated systems are
preferred much for the betterment of the society.The main objective of designing this robo car is to make the world work with
more comfort and more easier way with the way they use today ,as in the recent era there were too many research in the field of
robotics and communication has happened ,so we tried to focus both robotics as by designing a small robocar and controlling
over RF frequency wirelessly for communication as the ease of access is our main priority we tried to focus also the comfort
ability and design a gesture based robotic car. This car not only detects the motion of a human hand but also reacts according to
the gesture, the main purpose of the bot is to make the world work with more ease or where the work of precision or accuracy is
needed it can also be used for the spying and for the field observation or in the industries where the work precision is made with
the use of human hand but it’s not comfortable due to hazardous object, we can have example of industries where furnace
temperature or a pressure is controlled through the accuracy of a knob controlled with human hand but working beside the boiler
or a furnace is always a risk task hence it is not possible so can be operated through gesture at a distance and operated can
operate knob by simply sitting in the cabin and through gesture of the handjust like virtually adjusting the knob or the control of
the robotic car.
Keywords: Gesture Based Robotic Car, Robotic Car, Robocar,
High speed down link packet access (hsdpa)WritingHubUK
The title for the report is High Speed Downlink Packet Access (HSDPA). Internet is become apart of our every day life and mobile users demand for high speed access while they are on the move. HSDPA can fulfil these demands and offer more services which are broadband related. The report will analyse and evaluate the HSDPA technology, which include the architecture, protocols and protocol status. Also the report discuss HSDPA principle operation and the physical and MAC layer.
Implementation of I2C Master Bus Protocol on FPGAIJERA Editor
The focus of this paper is on I2C (Inter-Integrated Circuit) protocol interface between Master Bus protocol and
slave. Here we are interfacing between micro-controller and DS1307. I2C bus protocol sends 8 bit data from
micro-controller to DS1307. This module was designed in VHDL and simulated and synthesized using Xilinx
ISE Design Suite 14.2. I2C and optimized for area and power. This concept is widely applicable from any high
speed device or low speed device to any low speed device or high speed device. This module acts as a slave for
the DS1307 at the same time acts like a master for the micro-controller device which can be considered as a
slave. . It can be used to interface low speed peripherals like motherboard, embedded system, mobile phones,
set top boxes, DVD, PDA’s or other electronic devices.
RPL routing protocol performance under sinkhole and selective forwarding atta...TELKOMNIKA JOURNAL
To make possible dream of connecting 30 billion smart devices assessable
from anywhere, anytime and to fuel the engine growth of internet of things
(IoT) both in terms of physical and virtual things, internet engineering task
force (IETF) came up with a concept of 6LoWPAN possessing
characteristics like low power, bandwidth and cost. To bridge the routing
gap and to collaborate between low power private area network and
the outside world, IETF ROLL group proposed IPv6 based lightweight
standard RPL (routing protocol for low power and lossy networks). Due to
large chunks of random data generated on daily basis security either
externally or internally always remain bigger threat which may lead to
devastation and eventually degrades the quality of service parameters
affecting network resources. This paper evaluates and compare the effect
of internal attacks like sinkhole and selective forwarding attacks on routing
protocol for low power and lossy network topology. Widely known IoT
operating system Contiki and Cooja as the simulator are used to analyse
different consequences on low power and lossy network.
This Internship was offered by National Telecommunication Corporation (NTC), Islamabad where I performed practical hand work in the department of Switching, Transmission and Data Communication.
This report was submitted in partial fulfillment of requirement of Bachelor degree in Computer Science & Engineering in Veer Surendra Sai University of Technology, Burla, Odisha, India.
LTE Location Management and Mobility Managementaliirfan04
Provides an overview of power management (connected and idle mode) and mobility management (both idle-mode mobility (cell selection and re-selection) and active mode (handovers).
In this whitepaper, I will briefly review our mixed signal design methodology using our UFS products as a reference. This is a comprehensive suite that combines the digital UFS host and device controllers, the UniProSM interface technology, the MIPI M-PHY mixed signal I/O, software driver, and hardware validation platforms.
High speed down link packet access (hsdpa)WritingHubUK
The title for the report is High Speed Downlink Packet Access (HSDPA). Internet is become apart of our every day life and mobile users demand for high speed access while they are on the move. HSDPA can fulfil these demands and offer more services which are broadband related. The report will analyse and evaluate the HSDPA technology, which include the architecture, protocols and protocol status. Also the report discuss HSDPA principle operation and the physical and MAC layer.
Implementation of I2C Master Bus Protocol on FPGAIJERA Editor
The focus of this paper is on I2C (Inter-Integrated Circuit) protocol interface between Master Bus protocol and
slave. Here we are interfacing between micro-controller and DS1307. I2C bus protocol sends 8 bit data from
micro-controller to DS1307. This module was designed in VHDL and simulated and synthesized using Xilinx
ISE Design Suite 14.2. I2C and optimized for area and power. This concept is widely applicable from any high
speed device or low speed device to any low speed device or high speed device. This module acts as a slave for
the DS1307 at the same time acts like a master for the micro-controller device which can be considered as a
slave. . It can be used to interface low speed peripherals like motherboard, embedded system, mobile phones,
set top boxes, DVD, PDA’s or other electronic devices.
RPL routing protocol performance under sinkhole and selective forwarding atta...TELKOMNIKA JOURNAL
To make possible dream of connecting 30 billion smart devices assessable
from anywhere, anytime and to fuel the engine growth of internet of things
(IoT) both in terms of physical and virtual things, internet engineering task
force (IETF) came up with a concept of 6LoWPAN possessing
characteristics like low power, bandwidth and cost. To bridge the routing
gap and to collaborate between low power private area network and
the outside world, IETF ROLL group proposed IPv6 based lightweight
standard RPL (routing protocol for low power and lossy networks). Due to
large chunks of random data generated on daily basis security either
externally or internally always remain bigger threat which may lead to
devastation and eventually degrades the quality of service parameters
affecting network resources. This paper evaluates and compare the effect
of internal attacks like sinkhole and selective forwarding attacks on routing
protocol for low power and lossy network topology. Widely known IoT
operating system Contiki and Cooja as the simulator are used to analyse
different consequences on low power and lossy network.
This Internship was offered by National Telecommunication Corporation (NTC), Islamabad where I performed practical hand work in the department of Switching, Transmission and Data Communication.
This report was submitted in partial fulfillment of requirement of Bachelor degree in Computer Science & Engineering in Veer Surendra Sai University of Technology, Burla, Odisha, India.
LTE Location Management and Mobility Managementaliirfan04
Provides an overview of power management (connected and idle mode) and mobility management (both idle-mode mobility (cell selection and re-selection) and active mode (handovers).
In this whitepaper, I will briefly review our mixed signal design methodology using our UFS products as a reference. This is a comprehensive suite that combines the digital UFS host and device controllers, the UniProSM interface technology, the MIPI M-PHY mixed signal I/O, software driver, and hardware validation platforms.
SD 4.1 is the latest generation of storage card interface IP. SD 4.1 provides up to 312MB of bandwidth in half-duplex (one way) or 156MB in both directions.
MIPI DevCon 2016: Troubleshooting MIPI M-PHY Link and Protocol IssuesMIPI Alliance
The M-PHY specification is designed to allow mobile devices to have a low power, high performance interface. Several higher level protocols use the M-PHY physical layer for storage, I/O and memory in mobile devices. In this presentation, Gordon Getty of Teledyne LeCroy discusses how higher layer protocols, including UniPro and UFS, use the M-PHY physical layer to provide an efficient, low power storage protocol to be enabled on mobile platforms. It also covers debug and analysis techniques for UFS and UniPro technologies to allow root-cause analysis to be performed in an efficient and effective manner.
QOS-B ASED P ERFORMANCE E VALUATION OF C HANNEL -A WARE /QOS-A WARE S CHEDULI...csandit
Long Term Evolution (LTE) is defined by the Third G
eneration Partnership Project (3GPP)
standards as Release 8/9. The LTE supports at max 2
0 MHz channel bandwidth for a carrier.
The number of LTE users and their applications are
increasing, which increases the demand on
the system BW. A new feature of the LTE-Advanced (L
TE-A) which is defined in the 3GPP
standards as Release 10/11 is called Carrier Aggreg
ation (CA), this feature allows the network
to aggregate more carriers in-order to provide a hi
gher bandwidth. Carrier Aggregation has
three main cases: Intra-band contiguous, Intra-band
non-contiguous, Inter-band contiguous.
The main contribution of this paper was in implemen
ting the Intra-band contiguous case by
modifying the LTE-Sim-5, then evaluating the Qualit
y of Service (QoS) performance of the
Modified Largest Weighted Delay First (MLWDF), the
Exponential Rule (Exp-Rule), and the
Logarithmic Rule (Log-Rule) scheduling algorithms
S URVEY OF L TE D OWNLINK S CHEDULERS A LGORITHMS IN O PEN A CCESS S IM...ijwmn
he LTE/LTE-A has become a catchphrase for research
and lot of research are being conducted and
carried out in LTE in various issues by various peo
ple. New tools are developed and introduced in the
market to interpret the results of the new algorith
ms proposed by various people. Some tools are open
access which are free to use but some tools are pro
duced by the companies which are not open access. I
n
this paper some of the open access simulation tools
like LTE-Sim and NS-3 are analyzed and LTE downlin
k
scheduler algorithms are simulated using those tool
s. In LTE systems, the downlink scheduler is an
important component for radio resource management;
hence in the context of LTE simulation, a study
between the downlink scheduler models between the s
imulators are performed.
In this Office Security System project, image is captured by web camera, detected image is
compared with original data base for face recognition. If recognized image is known face then open the
door, otherwise sent the unknown image through LAN for displaying a new visitor, to all over the
network in various Departments. If the new visitor is to any one of the related person of staff member
then he will give the instruction to open door for the same visitor.
The Cortex M-3 system can measure all kind of electrical and thermal parameters RTD and so on. The
measured data can be displayed on the LCD/TFT of the system and at the same time can be transmitted
through RS – 485, or Ethernet N/W to remote DAS or DCS monitoring system by using mod bus / RTU
or mod bus / TCP control, The system has N/W with long distance communication function which can
ensure the disturbance rejection capabilities and reliability of the communication network. Hardware
platform use 32 bit embedded arm microprocessor and software platform use the microcontroller and
real time multitasking operating system which is open source. By using all these different port’s
functioning parameters of the Cortex M-3, Office Security System is developed
Arasan Chip Systems develops and marketing interface IP that meets MIPI standards. Digital IP can typically be emulated in FPGA, but mixed signal IP for physical interface cannot. Arasan provides MIPI D-PHY and MIPI M-PHY is module form for application processor / system on a chip developers to use with their emulation boards.
USB 2.0 is the dominant peripheral interface for data transfer and charging. Arasan’s Total USB IP solution includes the USB 2.0 Host with an EHCI controller and integrated USB 2.0 Hub, enabling support for all USB 2.0 speeds; USB 2.0 Device and OTG controllers, and a USB 2.0 PHY available in a wide range of foundries and process nodes.
eMMC 5.0 is the latest generation of embedded NAND Flash IP. Arasan provides a complete solution including digital controllers for host and device, the mixed PHY I/O and pads, software drivers, hardware validation and support.
Smartphones are the personal computers of the 21st century. The performance and functionality of the device, the performance and capacity of cloud-based servers, and the
bandwidth of 4G cellular networks have created a $100B market in the developed world. Smartphone shipments are expected to grow 32.7% year over year in 2013 reaching 958.8 million units. The market for high-end phones, dominated by Apple and Samsung, will continue to grow at ~8% CAGR, but the next surge in growth will come from mid-range phones ($200 to $400), and low-end phones priced below $200. These segments are expected to experience ~15% CAGR according to analysts.
NAND Flash is the nonvolatile memory used in virtually all mobile devices (smartphones, tablets, cameras, game controllers). High performance products (Tablets and smartphones) place increasing demands on NAND
Flash device capacity, cost and bandwidth. To meet these demands, component and application processor designers must utilize a complex combination of electronic hardware and software. As a result benchmarking NAND Flash at the component and system level is a key element in successful product design.
Flash storage technology and standards have evolved rapidly to meet these requirements. Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption.
Radio Frequency Front End (RFFE) MIPI core from Arasan Chip SystemsArasan Chip Systems
The RF Front-End Control Interface (RFFE) was developed to offer a common method for controlling RF front-end devices such as Power Amplifiers, Low-Noise Amplifiers (LNA), filters, switches, power management modules, antenna tuners and sensors that can be controlled using RFFE.
The Arasan ONFI 3.0 compliant NAND Flash Controller IP Core is a full featured, easy to use, synthesizable design that is easily integrated into any SoC or FPGA development. Designed to support both SLC and MLC flash memories, it is flexible to use and implement
Maruthi Prithivirajan, Head of ASEAN & IN Solution Architecture, Neo4j
Get an inside look at the latest Neo4j innovations that enable relationship-driven intelligence at scale. Learn more about the newest cloud integrations and product enhancements that make Neo4j an essential choice for developers building apps with interconnected data and generative AI.
GraphRAG is All You need? LLM & Knowledge GraphGuy Korland
Guy Korland, CEO and Co-founder of FalkorDB, will review two articles on the integration of language models with knowledge graphs.
1. Unifying Large Language Models and Knowledge Graphs: A Roadmap.
https://arxiv.org/abs/2306.08302
2. Microsoft Research's GraphRAG paper and a review paper on various uses of knowledge graphs:
https://www.microsoft.com/en-us/research/blog/graphrag-unlocking-llm-discovery-on-narrative-private-data/
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.
Communications Mining Series - Zero to Hero - Session 1DianaGray10
This session provides introduction to UiPath Communication Mining, importance and platform overview. You will acquire a good understand of the phases in Communication Mining as we go over the platform with you. Topics covered:
• Communication Mining Overview
• Why is it important?
• How can it help today’s business and the benefits
• Phases in Communication Mining
• Demo on Platform overview
• Q/A
Unlocking Productivity: Leveraging the Potential of Copilot in Microsoft 365, a presentation by Christoforos Vlachos, Senior Solutions Manager – Modern Workplace, Uni Systems
Essentials of Automations: The Art of Triggers and Actions in FMESafe Software
In this second installment of our Essentials of Automations webinar series, we’ll explore the landscape of triggers and actions, guiding you through the nuances of authoring and adapting workspaces for seamless automations. Gain an understanding of the full spectrum of triggers and actions available in FME, empowering you to enhance your workspaces for efficient automation.
We’ll kick things off by showcasing the most commonly used event-based triggers, introducing you to various automation workflows like manual triggers, schedules, directory watchers, and more. Plus, see how these elements play out in real scenarios.
Whether you’re tweaking your current setup or building from the ground up, this session will arm you with the tools and insights needed to transform your FME usage into a powerhouse of productivity. Join us to discover effective strategies that simplify complex processes, enhancing your productivity and transforming your data management practices with FME. Let’s turn complexity into clarity and make your workspaces work wonders!
How to Get CNIC Information System with Paksim Ga.pptxdanishmna97
Pakdata Cf is a groundbreaking system designed to streamline and facilitate access to CNIC information. This innovative platform leverages advanced technology to provide users with efficient and secure access to their CNIC details.
Securing your Kubernetes cluster_ a step-by-step guide to success !KatiaHIMEUR1
Today, after several years of existence, an extremely active community and an ultra-dynamic ecosystem, Kubernetes has established itself as the de facto standard in container orchestration. Thanks to a wide range of managed services, it has never been so easy to set up a ready-to-use Kubernetes cluster.
However, this ease of use means that the subject of security in Kubernetes is often left for later, or even neglected. This exposes companies to significant risks.
In this talk, I'll show you step-by-step how to secure your Kubernetes cluster for greater peace of mind and reliability.
Climate Impact of Software Testing at Nordic Testing DaysKari Kakkonen
My slides at Nordic Testing Days 6.6.2024
Climate impact / sustainability of software testing discussed on the talk. ICT and testing must carry their part of global responsibility to help with the climat warming. We can minimize the carbon footprint but we can also have a carbon handprint, a positive impact on the climate. Quality characteristics can be added with sustainability, and then measured continuously. Test environments can be used less, and in smaller scale and on demand. Test techniques can be used in optimizing or minimizing number of tests. Test automation can be used to speed up testing.
Sudheer Mechineni, Head of Application Frameworks, Standard Chartered Bank
Discover how Standard Chartered Bank harnessed the power of Neo4j to transform complex data access challenges into a dynamic, scalable graph database solution. This keynote will cover their journey from initial adoption to deploying a fully automated, enterprise-grade causal cluster, highlighting key strategies for modelling organisational changes and ensuring robust disaster recovery. Learn how these innovations have not only enhanced Standard Chartered Bank’s data infrastructure but also positioned them as pioneers in the banking sector’s adoption of graph technology.
Threats to mobile devices are more prevalent and increasing in scope and complexity. Users of mobile devices desire to take full advantage of the features
available on those devices, but many of the features provide convenience and capability but sacrifice security. This best practices guide outlines steps the users can take to better protect personal devices and information.
Why You Should Replace Windows 11 with Nitrux Linux 3.5.0 for enhanced perfor...SOFTTECHHUB
The choice of an operating system plays a pivotal role in shaping our computing experience. For decades, Microsoft's Windows has dominated the market, offering a familiar and widely adopted platform for personal and professional use. However, as technological advancements continue to push the boundaries of innovation, alternative operating systems have emerged, challenging the status quo and offering users a fresh perspective on computing.
One such alternative that has garnered significant attention and acclaim is Nitrux Linux 3.5.0, a sleek, powerful, and user-friendly Linux distribution that promises to redefine the way we interact with our devices. With its focus on performance, security, and customization, Nitrux Linux presents a compelling case for those seeking to break free from the constraints of proprietary software and embrace the freedom and flexibility of open-source computing.
A tale of scale & speed: How the US Navy is enabling software delivery from l...sonjaschweigert1
Rapid and secure feature delivery is a goal across every application team and every branch of the DoD. The Navy’s DevSecOps platform, Party Barge, has achieved:
- Reduction in onboarding time from 5 weeks to 1 day
- Improved developer experience and productivity through actionable findings and reduction of false positives
- Maintenance of superior security standards and inherent policy enforcement with Authorization to Operate (ATO)
Development teams can ship efficiently and ensure applications are cyber ready for Navy Authorizing Officials (AOs). In this webinar, Sigma Defense and Anchore will give attendees a look behind the scenes and demo secure pipeline automation and security artifacts that speed up application ATO and time to production.
We will cover:
- How to remove silos in DevSecOps
- How to build efficient development pipeline roles and component templates
- How to deliver security artifacts that matter for ATO’s (SBOMs, vulnerability reports, and policy evidence)
- How to streamline operations with automated policy checks on container images
A tale of scale & speed: How the US Navy is enabling software delivery from l...
Mobile Imaging Whitepaper
1. Mobile Imaging and Display
with Arasan MIPI Products
Executive Summary
This whitepaper describes practical considerations and best practices for
Mobile Imaging and Display for Smartphone and Tablet Computing
applications as well as exploring Silicon IP selection and successful adoption
based on Arasan’s experience with customer engagements.
The MIPI® Alliance, which is a standards setting body jointly formed and
staffed by 240+ contributing member companies from the mobile platform,
semiconductor and IP industries. Arasan has been a contributing member
since 2004.
This paper will review the MIPI standards for mobile devices, and cover
basics of the PHY-Controller interaction and why it is advisable to source
both IP’s from the same vendor. Next we provide detailed view of the MIPI
D-PHY for use with various imaging applications and advanced process
nodes, like 28 nm. This paper also explores various applications and
connectivity with cameras and displays, and defines the practical
considerations for selecting and using CSI-2, DSI and D-PHY IP’s.
Ajay Jain
Director Mobile Connectivity Products
Arasan Chip Systems
2. Arasan Chip Systems, Inc. Mobile Imaging and Display
March 2013 p2
Introduction
This whitepaper describes practical considerations and best practices for
Mobile Imaging and Display for Smartphone and Tablet Computing
applications and explores Silicon IP selection and successful adoption based
on Arasan extensive customer engagements over the past three years.
MIPI Standards and Arasan IP
Figure 1. The MIPI Alliance set of standards
The MIPI Alliance, is a standards setting body with over 240 contributing
member companies from the mobile platform, semiconductor and IP
industries. Arasan has been a contributing member since 2004, and has been
an active participant in several working groups, including the PHY working
group. This provides Arasan with a deep understanding of the standard and
protocols, and more importantly the context in which the IP’s are intended to
be used in the end products. Figure 1 depicts the major components in a
typical mobile platform. This whitepaper focuses on the connectivity to
cameras with CSI-2, to displays with DSI, and on D-PHY, the physical layer
for both of these link layer protocols. Arasan IP’s for all the protocols or
named standards shown as circled are available including the latest CSI-3
standard.
3. Arasan Chip Systems, Inc. Mobile Imaging and Display
March 2013 p3
CSI-2 and DSI standards have been around for many years, however, it is
only in the last three years, particularly in the last 18 months, when we have
seen rapidly increasing adoption in the mobile device industry. As mentioned
before, both these standards assume D-PHY as the physical layer. D-PHY
allows power efficient, EMI reduced, serial communication between a CSI-2
or DSI host/device pair. All three standards have been updated and revised a
number of times. There are other MIPI standards, like SLIMbus, that do not
require an analog PHY, while all the new protocols, like LLI and CSI-3 require
an M-PHY as the physical layer. Not only that, CSI-3 also uses UniproSM
as
the link layer. Hence CSI-3 is not backward compatible with CSI-2. Arasan
tracks the evolution of these standards closely. Arasan provides complete
MIPI IP solutions for all these standards.
Controller + PHY – Why a combination solution is needed
Figure 2. Controller + PHY Configuration
Designers all look for the most affordable best in class solutions. Often, the
method employed is to select two different solution subsets from two
different vendors. To understand how well such an approach would work, let
us first examine how a D-PHY and a link protocol controller, like CSI-2 or
DSI, are supposed to work together. When looking at connectivity between
and host and device, or a transmitter and receiver, there is a controller on the
master side that is generally responsible for configuration and control, and in
this case, the source of image data. The slave controller is the consumer of
image data. Each side has its own D-PHY, which communicates with the
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other DPHY through a pair of wires which operate with differential signaling
when transporting image data at high speed, and with single ended signaling
when communicating control and status information at low speed. In MIPI
parlance, serial high-speed transfers are done in HS mode, while low speed
(or low power) transfers are done in LP mode. When no data is to be
transferred by either side, the D-PHY’s enter a deep power saving mode,
called ULPS, which stands for Ultra-Low Power State. When the two sides
resume communication, they transition from ULPS to LP state, then move to
HS mode in case high-speed transfers are needed. The transition is initiated
by the master side controller. The slave side D-PHY and the controller react
accordingly. This makes the D-PHY/controller interaction much more power
efficient, and takes it well beyond the capabilities of conventional SerDes
based approaches.
PPI Interface
Figure 3. Detailed PPI Interface between host and device
The interface between the controller and D-PHY is called the PPI Interface.
When a MIPI compliant camera needs to communicate with a compatible
receiver in a mobile apps processor, all data transfers are done from the CSI-
2 transmitter on the master side to the receiver in the slave side in high-
speed mode. LP mode is used only as an intermediate state to transition
between ULPS and HS states, and is not used for transfer of control or
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status information in either direction. Hence only a subset of the signals
defined for the PPI interface is needed for MIPI camera connectivity.
In the case of DSI the source of image data is the Apps Processor IC, hence
the DSI Host is the controller on the master side. Either the DSI Host or
Device can send control and/or status information, hence the nature of LP
traffic is bidirectional. HS traffic remains unidirectional, that is, from the DSI
host to the device resident in the display panel module. In this case, the full
PPI interface is used.
For CSI-2 and DSI, MIPI defines a separate clock lane, and up to 4 data
lanes connected with a differential signal pair. The maximum serial data rate
for HS data transfers is 1.5 Gbps per data lane.
On the master side, a TxClkEsc (typically 15 - 20MHz) is used as a reference
for the PLL to generate three clocks. One is a byte-clock, which is always an
eighth the output data rate (1/4th
the speed of the HS clock), and is used to
transfer parallel data from the PHY in the master side to the slave side. The
second is the HS_clk_i, which is used to clock serial data from the data lane
modules. The third is the HS_clk_q, which is quadrature phase shifted with
respect to the HS-clk_i. The quadrature shifted clock is converted to a
differential form in the master clock lane module, and shipped over the
differential signal pair to the slave clock lane module which, in turn, converts
and divides down to the byte-clk for the slave side. The quadrature shifting
ensures that HS data arriving in the slave data lane modules is latched
properly.
All data lanes can transfer data in HS mode, while only Data Lane 0 is
capable of transferring data in both HS and LP mode. In Ultra-Low Power
State, there is no data transfer, and the high-speed transceivers in all the
data lanes are turned off. However, during LP mode transfers, the TxClkEsc
is used to generate the data, while the receiver on the other side recovers the
clock from the data stream. Remember, LP transactions can be driven from
either side.
Either side may attempt an LP transfer at any time. The direction of data flow
may be the same or the opposite of an existing high-speed transfer. This
would require the differential bus to turn around, and be able to do that
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without premature LP transfers causing bus contention. Also, if a bus
contention does occur, the system has to recover from it by stopping the
transfer and allowing the controller on the driving side to retransmit.
All these factors need to be taken into account when designing a D-PHY,
which led to Arasan’s development of a universal version that can work with
both CSI-2 and DSI protocols.
MIPI D-PHY – design for today’s needs
Figure 4. MIPI D-PHY
The Arasan D-PHY is split into three main sections. The analog front end
contains the PLL and clock lane module, and for each data lane, the
transmitter and receiver that can drive and receive both HS and LP data on
the Dp/Dn lines. There is a separate contention detection module that reports
contentions on the Dp/Dn lines during bus turnaround. This block is disabled
for CSI-2 applications.
The second section is the digital front end, which contains the data serdes,
and is responsible for correct data sequencing when multiple lanes are
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active. In Arasan’s universal D-PHY design, Analog BIST is included which
allows production testing of the AFE using internal loopback from transmit to
receive data paths. During The mux/demux structure allows the D-PHY to be
used in either normal operation or BIST mode.
Analog BIST requires the presence of both the transmitter and receiver,
hence although only one of them is needed in a CSI-2 application. We
provide D-PHY IP with both present to allow production testing.
In summary, Arasan’s universal D-PHY design is usable for both CSI-2 and
DSI protocols. When licensing a D-PHY, the designer needs to specify the
number of lanes. Arasan can deliver IP with the number of data lanes
required, and each data lane comes with analog BIST as well as both the
transmitter and receiver blocks. There is also a choice of IO pad topology:
staggered, in-line or flip-chip,
Hence, when selecting an IP vendor for D-PHY, designers need to
understand their willingness and capability to either configure or modify their
D-PHY to meet specific needs. The mere claim or availability of a D-PHY test
chip is not sufficient. The test chip may not be in the silicon process you
have committed to for your project, and the pad routing and lane
configuration may not match what you need. Arasan excels at making the
proverbial shoe fit the foot, not the other way around.
Advanced process nodes present special challenges. The MIPI spec requires
the LP transceivers to operate at 1.2V. During LP transfers, the Dp/Dn lines
of the differential pair have single ended CMOS level signaling. Hence if the
core supply voltage is 0.9V, the spec will not compliant for LP mode.
Arasan’s D-PHY provides an extra power pin for a dedicated 1.2 volt supply
to be provided from an external source on the PCB. The second option is to
use an Arasan-supplied LDO that steps down a 1.8/2.5/3.3V external supply
to the nominal 1.2V required by the specification. This alternative comes with
a small area overhead.
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Display Connectivity with DSI
The MIPI DSI standard allows interface to four types of display panel
modules. These panels differ in whether their display driver logic is able to
buffer full or partial frames, how programmable they are, and to what level
they are able to send and receive display commands or requests to and from
the host processor. Type 4 panels have the minimum capabilities, and every
display frame has to be explicitly sent from the DSI device. Data flow from
DSI host to device is always unidirectional. Image data transfers are made
between the DSI device and the Type 4 display drivers within panel modules
over the DPI interface, which is also specified by MIPI. At the other end of the
panel spectrum is the Type 1, which is able to advertise to the host its
capabilities. This is done by the panel’s display driver logic sending LP
transactions to the host processor. Hence, LP data flow is bidirectional, while
high speed transfers are always from the host processor to the display panel
module. Such transfer characteristics are defined in MIPI’s DBI specification,
and the control and command sets are defined in the DCS specification.
Type 2 and 3 panels can support both DPI and DBI transfers. They have
partial or no frame buffer memory, and when operating with DPI transfers,
rely on configuration information stored in their non-volatile memories. In
general DBI transfers are a lot more power efficient, since an explicit
transmission does not have to happen for every refresh of every frame.
Mobile displays, particularly tablets, have been trending towards increasing
resolution and color depth. MIPI, in anticipation of this, has defined the DSI
and D-PHY connectivity standards to allow plenty of headroom. With 4 lanes
of 1.5Gbps D-PHY’s, designs can go up to 2.5Kx2K resolution, which is
beyond the most advanced tablets available in the market today.
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Camera Connectivity with CSI-2
Figure 5. CSI-2 transmitter
For the purpose of this discussion, a camera module consists of an image
sensor, a microcontroller or CPU subsystem, and the CSI-2 transmitter IP
with its associated D-PHY. Image data captured by the camera sensor
should be presented to the CSI-2 Transmitter in RAW, RGB or YUV formats;
the MIPI spec lists all the detailed formats that the CSI-2 connectivity
infrastructure is required to support. The CSI-2 sensor interface provides you
the option to compress the RAW data, and converts any kind of pixel data to
bytes, which are then packetized and distributed over one or more lanes of
the D-PHY. The higher the resolution of the captured image, the more speed
and/or number of lanes needed. Given the max D-PHY throughput of
1.5Gbps per lane, with a maximum of 4 data lanes, the maximum camera
resolution supported, assuming 24 bits/pixel in RGB format, with 30
frames/second is 8 megapixels.
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Figure 6. CSI-2 receiver
The CSI-2 receiver resides in an apps processor. The original camera image
sensor data split into multiple lanes is grabbed from the slave D-PHY’s and
merged. The depacketizer checks for CRC errors in the payload, before
forwarding the image data to the ISP interface. The FIFO is used to pass data
from the depacketizer’s byte clock domain to the ISP clock domain. This
receiver has the flexibility to transfer one or two pixels per ISP clock. The ISP
interface block frames the image with the appropriate front and back
porches for the horizontal and vertical blanking periods.
Configuration, control and status reporting is done using programmed IO
through the AHB interface. Both the CSI-2 receiver and transmitter are
configurable for any allowed number of lanes. However, Arasan remain
flexible in customization, since our objective is to ensure proper integration of
this IP into the rest of the SoC.
A typical mobile platform has front and rear cameras, and there are choices
to be made with respect to the bit rates to be supported for each camera
subsystem. The choice of the camera sensor governs the number of bits per
pixel and the size of the pixel row/column matrix. Different customers target
different resolutions, color depth and frame rate, and that determines the
11. Arasan Chip Systems, Inc. Mobile Imaging and Display
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lane configuration and maximum high speed data rate for high speed
transfers.
To illustrate these choices, consider the design team that decided to offer
the option of either a single rear camera, or dual stereoscopic rear cameras.
To stay within a target power budget the options offered here are to either
provide the maximum resolution and color depth with a single 4-lane rear
camera, or reduce the resolution and color depth when operating in
stereoscopic mode with two 2-lane cameras. In stereoscopic mode, two of
the lanes in CSI-2Rx_0 are shut down. Other customers may choose other
configurations, and this lends itself to customization in the ISP interface – an
example being the transfer of 2 pixels per ISP clock. Arasan is able to
collaborate on this kind of architecture planning and customized
implementation. MIPI standards mostly deal with data transformations and
transfer protocols, however, close cooperation between IP vendor and user
is required for integration. This has major implications for the verification IP
that Arasan delivers with each IP, since each customized feature has to be
verified through simulation and coverage analysis.
Looking Forward to CSI-3
Figure 7. CSI2 and CSI-3 Differences
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The CSI-3 Rev 1.0 spec was released in February 2013. CSI-3 uses M-PHY
for the physical layer. M-PHY is quite different from D-PHY. It does not have
a dedicated clock lane, and relies on clock and data recovery on the receiver
side. Two different speed gears are supported for high-speed transfers,
namely, 1.5 and 2.9 Gbps, also with a maximum of 4 lanes. The LP mode
transfer is replaced with a PWM mode transfer, which is also differential in
nature, and has support for multiple clock gears. This means that a camera
and SoC will need to auto-negotiate the maximum speed that they can run at
– both for HS and PWM modes.
The controllers use the MIPI Unipro protocol for its link layer. This, along with
M-PHY, has been designed, verified and deployed in live customer
engagements for other applications by Arasan. What is new, and strictly
speaking, defines CSI-3 are the transport and camera abstraction layers
above the Unipro. These specs are under review at MIPI.
From the physical to the sensor or ISP interface, CSI-2 and CSI-3 are
different at every level, so backward compatibility using the same Dp/Dn
lines is not possible. One may choose to provide both options on an Apps
Processor SoC by integrating two different sets of IP’s driving two different
sets of Dp/Dn lines. CSI-3 adoption will be driven by mono and stereoscopic
cameras that support resolutions, color depths and frame rates beyond what
is possible with CSI-2.
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Practical Considerations
In summary, if you are considering selecting MIPI IP for mobile imaging,
Arasan strongly recommends that you license the PHY and Controller from
the same vendor. The PPI interface and some low level details can be
implemented with both IP’s in mind, and it is not recommended that you
spend time on compatibility issues between two different IP’s during a live
project. The D-PHY is a sophisticated PHY, and successful adoption requires
the IP vendor to deliver low power, small area, testability, spec compatibility
at sub-40 nm, and configurability to match your packaging, process and
application. For controllers, every target chip design seems to require some
level of architectural flexibility or customization in the IP. Arasan is
committed to serve an expansive market for cameras and displays, including
dual and stereoscopic imaging and different host bus interfaces. Additionally,
new cameras and display panels continuously evolve, and ensuring
compatibility between SoC’s and such peripherals frequently requires
intervention by IP vendors. To this end, Arasan recommends that Application
Processor designers source samples of the camera or display modules and
interface them to Arasan’s hardware validation platforms to enable early
hardware software validation.