This document provides an overview of memory reference instructions in a computer system. It begins by defining the prerequisites for understanding memory reference instructions, including instruction codes, operation codes, and addresses. It then defines what a memory reference instruction is and lists some common terminology. The document outlines the basic components of a computer including registers like the program counter, accumulator, and data register. It describes direct and indirect addressing modes and provides examples of different memory reference instruction codes. Finally, it presents the control flowchart and lists some common memory reference instructions and their corresponding micro-operations.

1. MEMORY
REFERENCE​
INSTRUCTION
By​
Shagun Sharma (03816702020)​
Harshit Jaysan Sharma (061616702020)​

2. PRE-REQUISITES
INSTRUCTION CODE AND
OPCODE AND ADDRESS
PRE-REQUISITES
INSTRUCTION CODE AND
OPCODE AND ADDRESS
PRE-REQUISITES
INSTRUCTION CODE AND
OPCODE AND ADDRESS
PRE-REQUISITES
INSTRUCTION CODE AND
OPCODE AND ADDRESS
PRE-REQUISITES
INSTRUCTION CODE AND
OPCODE AND ADDRESS
PRE-REQUISITES
INSTRUCTION CODE AND
OPCODE AND ADDRESS

3. Contents
•PREREQUISITES FOR BETTER UNDERSTANDING OF MEMORY
REFERENCE INSTRUCTIONS[MRI]
•WHAT IS MEMORY REFERENCE INSTRUCTION?
•SOME TERMINOLOGIES.
•NECESSARY INSTRUCTIONS IN MRI.
•CONTROL FLOW CHART AND FLOW CHART FOR MEMORY

4. PRE-REQUISITES
• INSTRUCTION CODE IS A GROUP OF BITS THAT
INSTRUCT THE COMPUTER TO PERFORM A SPECIFIC
OPERATION.
• THE OPERATION CODE OF AN INSTRUCTION IS A
GROUP OF BITS THAT DEFINE SUCH OPERATIONS AS
ADD, SUBTRACT, MULTIPLY, SHIFT AND COMPLEMENT
• THE OPERATION CODE{OPCODE} MUST CONSIST AT
LEAST ‘n’ bits for a given 2n (or less) distinct
operations.
• THE INSTRUCTIONS ARE STORED IN COMPUTER
MEMORY IN THE SAME MANNER THAT DATA IS
STORED
• THE CONTROL UNIT INTERPRETS THESE
INSTRUCTIONS AND USES OPCODE TO DETERMINE
THE SEQUENCE OF MICRO OPERATIONS

5. STORED PROGRAM ORGANIZATION
• THE SIMPLEST WAY TO ORGANIZE A COMPUTER IS TO HAVE ONE PROCESSOR
REGISTER AND AN INSTRUCTION CODE FORMAT WITH TWO PARTS.
• THE MEMORY ADDRESS TELLS THE CONTROL WHERE OPERAND IS STORED IN
THE MEMORY.THE OPERAND IS READ FROM MEMORY AND USES AS THE DATA
TO BE OPERATED ON TOGETHER WITH THE DATA STORED IN PROCESSOR
REGISTER.
15 14 11 0

6. STORED PROGRAM ORGANIZATION
NSTRUCTIONS ARE STORED IN ONE SECTION OF ADDRESS
(PROGRAM)AND DATA IS STORED IN ANOTHER (OPERAND)
FOR A MEMORY UNIT WITH 4096 WORDS WE NEED 12 BITS TO
SPECIFY AN ADDRESS SINCE 212=4096.IF WE STORE EACH
INSTRUCTION CODE IN ONE 16 BIT MEMORY WORD, WE HAVE
AVAILABLE 4 BITS FOR THE OPCODE TO SPECIFY 1 OUT 16
POSSIBLE OPERATIONS AND 12 BITS TO SPECIFY THE
ADDRESS OF AN OPERAND.
THE CONTROL READS A 16 BIT INSTRUCTION FROM THE
PROGRAM PORTION OF MEMORY. IT USES THE 12 BIT ADDRESS
PART OF THE INSTRUCTION TO READ A 16 BIT OPERAND FROM
THE DATA PORTION OF MEMORY. IT THEN EXECUTES THE
OPERATION SPECIFIED BY THE OPERATION CODE.

7. DIRECT ADDRESS
IF I=0 FOR DIRECT ADDRESS
It is placed in address 22 in memory. The I
bit is 0, so the instruction is
recognized as a direct address instruction.
The opcode specifies an ADD instruction,
and the address part is the binary
equivalent of 457. The control finds the
operand in memory at address 457 and
adds it to the content of AC
IF I=1 FOR INDIRECT ADDRESS
The instruction in address 35 has a
mode bit I = 1. Therefore, it is
recognized as an indirect
address instruction. The address
part is the binary equivalent of
300. The control goes to address
300 to find the address of the
operand. The address of the
operand in this case is 1350. The
operand found in address 1350 is
then added to the content of AC
INDIRECT ADDRESS

8. Symbol Numbers of Bits Name Function
DR 16 DATA REGISTER Holds memory operand
AR 12 ADDRESS REGISTER Holds address for memory
AC 16 ACCUMULATOR Processor register
IR 16 INSTRUCTION REGISTER Holds instruction code
PC 12 PROGRAM COUNTER Holds address of instruction
TR 16 TEMPORARY REGISTER Holds temporary data
INPR 8 INPUT REGISTER Holds input character
OUTR 8 OUTPUT REGISTER Holds output character
REGISTERS

9. REGISTERS
• Computer instructions are stored in
consecutive locations and are executed
sequentially; this requires a register which can
stored the address of the next instruction; we
call it the Program Counter.
• • We need registers which can hold the
address at which a memory operand is stored
as well as the value itself. • We need a place
where we can store
• – temporary data
• – the instruction being executed,
• – a character being read in
• – a character being written out.

10. BASIC COMPUTER
INSTRUCTION
CONNECTED WITH
COMMON BUS

11. Definition of
instruction
• AN INSTRUCTION THAT HAS ONE OR
MORE OF ITS OPERAND ADDRESSES
REFERRING TO A LOCATION IN
MEMORY, AS OPPOSED TO ONE OF THE
CPU REGISTERS OR SOME OTHER WAY
OF SPECIFYING AN OPERAND.

12. THE BASIC
COMPUTER HAS
THREE 16-BIT
INSTRUCTION CODE
FORMATS.
Types of instructions
MEMORY REFERENCE
INSTRUCTIONS
MRI’S OPCODE=000 THROUGH 110
REGISTER REFERENCE
INSTRUCTIONS
RRI’S OPCODE=111, I=0
INPUT-OUTPUT INSTRUCTIONS
I/O INST.’S OPCODE=111, I=1.

13. In
Memory Refere
nce Instruction
THE FIRST 12 BITS SPECIFY AN ADDRESS AND THE NEXT 3 BITS ARE
OPCODE, THE LEFTMOST BIT SPECIFY THE ADDRESSING MODE “I”

14. COMPUTER
INSTRUCTIONS The address field is denoted by
three x’s(in hexadecimal notation)
and is equivalent to 12 bit address.
The last mode bit of instruction is
denoted by I
I=0
Last 4 bit of an
instruction have a
hexadecimal equivalent from
0-6 since the last bit is 0
I=1
Last 4 bit of an
instruction have a
hexadecimal equivalent from
8-E since the last bit is 1
0-6 since the last bit is 0

15. SYMBOL HEX CODE DESCRIPTION
I=0 I=1
AND 0xxx 8xxx AND MEMORY WORD TO AC
ADD 1xxx 9xxx ADD MEMORY WORD TO AC
LDA 2xxx Axxx LOAD AC FROM MEMORY
STA 3xxx Bxxx STORE CONTENT OF AC INTO MEMORY
BUN 4xxx Cxxx BRANCH UNCONDITIONALLY
BSA 5xxx Dxxx BRANCH AND SAVE RETURN ADDRESS
ISZ 6xxx Exxx INCREMENT AND SKIP IF 0

16. INSTRUCTION
SET
COMPLETENESS
THE SET OF
INSTRUCTIONS
IS SAID TO BE
COMPLETED IF
THE
COMPUTER
INCLUDES A
SUFFICIENT
NUMBER OF
INSTRUCTIONS
IN EACH OF
THE
FOLLOWING
CATEGORIES
•ARITHMETIC, LOGICAL, AND
SHIFT INSTRUCTIONS
•INSTRUCTIONS FOR MOVING
INFORMATION TO AND FROM
MEMORY AND PROCESSOR
REGISTERS
•PROGRAM CONTROL
INSTRUCTIONS TOGETHER WITH
INSTRUCTIONS THAT CHECK
STATUS CONDITIONS
•INPUT AND OUTPUT
INSTRUCTIONS

17. MICRO-OPERATIONS
AND D0 AC ← AC M[AR] D0T4: DR ← M[AR]
D0T5: AC ← AC DR , SC ←0
ADD D1 AC ← AC + M[AR] , E ←Cout D1T4: DR ← M[AR]
D1T5: AC ← AC + DR , E ←Cout ,SC ←0
LDA D2 AC ← M[AR] D2T4: DR ← M[AR]
D2T5: AC ← DR ,SC ←0
STA D3 M[AR] ← AC D3T4: M[AR] ← AC , SC ←0
BUN D4 PC ← AR D4T4: PC ← AR , SC ←0
BSA D5 M[AR] ← PC , PC ← AR + 1 D5T4: M[AR] ← PC , AR ← AR + 1
D5T5: PC ← AR , SC ←0
ISZ D6 M[AR] ← M[AR] + 1 ,
If M[AR] + 1 =0 then PC ← PC + 1
D6T4: DR ← M[AR]
D6T5: DR ← DR + 1
D6T6: M[AR] ← DR , if (DR =0) then (PC ←PC+ 1) ,SC ←0

18. CONTROL
FLOWCHART

19. Resources
A BOOK BY M,MORRIS MANO MS.SONALI MALIK
(ASS. PROFESSOR AT SIMS)
adelphI.edu