This document discusses Programmable Logic Controllers (PLCs), including PLC addressing, basic instructions like examine if closed (XIC) and output energize (OTE), and using a PLC simulator. It explains how inputs and outputs are mapped to data files and addresses. Basic PLC programming concepts are introduced like branches and parallel logic. The document recommends using the simulator's built-in simulations, like the batch simulator, to design and test ladder logic programs.

1. 3-1
Dr. D. J. Jackson Lecture 3-1Electrical & Computer Engineering
Programmable Logic
Controllers
PLC Addressing and Basic
Instructions
Dr. D. J. Jackson Lecture 3-2Electrical & Computer Engineering
Basic addressing
• For the Allen-Bradley PLCs and the simulator
used, the input and output image areas (in
addition to other data) are held in “data files”
• Each “data file” holds information such as
– Discrete input values
– Discrete output values
– Values associated with timers
– Values associated with counters
– Status information
– Etc.

2. 3-2
Dr. D. J. Jackson Lecture 3-3Electrical & Computer Engineering
PLC data files
Simulator data files AB PLC data files
Dr. D. J. Jackson Lecture 3-4Electrical & Computer Engineering
I/O memory mapping
• Basic AB PLC addressing
X1:x.0/0
Data file type
I – input
O – output
S – status
B – binary
T- timer
C-counter
Data file number
(can be omitted for the
basic data files)
Slot number (not used with the simulator)
Word number: selects
a specific word in
a data file
Bit number
I/O located on the controller (embedded I/O) is slot 0.
I/O added to the controller (expansion I/O) begins with slot 1.

3. 3-3
Dr. D. J. Jackson Lecture 3-5Electrical & Computer Engineering
Example Addressing
CPU
Module
(slot 0)
Digital
Input
Module
(slot 1)
16 inputs
Digital
Output
Module
(slot 2)
8 outputs
Would occupy
addresses
I1:1.0/0
through
I1:1.0/15
Would occupy
addresses
O0:2.0/0
through
O0:2.0/7
Dr. D. J. Jackson Lecture 3-6Electrical & Computer Engineering
Basic instructions
• Examine If Closed (XIC)
• Examine If Open (XIO)
• Output Energize (OTE)
• Output Latch (OTL)
• Output Unlatch (OTU)
• One-shot Rising (OSR)

4. 3-4
Dr. D. J. Jackson Lecture 3-7Electrical & Computer Engineering
Examine if closed (XIC)
• Alternate name: Normally open contact
• Use the XIC instruction in your ladder program to
determine if a bit is on.
– When the instruction is executed, if the bit addressed is on
(1), then the instruction is evaluated as TRUE.
– When the instruction is executed, if the bit addressed is off
(0), then the instruction is evaluated as FALSE.
Instruction symbol
Normally open switch is open
Normally open switch is closed
Dr. D. J. Jackson Lecture 3-8Electrical & Computer Engineering
Examine if open (XIO)
• Alternate name: Normally closed contact
• Use the XIO instruction in your ladder program to
determine if a bit is off.
– When the instruction is executed, if the bit addressed is on
(1), then the instruction is evaluated as FALSE.
– When the instruction is executed, if the bit addressed is off
(0), then the instruction is evaluated as TRUE.
Instruction symbol
Normally open switch is open
Normally open switch is closedAn XIO instruction inverts the
state of the bit it references.

5. 3-5
Dr. D. J. Jackson Lecture 3-9Electrical & Computer Engineering
Output energize (OTE)
• Alternate name: coil
• This instruction is usually used in conjunction with
XIC or XIO or any other input instruction.
• If the logic preceding the OTE instruction is true (1),
the OTE instruction will be energized
Instruction symbol
Not energized
Energized
An OTE instruction can
only be the last
instruction on a rung.
Dr. D. J. Jackson Lecture 3-10Electrical & Computer Engineering
Output latch (OTL)
• The OTL instruction is used only to turn
a bit on and latch it on
Instruction symbol
L
Initially not
energized
Energized
Latched

6. 3-6
Dr. D. J. Jackson Lecture 3-11Electrical & Computer Engineering
Output unlatch (OTU)
• The OTU instruction is used only to turn
a bit off and latch it off
• OTL and OTU are generally used in pairs
Instruction symbol
U
Dr. D. J. Jackson Lecture 3-12Electrical & Computer Engineering
One-shot rising (OSR)
• When the rung conditions preceding the OSR
go from false-to-true, the OSR instruction
goes true also but for only one scan
Instruction symbol
OSR I:1/0
B3:0/0
One PLC scan

7. 3-7
Dr. D. J. Jackson Lecture 3-13Electrical & Computer Engineering
Branches
• Branches can be inserted in ladder logic programs to
create parallel combinations of various ladder logic
elements
Dr. D. J. Jackson Lecture 3-14Electrical & Computer Engineering
Multiple Series/Parallel Branches
• Multiple series/parallel branches can be utilized with
multiple inputs and also affecting multiple outputs in
parallel

8. 3-8
Dr. D. J. Jackson Lecture 3-15Electrical & Computer Engineering
PLC simulator usage
• Ladder logic elements (instructions) can be dragged
and dropped onto the ladder window to create a
ladder logic program
• The ladder logic program is executed by going
online, ‘downloading’ the PLC program, and
switching to run mode
OFFLINE/ONLINE control Download PLC run mode
Dr. D. J. Jackson Lecture 3-16Electrical & Computer Engineering
ProSim simulations
• The Logixpro simulator provides a set of built-in simulations
• The I/O simulation initially will be of most use since it provides
access to simulated discrete inputs (switches) and outputs
(lamps)

9. 3-9
Dr. D. J. Jackson Lecture 3-17Electrical & Computer Engineering
Other Prosim simulations
• Available simulators
– Door simulator
– Silo simulator
– Traffic simulator
– Batch simulator
– Dual Compressor simulator
– Bottle line simulator
– Four floor elevator simulator
• Most projects will involve designing ladder
logic programs to control these simulations
Dr. D. J. Jackson Lecture 3-18Electrical & Computer Engineering
Batch simulator showing example I/O