The aim of this paper is to determine the Total harmonic distortion (THD) of three phase voltage source inverter (VSI) fed R-L load. The modulation Techniques used is Sinusoidal pulse width modulation (SPWM) and third harmonic pulse width modulation (THPWM). The Carrier frequency is varied to analyze its effect on Current THD and Voltage THD.This paper also presents the comparison of SPWM and THPWM controlled Inverter in terms of THD. The simulation result shows THPWM has better performance when compared to SPWM. The simulation of circuit is done by using MATLAB/Simulink.
Common Mode Voltage reduction in Diode Clamped MLI using SPWM TechniquesMOHD ABDUL MUQEEM NAWAZ
This document discusses techniques to reduce common mode voltage in diode clamped multilevel inverters using sinusoidal pulse width modulation. It presents simulation results comparing phase disposition, phase opposition disposition, and alternative phase opposition disposition SPWM methods in 3-level, 5-level, 7-level and 9-level inverters. The zero common mode SPWM technique is also analyzed, showing it can eliminate common mode voltage. Simulation results show that higher level inverters and carrier disposition techniques like alternative phase opposition disposition more effectively reduce common mode voltage and total harmonic distortion.
IRJET- Analysis of Sine Pulse Width Modulation (SPWM) and Third Harmonic Puls...IRJET Journal
This document analyzes and compares sine pulse width modulation (SPWM) and third harmonic pulse width modulation (THPWM) techniques for a three-phase voltage source inverter (VSI). It discusses how these modulation techniques work, their effect on harmonic content in the output waves, and simulations conducted in MATLAB. The key findings are:
1) THPWM allows for 15.5% greater utilization of the DC bus voltage compared to SPWM, leading to higher fundamental output voltage.
2) Simulation results show THPWM achieves lower total harmonic distortion (THD) in both the output voltages and currents compared to SPWM.
3) The minimum current THD for both techniques occurred at a carrier frequency
Performance Evaluation of a Three Phase Nine Level Inverter with Reduced Swit...Scientific Review
This paper presents a three phase nine level cascaded H-bridge (CHB) multilevel inverter with RL load. A sinusoidal and trapezoidal PWM method is used to achieve minimum total harmonics distortion (THD) in the output current of multilevel inverters. The analysis of the output current harmonics is carried out and compared with the seven level conventional cascaded H-bridge inverters. The proposed inverter is verified through simulation and the simulation results are compared with the conventional multilevel inverter. From the result the proposed inverter offers much less total harmonic distortion.
Space Vector Modulation with DC-Link Voltage Balancing Control for Three-Leve...IDES Editor
Modified space vector modulation (SVM) for
DC-link voltage balancing of three-level inverter is proposed
here. Effect of the DC-link capacitor voltage deviation on
inverter switching states is presented for three-level
inverter. Pulse pattern arrangements for proposed SVM
using degree of freedom available in choice of redundant
space vectors, sequencing of vectors, and splitting of duty
cycles of vector are best exploited. Seven-segment SVM
scheme and modified closed loop space vector DC-link
voltage balancing control schemes are implemented. The
effectiveness of proposed scheme is verified by simulations
and experimental verification on laboratory prototype.
Harmonic Analysis of Three level Flying Capacitor InverterMohd Esa
The aim of this paper is to determine the Total harmonic distortion (THD) of three phase three level flying capacitor inverter fed star connected R-L load. The modulation Techniques used is Phase Disposition Sinusoidal pulse width modulation (PD-SPWM) and Phase Opposition Disposition Sinusoidal pulse width modulation (POD-SPWM).The Modulation index is varied to analyze its effect on Current THD and Voltage THD.This paper also presents the comparison of PD-SPWM and POD-SPWM controlled Flying capacitor Inverter in terms of THD. The simulation result shows that PD-SPWM has better performance when compared to POD-SPWM. The simulation of circuit is done by using MATLAB/Simulink.
This document provides an overview of various pulse width modulation techniques for voltage source inverters, including naturally sampled PWM, regular sampled PWM, delta modulation, delta sigma modulation, space vector modulation, and hysteresis PWM. It describes the basic concepts and operating principles of each technique, and compares them in terms of performance metrics like harmonic distortion and switching losses. Space vector modulation techniques are ranked as providing the best performance in terms of minimizing harmonics, followed by regular sampled PWM and sine-triangle modulation.
The peer-reviewed International Journal of Engineering Inventions (IJEI) is started with a mission to encourage contribution to research in Science and Technology. Encourage and motivate researchers in challenging areas of Sciences and Technology.
Common Mode Voltage reduction in Diode Clamped MLI using SPWM TechniquesMOHD ABDUL MUQEEM NAWAZ
This document discusses techniques to reduce common mode voltage in diode clamped multilevel inverters using sinusoidal pulse width modulation. It presents simulation results comparing phase disposition, phase opposition disposition, and alternative phase opposition disposition SPWM methods in 3-level, 5-level, 7-level and 9-level inverters. The zero common mode SPWM technique is also analyzed, showing it can eliminate common mode voltage. Simulation results show that higher level inverters and carrier disposition techniques like alternative phase opposition disposition more effectively reduce common mode voltage and total harmonic distortion.
IRJET- Analysis of Sine Pulse Width Modulation (SPWM) and Third Harmonic Puls...IRJET Journal
This document analyzes and compares sine pulse width modulation (SPWM) and third harmonic pulse width modulation (THPWM) techniques for a three-phase voltage source inverter (VSI). It discusses how these modulation techniques work, their effect on harmonic content in the output waves, and simulations conducted in MATLAB. The key findings are:
1) THPWM allows for 15.5% greater utilization of the DC bus voltage compared to SPWM, leading to higher fundamental output voltage.
2) Simulation results show THPWM achieves lower total harmonic distortion (THD) in both the output voltages and currents compared to SPWM.
3) The minimum current THD for both techniques occurred at a carrier frequency
Performance Evaluation of a Three Phase Nine Level Inverter with Reduced Swit...Scientific Review
This paper presents a three phase nine level cascaded H-bridge (CHB) multilevel inverter with RL load. A sinusoidal and trapezoidal PWM method is used to achieve minimum total harmonics distortion (THD) in the output current of multilevel inverters. The analysis of the output current harmonics is carried out and compared with the seven level conventional cascaded H-bridge inverters. The proposed inverter is verified through simulation and the simulation results are compared with the conventional multilevel inverter. From the result the proposed inverter offers much less total harmonic distortion.
Space Vector Modulation with DC-Link Voltage Balancing Control for Three-Leve...IDES Editor
Modified space vector modulation (SVM) for
DC-link voltage balancing of three-level inverter is proposed
here. Effect of the DC-link capacitor voltage deviation on
inverter switching states is presented for three-level
inverter. Pulse pattern arrangements for proposed SVM
using degree of freedom available in choice of redundant
space vectors, sequencing of vectors, and splitting of duty
cycles of vector are best exploited. Seven-segment SVM
scheme and modified closed loop space vector DC-link
voltage balancing control schemes are implemented. The
effectiveness of proposed scheme is verified by simulations
and experimental verification on laboratory prototype.
Harmonic Analysis of Three level Flying Capacitor InverterMohd Esa
The aim of this paper is to determine the Total harmonic distortion (THD) of three phase three level flying capacitor inverter fed star connected R-L load. The modulation Techniques used is Phase Disposition Sinusoidal pulse width modulation (PD-SPWM) and Phase Opposition Disposition Sinusoidal pulse width modulation (POD-SPWM).The Modulation index is varied to analyze its effect on Current THD and Voltage THD.This paper also presents the comparison of PD-SPWM and POD-SPWM controlled Flying capacitor Inverter in terms of THD. The simulation result shows that PD-SPWM has better performance when compared to POD-SPWM. The simulation of circuit is done by using MATLAB/Simulink.
This document provides an overview of various pulse width modulation techniques for voltage source inverters, including naturally sampled PWM, regular sampled PWM, delta modulation, delta sigma modulation, space vector modulation, and hysteresis PWM. It describes the basic concepts and operating principles of each technique, and compares them in terms of performance metrics like harmonic distortion and switching losses. Space vector modulation techniques are ranked as providing the best performance in terms of minimizing harmonics, followed by regular sampled PWM and sine-triangle modulation.
The peer-reviewed International Journal of Engineering Inventions (IJEI) is started with a mission to encourage contribution to research in Science and Technology. Encourage and motivate researchers in challenging areas of Sciences and Technology.
The document discusses pulse width modulation (PWM) variable speed drives that are increasingly used in industrial applications. It describes how PWM is used to generate variable voltage and frequency for AC drives from a three-phase voltage source inverter. Space vector PWM (SVPWM) is highlighted as it provides superior harmonic quality and larger modulation range compared to sinusoidal PWM. SVPWM represents the inverter states as voltage space vectors to calculate duty cycles for adjacent vectors and zero vectors to synthesize the desired output voltage vector. The document outlines the theory of SVPWM and compares different sequencing methods. It also discusses simulations and advantages of PWM including proportional average value, fast switching, noise resistance and less heat.
This document summarizes research on pulse width modulation (PWM) techniques for three-phase inverters. It describes sinusoidal PWM switching schemes that allow control of output voltage magnitude and frequency. Simulation models of three-phase inverters using sawtooth and triangular carrier waveforms are presented and analyzed. The results show that a sawtooth carrier waveform produces a more appropriate three-phase voltage waveform compared to a triangular carrier waveform. In conclusion, sinusoidal PWM inverters can generate clean sinusoidal output voltages through comparison of reference and carrier signals to control switching.
International Journal of Engineering Research and Applications (IJERA) aims to cover the latest outstanding developments in the field of all Engineering Technologies & science.
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
A Refined Space Vector PWM Signal Generation for Multilevel InvertersIDES Editor
A refined space vector modulation scheme for
multilevel inverters, using only the instantaneous sampled
reference signals is presented in this paper. The proposed
space vector pulse width modulation technique does not require
the sector information and look-up tables to select the
appropriate switching vectors. The inverter leg switching times
are directly obtained from the instantaneous sampled
reference signal amplitudes and centers the switching times
for the middle space vectors in a sampling time interval, as in
the case of conventional space vector pulse width modulation.
The simulation results are presented to a five-level inverter
system for dual-fed induction motor drive. The dual-fed
structure is realized by opening the neutral-point of the
conventional squirrel cage induction motor. The five-level
inversion is obtained by feeding the dual-fed induction motor
with four-level inverter from one end and two-level inverter
from the other end.
Fast svm based 3 phase cascaded five level invertereSAT Journals
Abstract Introduction of nearest three vector algorithm is a major achievement in the area of space vector technology. Complexity and severe computations are still the drawbacks of SVM methods mainly for multilevel inverter applications. A fast SVM technique is introduced in this project which allows the calculation of switch time duration and the efficient determination of switching times based on the two level inverter scheme. SVM modulating waves are generated based on the two level system and then this modulating waves are compared with required number of carrier signals in order to generate the switching pulses for the inverter. Four triangular carrier signals are needed for a five level system in order to generate the switching pulses. Coordinates of the nearest three voltage vectors is not needed, so the complexity of the SVM technique can be reduced and it is the major advantage of the proposed technique compared with conventional SVM techniques used for multilevel inverters. A three phase five level cascaded H bridge topology is used here to verify the effectiveness of the proposed technique. MATLAB simulation and hardware implementation of the proposed system is done. From the analysis of both simulation and hardware it is clear that proposed SVM technique have more fundamental output and less THD than sinusoidal PWM technique. Key Words: Cascaded H bridge, Multilevel, Modulating wave, Space vector
Sinusoidal PWM has been a very popular technique used in AC motor control. This is a method that employs a triangular carrier wave modulated by a sine wave and the points of intersection determining the switching points of the power devices in the inverter.
Space Vector Modulation(SVM) Technique for PWM InverterPurushotam Kumar
This document discusses space vector pulse width modulation (SVM) for three-phase voltage source inverters. It begins by introducing SVM and its benefits over other PWM techniques, such as reduced total harmonic distortion. It then provides details on how SVM works, including transforming a three-phase reference signal to a rotating vector in the d-q reference frame. The document explains the eight possible switching states, sectors, and how to calculate switching times to synthesize the reference signal using adjacent active vectors and zero vectors. It concludes by comparing SVM to sinusoidal PWM, showing SVM offers better voltage utilization and harmonic performance.
IRJET- dsPIC based Implementation of Sinusoidal Pulse Width Modulation Techni...IRJET Journal
This document discusses the digital implementation of sinusoidal pulse width modulation (SPWM) techniques for controlling multilevel inverters using a microcontroller. It presents four SPWM techniques - phase disposition, phase opposition disposition, alternate phase opposition disposition, and inverted phase disposition - and how they can be realized digitally by fragmenting and shifting a reference sinusoidal wave in the microcontroller. Simulation and experimental results validating a five-level cascaded H-bridge inverter controlled by these SPWM techniques using a dsPIC microcontroller are also presented, including the total harmonic distortion achieved with each method.
THD analysis of SPWM & THPWM Controlled Three phase Voltage Source InverterIRJET Journal
This document analyzes and compares the total harmonic distortion (THD) of a three-phase voltage source inverter controlled by two modulation techniques: sinusoidal pulse width modulation (SPWM) and third harmonic pulse width modulation (THPWM). The simulation results show that THPWM has better performance than SPWM, with lower current and voltage THD values. Specifically, THPWM provides current THD below 2% and voltage THD below 55% across all tested carrier frequencies, while SPWM has higher THD, with minimum values of 2.06% for current and 65.98% for voltage. Therefore, THPWM is determined to produce output voltage and current of better quality compared to SPWM.
This document presents a comparative investigation of a 7-level cascaded multilevel inverter using different multicarrier pulse width modulation techniques. It discusses the classification, operation, and modulation strategies of multilevel inverters including diode clamped, flying capacitor, and cascaded H-bridge topologies. Simulation results in MATLAB/Simulink are presented to analyze the total harmonic distortion for a 7-level cascaded H-bridge multilevel inverter using phase disposition, alternate phase opposition disposition, and phase opposition disposition pulse width modulation techniques. The research aims to improve the output waveform quality and reduce switching losses of the 7-level inverter.
The document provides a final report on the design and implementation of a space vector modulated (SVM) three-phase inverter. It includes a discussion of SVM pulse width modulation theory, a computer simulation of sinusoidal PWM, and an implementation of the SVM technique. The implementation was broken into four modules: an inverter module, an inverter control module, a calculation module, and a user interface control module. Simulation results showed the SVM technique producing the desired three-phase output with minimized harmonics.
This document discusses the implementation of space vector pulse width modulation (SVPWM) for a three-phase voltage source inverter using a field programmable gate array (FPGA). SVPWM techniques offer benefits over traditional sinusoidal PWM like reduced total harmonic distortion and improved voltage transfer. The FPGA implementation involves developing VHDL code to determine the switching times of the inverter transistors based on the reference voltage vector. Simulation results show the output line voltages and currents generated by the FPGA-controlled inverter driving an induction motor load have low distortion. FPGA implementation provides advantages over microprocessors like compact size, reliability, and fast design changes.
The document proposes a switching strategy for space vector modulated current link inverters connected to the power grid. It discusses pulse width modulation techniques and space vector pulse width modulation. The proposed strategy uses symmetrical cell time switching sequences to realize the six current vectors and minimize harmonics. Analytical calculations and experimental results show the strategy provides wide dynamic range for the modulation index and high DC link utilization while maintaining low harmonic levels that satisfy industrial standards.
Pulse width modulation (PWM) is a more efficient technique than linear control for driving solenoids. PWM works by turning the signal on for part of its period and off for the rest, varying the duty cycle. If the duty cycle is shorter than the solenoid's rise time, the current will be discontinuous and not reach its maximum; if longer, the current will be continuous but have ripple. At high frequencies, the current becomes essentially constant by adjusting the duty cycle. Dither can also be added to counter stiction and hysteresis in hydraulic valves, producing small vibrations in the solenoid current. High frequency PWM allows independent control of current level and dither properties.
This paper addresses a novel approach for designing and modeling of the isolated
flyback converter. Modeling is done without parasitic as well as with parasitic components.
A detailed analysis, simulation and different control strategy are conferred for flyback
converter in continuous conduction mode (CCM). To verify the design and modeling at
primary stage, study of the converter is practiced in CCM operation for input AC voltage
230V at 50Hz and output DC voltage of 5V and 50W output power rating using PSIM 6.0
software. Simulation result shows a little ripple in output of the converter in open loop. Finally
in order to evaluate the system as well as response of the controller, flyback converter is
simulated using MATLAB. This work, highlighting the modeling when the system have
transformer and facilitate designers to go for it when they need one or more than one output
for a given application upto 150W
Investigation of THD for Cascaded Multi-Level Inverter Using Multicarrier Mod...IJERA Editor
This document summarizes an investigation into the total harmonic distortion (THD) of cascaded multi-level inverters using different multicarrier modulation techniques. It describes three modulation techniques - phase shifted multicarrier modulation (PSHM), level shifted multicarrier modulation (LSHM), and wave level shifted multicarrier modulation (WLSHM). Simulation results for 7-level, 9-level, 11-level, and 13-level inverters show that WLSHM achieves the lowest THD compared to the other techniques. The document concludes that WLSHM is the best modulation method for reducing THD in cascaded multi-level inverters.
Simplified svpwm algorithm for neutral point clamped 3 level inverter fed dtc...Asoka Technologies
In this paper, a simplified space vector pulse width modulation (SVPWM) method has been developed for three phase three-level voltage source inverter fed to direct torque controlled (DTC) induction motor drive. The space vector diagram of three-level inverter is simplified into two-level inverter. So the selection of switching sequences is done as conventional two-level SVPWM method.Where in conventional direct torque control (CDTC), the stator flux and torque are directly controlled by the selection of optimal switching modes. The selection is made to restrict the flux and torque errors in corresponding hysteresis bands. In spite of its fast torque response, it has more flux, torque and current ripples in steady state. To overcome the ripples in steady state, a space vector based pulse width modulation (SVPWM) methodology is proposed in this paper. The proposed SVPWM method reduces the computational burden and reduces the total harmonic distortion compared with 2-level one and the conventional one also. To strengthen the voice simulation is carried out and the corresponding results are presented.
This is collection of First Dozen of papers published by Mohd Esa
Mohd Esa, completed M.E. (Power Electronics systems) from Muffakham Jah College of Engineering and Technology, Banjarahills, Hyderabad in 2018. He received his B.E degree from Osmania University, Hyderabad. He was awarded gold medal twice for standing first in B.E. III/IV and B.E. IV/IV from Matrusri Engineering College, Sayeedabad, Hyderabad. He has published 12 research papers in various journals and conferences. He is Member of International Association of Engineers (IAENG), Hong Kong. His research of interests includes Multi level inverters and Multipliers. He is currently working as Junior Research Fellow.
IRJET- Simulation and Analysis of Five Level SPWM InverterIRJET Journal
This document summarizes the simulation and analysis of a five level single phase pulse width modulation (SPWM) inverter. The inverter circuit is divided into three parts: a gate driver circuit to generate control signals by comparing a triangular carrier wave and reference sine wave, the inverter circuit consisting of four IGBTs in an H-bridge configuration, and an external voltage control circuit to vary the collector-emitter voltage of the IGBTs. Simulation results show that a five level inverter produces a multi stepped output voltage waveform and reduces total harmonic distortion compared to a single level inverter, as determined by fast Fourier transform analysis. Higher level inverters could achieve even lower harmonic distortion.
Performance Evaluation of Three Phase Induction Motor using MOSFET & IGBT Bas...IRJET Journal
This document evaluates the performance of a three-phase induction motor driven by a voltage source inverter (VSI) using either MOSFET or IGBT power switches. MATLAB simulations are conducted to compare the total harmonic distortion (THD) of the output voltage, stator current, and rotor current for the two types of switches. The results show that the IGBT-based VSI has lower THD values for all outputs compared to the MOSFET-based VSI, indicating better performance and efficiency when using IGBT switches for the three-phase VSI driving the induction motor.
The aim of this paper is to determine the Total harmonic distortion (THD) of three phase three level flying capacitor inverter fed star connected R-L load. The modulation Techniques used is Phase Disposition Sinusoidal pulse width modulation (PD-SPWM) and Phase Opposition Disposition Sinusoidal pulse width modulation (POD-SPWM).The Modulation index is varied to analyze its effect on Current THD and Voltage THD.This paper also presents the comparison of PD-SPWM and POD-SPWM controlled Flying capacitor Inverter in terms of THD. The simulation result shows that PD-SPWM has better performance when compared to POD-SPWM. The simulation of circuit is done by using MATLAB/Simulink.
Alternating current (AC) electrical drives mainly require smaller current (or torque) ripples and lower total harmonic distortion (THD) of voltage for excellent drive performances. Normally, in practice, to achieve these requirements, the inverter needs to be operated at high switching frequency. By operating at high switching frequency, the size of filter can be reduced. However, the inverter which oftenly employs insulated gate bipolar transistor (IGBT) for high power applications cannot be operated at high switching frequency. This is because, the IGBT switching frequency cannot be operated above 50 kHz due to its thermal restrictions. This paper proposes an alternate switching strategy to enable the use of IGBT for operating the inverter at high switching frequency to improve THD performances. In this strategy, each IGBT in a group of switches in the modified inverter circuit will operate the switching frequency at one-fourth of the inverter switching frequency. The alternate switching is implemented using simple analog and digital integrated circuits.
The document discusses pulse width modulation (PWM) variable speed drives that are increasingly used in industrial applications. It describes how PWM is used to generate variable voltage and frequency for AC drives from a three-phase voltage source inverter. Space vector PWM (SVPWM) is highlighted as it provides superior harmonic quality and larger modulation range compared to sinusoidal PWM. SVPWM represents the inverter states as voltage space vectors to calculate duty cycles for adjacent vectors and zero vectors to synthesize the desired output voltage vector. The document outlines the theory of SVPWM and compares different sequencing methods. It also discusses simulations and advantages of PWM including proportional average value, fast switching, noise resistance and less heat.
This document summarizes research on pulse width modulation (PWM) techniques for three-phase inverters. It describes sinusoidal PWM switching schemes that allow control of output voltage magnitude and frequency. Simulation models of three-phase inverters using sawtooth and triangular carrier waveforms are presented and analyzed. The results show that a sawtooth carrier waveform produces a more appropriate three-phase voltage waveform compared to a triangular carrier waveform. In conclusion, sinusoidal PWM inverters can generate clean sinusoidal output voltages through comparison of reference and carrier signals to control switching.
International Journal of Engineering Research and Applications (IJERA) aims to cover the latest outstanding developments in the field of all Engineering Technologies & science.
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
A Refined Space Vector PWM Signal Generation for Multilevel InvertersIDES Editor
A refined space vector modulation scheme for
multilevel inverters, using only the instantaneous sampled
reference signals is presented in this paper. The proposed
space vector pulse width modulation technique does not require
the sector information and look-up tables to select the
appropriate switching vectors. The inverter leg switching times
are directly obtained from the instantaneous sampled
reference signal amplitudes and centers the switching times
for the middle space vectors in a sampling time interval, as in
the case of conventional space vector pulse width modulation.
The simulation results are presented to a five-level inverter
system for dual-fed induction motor drive. The dual-fed
structure is realized by opening the neutral-point of the
conventional squirrel cage induction motor. The five-level
inversion is obtained by feeding the dual-fed induction motor
with four-level inverter from one end and two-level inverter
from the other end.
Fast svm based 3 phase cascaded five level invertereSAT Journals
Abstract Introduction of nearest three vector algorithm is a major achievement in the area of space vector technology. Complexity and severe computations are still the drawbacks of SVM methods mainly for multilevel inverter applications. A fast SVM technique is introduced in this project which allows the calculation of switch time duration and the efficient determination of switching times based on the two level inverter scheme. SVM modulating waves are generated based on the two level system and then this modulating waves are compared with required number of carrier signals in order to generate the switching pulses for the inverter. Four triangular carrier signals are needed for a five level system in order to generate the switching pulses. Coordinates of the nearest three voltage vectors is not needed, so the complexity of the SVM technique can be reduced and it is the major advantage of the proposed technique compared with conventional SVM techniques used for multilevel inverters. A three phase five level cascaded H bridge topology is used here to verify the effectiveness of the proposed technique. MATLAB simulation and hardware implementation of the proposed system is done. From the analysis of both simulation and hardware it is clear that proposed SVM technique have more fundamental output and less THD than sinusoidal PWM technique. Key Words: Cascaded H bridge, Multilevel, Modulating wave, Space vector
Sinusoidal PWM has been a very popular technique used in AC motor control. This is a method that employs a triangular carrier wave modulated by a sine wave and the points of intersection determining the switching points of the power devices in the inverter.
Space Vector Modulation(SVM) Technique for PWM InverterPurushotam Kumar
This document discusses space vector pulse width modulation (SVM) for three-phase voltage source inverters. It begins by introducing SVM and its benefits over other PWM techniques, such as reduced total harmonic distortion. It then provides details on how SVM works, including transforming a three-phase reference signal to a rotating vector in the d-q reference frame. The document explains the eight possible switching states, sectors, and how to calculate switching times to synthesize the reference signal using adjacent active vectors and zero vectors. It concludes by comparing SVM to sinusoidal PWM, showing SVM offers better voltage utilization and harmonic performance.
IRJET- dsPIC based Implementation of Sinusoidal Pulse Width Modulation Techni...IRJET Journal
This document discusses the digital implementation of sinusoidal pulse width modulation (SPWM) techniques for controlling multilevel inverters using a microcontroller. It presents four SPWM techniques - phase disposition, phase opposition disposition, alternate phase opposition disposition, and inverted phase disposition - and how they can be realized digitally by fragmenting and shifting a reference sinusoidal wave in the microcontroller. Simulation and experimental results validating a five-level cascaded H-bridge inverter controlled by these SPWM techniques using a dsPIC microcontroller are also presented, including the total harmonic distortion achieved with each method.
THD analysis of SPWM & THPWM Controlled Three phase Voltage Source InverterIRJET Journal
This document analyzes and compares the total harmonic distortion (THD) of a three-phase voltage source inverter controlled by two modulation techniques: sinusoidal pulse width modulation (SPWM) and third harmonic pulse width modulation (THPWM). The simulation results show that THPWM has better performance than SPWM, with lower current and voltage THD values. Specifically, THPWM provides current THD below 2% and voltage THD below 55% across all tested carrier frequencies, while SPWM has higher THD, with minimum values of 2.06% for current and 65.98% for voltage. Therefore, THPWM is determined to produce output voltage and current of better quality compared to SPWM.
This document presents a comparative investigation of a 7-level cascaded multilevel inverter using different multicarrier pulse width modulation techniques. It discusses the classification, operation, and modulation strategies of multilevel inverters including diode clamped, flying capacitor, and cascaded H-bridge topologies. Simulation results in MATLAB/Simulink are presented to analyze the total harmonic distortion for a 7-level cascaded H-bridge multilevel inverter using phase disposition, alternate phase opposition disposition, and phase opposition disposition pulse width modulation techniques. The research aims to improve the output waveform quality and reduce switching losses of the 7-level inverter.
The document provides a final report on the design and implementation of a space vector modulated (SVM) three-phase inverter. It includes a discussion of SVM pulse width modulation theory, a computer simulation of sinusoidal PWM, and an implementation of the SVM technique. The implementation was broken into four modules: an inverter module, an inverter control module, a calculation module, and a user interface control module. Simulation results showed the SVM technique producing the desired three-phase output with minimized harmonics.
This document discusses the implementation of space vector pulse width modulation (SVPWM) for a three-phase voltage source inverter using a field programmable gate array (FPGA). SVPWM techniques offer benefits over traditional sinusoidal PWM like reduced total harmonic distortion and improved voltage transfer. The FPGA implementation involves developing VHDL code to determine the switching times of the inverter transistors based on the reference voltage vector. Simulation results show the output line voltages and currents generated by the FPGA-controlled inverter driving an induction motor load have low distortion. FPGA implementation provides advantages over microprocessors like compact size, reliability, and fast design changes.
The document proposes a switching strategy for space vector modulated current link inverters connected to the power grid. It discusses pulse width modulation techniques and space vector pulse width modulation. The proposed strategy uses symmetrical cell time switching sequences to realize the six current vectors and minimize harmonics. Analytical calculations and experimental results show the strategy provides wide dynamic range for the modulation index and high DC link utilization while maintaining low harmonic levels that satisfy industrial standards.
Pulse width modulation (PWM) is a more efficient technique than linear control for driving solenoids. PWM works by turning the signal on for part of its period and off for the rest, varying the duty cycle. If the duty cycle is shorter than the solenoid's rise time, the current will be discontinuous and not reach its maximum; if longer, the current will be continuous but have ripple. At high frequencies, the current becomes essentially constant by adjusting the duty cycle. Dither can also be added to counter stiction and hysteresis in hydraulic valves, producing small vibrations in the solenoid current. High frequency PWM allows independent control of current level and dither properties.
This paper addresses a novel approach for designing and modeling of the isolated
flyback converter. Modeling is done without parasitic as well as with parasitic components.
A detailed analysis, simulation and different control strategy are conferred for flyback
converter in continuous conduction mode (CCM). To verify the design and modeling at
primary stage, study of the converter is practiced in CCM operation for input AC voltage
230V at 50Hz and output DC voltage of 5V and 50W output power rating using PSIM 6.0
software. Simulation result shows a little ripple in output of the converter in open loop. Finally
in order to evaluate the system as well as response of the controller, flyback converter is
simulated using MATLAB. This work, highlighting the modeling when the system have
transformer and facilitate designers to go for it when they need one or more than one output
for a given application upto 150W
Investigation of THD for Cascaded Multi-Level Inverter Using Multicarrier Mod...IJERA Editor
This document summarizes an investigation into the total harmonic distortion (THD) of cascaded multi-level inverters using different multicarrier modulation techniques. It describes three modulation techniques - phase shifted multicarrier modulation (PSHM), level shifted multicarrier modulation (LSHM), and wave level shifted multicarrier modulation (WLSHM). Simulation results for 7-level, 9-level, 11-level, and 13-level inverters show that WLSHM achieves the lowest THD compared to the other techniques. The document concludes that WLSHM is the best modulation method for reducing THD in cascaded multi-level inverters.
Simplified svpwm algorithm for neutral point clamped 3 level inverter fed dtc...Asoka Technologies
In this paper, a simplified space vector pulse width modulation (SVPWM) method has been developed for three phase three-level voltage source inverter fed to direct torque controlled (DTC) induction motor drive. The space vector diagram of three-level inverter is simplified into two-level inverter. So the selection of switching sequences is done as conventional two-level SVPWM method.Where in conventional direct torque control (CDTC), the stator flux and torque are directly controlled by the selection of optimal switching modes. The selection is made to restrict the flux and torque errors in corresponding hysteresis bands. In spite of its fast torque response, it has more flux, torque and current ripples in steady state. To overcome the ripples in steady state, a space vector based pulse width modulation (SVPWM) methodology is proposed in this paper. The proposed SVPWM method reduces the computational burden and reduces the total harmonic distortion compared with 2-level one and the conventional one also. To strengthen the voice simulation is carried out and the corresponding results are presented.
This is collection of First Dozen of papers published by Mohd Esa
Mohd Esa, completed M.E. (Power Electronics systems) from Muffakham Jah College of Engineering and Technology, Banjarahills, Hyderabad in 2018. He received his B.E degree from Osmania University, Hyderabad. He was awarded gold medal twice for standing first in B.E. III/IV and B.E. IV/IV from Matrusri Engineering College, Sayeedabad, Hyderabad. He has published 12 research papers in various journals and conferences. He is Member of International Association of Engineers (IAENG), Hong Kong. His research of interests includes Multi level inverters and Multipliers. He is currently working as Junior Research Fellow.
IRJET- Simulation and Analysis of Five Level SPWM InverterIRJET Journal
This document summarizes the simulation and analysis of a five level single phase pulse width modulation (SPWM) inverter. The inverter circuit is divided into three parts: a gate driver circuit to generate control signals by comparing a triangular carrier wave and reference sine wave, the inverter circuit consisting of four IGBTs in an H-bridge configuration, and an external voltage control circuit to vary the collector-emitter voltage of the IGBTs. Simulation results show that a five level inverter produces a multi stepped output voltage waveform and reduces total harmonic distortion compared to a single level inverter, as determined by fast Fourier transform analysis. Higher level inverters could achieve even lower harmonic distortion.
Performance Evaluation of Three Phase Induction Motor using MOSFET & IGBT Bas...IRJET Journal
This document evaluates the performance of a three-phase induction motor driven by a voltage source inverter (VSI) using either MOSFET or IGBT power switches. MATLAB simulations are conducted to compare the total harmonic distortion (THD) of the output voltage, stator current, and rotor current for the two types of switches. The results show that the IGBT-based VSI has lower THD values for all outputs compared to the MOSFET-based VSI, indicating better performance and efficiency when using IGBT switches for the three-phase VSI driving the induction motor.
The aim of this paper is to determine the Total harmonic distortion (THD) of three phase three level flying capacitor inverter fed star connected R-L load. The modulation Techniques used is Phase Disposition Sinusoidal pulse width modulation (PD-SPWM) and Phase Opposition Disposition Sinusoidal pulse width modulation (POD-SPWM).The Modulation index is varied to analyze its effect on Current THD and Voltage THD.This paper also presents the comparison of PD-SPWM and POD-SPWM controlled Flying capacitor Inverter in terms of THD. The simulation result shows that PD-SPWM has better performance when compared to POD-SPWM. The simulation of circuit is done by using MATLAB/Simulink.
Alternating current (AC) electrical drives mainly require smaller current (or torque) ripples and lower total harmonic distortion (THD) of voltage for excellent drive performances. Normally, in practice, to achieve these requirements, the inverter needs to be operated at high switching frequency. By operating at high switching frequency, the size of filter can be reduced. However, the inverter which oftenly employs insulated gate bipolar transistor (IGBT) for high power applications cannot be operated at high switching frequency. This is because, the IGBT switching frequency cannot be operated above 50 kHz due to its thermal restrictions. This paper proposes an alternate switching strategy to enable the use of IGBT for operating the inverter at high switching frequency to improve THD performances. In this strategy, each IGBT in a group of switches in the modified inverter circuit will operate the switching frequency at one-fourth of the inverter switching frequency. The alternate switching is implemented using simple analog and digital integrated circuits.
IRJET- Modified Cascaded H - Bridge Multilevel Inverter for Household AppliancesIRJET Journal
This document describes a study on a modified cascaded H-bridge multilevel inverter for household appliances. The researchers developed a 9-level single phase inverter using 4 H-bridge cells. They used sinusoidal pulse width modulation to generate switching signals and reduce harmonic distortion. Simulations in MATLAB/Simulink showed the output voltage waveform and total harmonic distortion of 9.12%. A hardware prototype was built and tested to verify the design, demonstrating a 53.9V output voltage with 8.22% total harmonic distortion. The modified topology reduces switching losses and improves output capability compared to other multilevel inverter configurations.
IRJET - Comparison of Different Third Harmonic Injected PWM Strategies for 5-...IRJET Journal
This document compares three third harmonic injected PWM strategies for controlling a 5-level diode clamped inverter: THI-IPD, THI-APOD, and THI-POD. It discusses the inverter topology, describes how a third harmonic is added to the reference signal to increase the fundamental component, and outlines the three modulation strategies. Simulation and experimental results are presented to compare the performance of the strategies in terms of output voltage quality.
A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI) IJECEIAES
Since last decades, the pulse width modulation (PWM) techniques have been an intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage total harmonic distortion (THD), inverter maximum output of DC bus voltage. The Sinusoidal PWM is generally used to control the inverter output voltage and it helps to maintains drive performance. The recent years have seen digital modulation mechanisms based on theory of space vector i.e. Space vector PWM (SVPWM). The SVPWM mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with the reduction in the harmonics of inverter output voltage and reduced communication losses. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the performance and reliability of microprocessors has increased. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs. From the recent study, analysis gives that use of Field Programmable Gate Arrays (FPGA) can offer more efficient and faster solutions. This paper discusses the numerous existing research aspects of FPGA realization for voltage source inverter (VSI) along with the future line of research.
Reduction of Total Harmonic Distortion using Multipulse CycloconverterIRJET Journal
This document discusses reducing total harmonic distortion in cycloconverters by increasing the number of pulses. Cycloconverters are AC to AC converters used to control AC motors at low speeds, especially in high power applications. However, output power quality is a problem due to harmonic distortion. The document proposes a MATLAB/Simulink model of a cycloconverter with an increasing number of pulses to reduce total harmonic distortion. Comparison of simulation results with different pulse numbers will evaluate harmonic reduction. Firing pulses are controlled using cosine wave crossing. Increasing pulses rectifies the output waveform and nullifies harmonic effects, improving output power factor and power quality.
Implementation of Space Vector PWM for Hybrid DSTATCOMIRJET Journal
This document discusses the implementation of space vector pulse width modulation (SVPWM) for a hybrid distribution static compensator (DSTATCOM). SVPWM is considered superior to other PWM techniques for DSTATCOM as it allows for better utilization of the DC bus voltage. The paper proposes a DSTATCOM topology using a three-phase voltage source inverter with an LCL filter. It describes the SVPWM technique which aims to generate the desired output voltage vector from the inverter's six active state vectors and two null state vectors. Simulation results show that SVPWM improves current compensation and reduces harmonic distortion compared to an uncompensated system.
Design and Implementation of Two Stage Operational AmplifierIRJET Journal
The document describes the design and simulation of a two-stage operational amplifier using a 180nm CMOS process. It includes the circuit design of the differential gain stage, second gain stage, and biasing circuit. Simulation results show the op-amp achieves a gain of 98.98 dB, bandwidth of 2.22 MHz, phase margin of 81.507 degrees, CMRR of 104.21 dB, PSRR below -92.46 dB, input-referred noise of 14.099 uV/sqrt(Hz), and meets other performance specifications. The two-stage design provides high gain while optimizing speed, power consumption, and other parameters for low frequency applications.
Performance Evaluation of a Three Phase Nine Level Inverter with Reduced Sw...Scientific Review SR
This paper presents a three phase nine level cascaded H-bridge (CHB) multilevel inverter with RL load. A sinusoidal and trapezoidal PWM method is used to achieve minimum total harmonics distortion (THD) in the output current of multilevel inverters. The analysis of the output current harmonics is carried out and compared with the seven level conventional cascaded H-bridge inverters. The proposed inverter is verified through
simulation and the simulation results are compared with the conventional multilevel inverter. From the result the
proposed inverter offers much less total harmonic distortion
International Journal of Engineering and Science Invention (IJESI)inventionjournals
International Journal of Engineering and Science Invention (IJESI) is an international journal intended for professionals and researchers in all fields of computer science and electronics. IJESI publishes research articles and reviews within the whole field Engineering Science and Technology, new teaching methods, assessment, validation and the impact of new technologies and it will continue to provide information on the latest trends and developments in this ever-expanding subject. The publications of papers are selected through double peer reviewed to ensure originality, relevance, and readability. The articles published in our journal can be accessed online.
Simulation Investigation of SPWM, THIPWM and SVPWM Techniques for Three Phase...IJPEDS-IAES
This document summarizes and compares three pulse width modulation techniques - sinusoidal PWM (SPWM), third harmonic injection PWM (THIPWM), and space vector PWM (SVPWM) - for a three-phase voltage source inverter. SPWM is the simplest technique but has drawbacks like higher total harmonic distortion and lower switching frequency. THIPWM provides better THD than SPWM. SVPWM shows lower THD than both SPWM and THIPWM, especially in overmodulation regions and at high frequencies. The document presents the theoretical principles, simulation models, and results of the three techniques, showing that SVPWM achieves the best performance and meets current harmonic standards.
Power Quality Enhancement using Fuzzy Control Based DVRIRJET Journal
This document discusses power quality enhancement using fuzzy control based dynamic voltage restorer (DVR). It first describes harmonics and their impact on power quality in IEEE 14 bus system. It then summarizes the operation of unified power flow controller (UPFC) and DVR, two custom power devices used for mitigating power quality issues. UPFC is applied to IEEE 14 bus system and improves voltages. DVR with PI and fuzzy control is also applied to a test system, with fuzzy control achieving lower total harmonic distortion (THD) of 17.49% compared to 23.7% for PI control. In conclusion, custom power devices like UPFC and DVR along with different control strategies can effectively enhance power quality by reducing harmon
The document discusses multilevel inverters and their advantages over traditional inverters. It describes that multilevel inverters produce stepped AC signals that reduce harmonics. There are three main topologies discussed - diode clamped, flying capacitor, and cascaded H-bridge inverters. Diode clamped inverters use capacitors between DC links to create voltage levels, while flying capacitor uses capacitors instead of diodes. Cascaded H-bridge uses separate DC sources and single-phase H-bridge inverters to synthesize voltage waves. Total harmonic distortion is a key metric for inverter output quality, with multilevel inverters producing less distortion than traditional designs.
Closed Loop Analysis of Multilevel Inverter Fed Drives IJPEDS-IAES
This paper deals with the simulation and implementation of multilevel inverter for drives application. Here the focuses will be onimproving the efficiency of the multilevel inverter and quality of output voltage waveform. The circuit is developed towards high efficiency, high performance, and low cost, simple control scheme. Harmonics Elimination was implemented to reduce the Total Harmonics Distortion (THD) value which is achieved by selecting appropriate switching angles. In this paper to determine the performance of rectifier, steady state analysis is done. Furthermore, the merits of multilevel inverter topology are inherited.Closed loop control is done to analysis the stability of the system.
Two Level and Five Level Cascaded H-bridge Inverter Structure with Amplitude ...IJERA Editor
Inverters using pulse width modulation techniques generates common mode voltages in induction motor drives
which can cause shaft voltages and bearing currents resulting into failure of motor. A two level and five level
inverter topology with amplitude modulation technique is proposed in this paper which completely eliminates
the above problems. Also losses in switching devices and stress is reduced. Using proposed topology total
harmonic distortion (THD) is reduced and improved overall harmonic profile is achieved. The system is
modelled with the help of MATLAB Simulink software for two level and five level inverter with proposed AM
technique. Experimental results shown for the proposed topology which indicates lower total harmonic
distortion.
This document discusses selective harmonic elimination pulse width modulation (SHEPWM) for multilevel inverters using a generalized Hopfield neural network. It begins with an abstract that introduces multilevel inverters, SHEPWM, and the use of a generalized Hopfield neural network for SHEPWM. It then provides more details on the background and concepts of multilevel inverters, SHEPWM, and the Fourier expansion of the staircase output voltage waveform generated by multilevel inverters. The document focuses on applying SHEPWM to eliminate lower order harmonics from the output waveform using a generalized Hopfield neural network approach.
IRJET- Enhancement of Power Quality using DPFCIRJET Journal
This document discusses using a distributed power flow controller (DPFC) to improve power quality issues like voltage sag, current swell, and total harmonic distortion. It provides background on power quality and traditional methods used for improvement. The DPFC design and operation is explained, including how active power is exchanged between the shunt and series converters. Simulation results using MATLAB/Simulink show the DPFC with PI, fuzzy logic, and artificial neural network (ANN) controllers can mitigate power quality issues. Analysis of the total harmonic distortion results shows the ANN controller provides the best performance with the lowest distortion.
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Presentation of IEEE Slovenia CIS (Computational Intelligence Society) Chapte...University of Maribor
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Embedded machine learning-based road conditions and driving behavior monitoringIJECEIAES
Car accident rates have increased in recent years, resulting in losses in human lives, properties, and other financial costs. An embedded machine learning-based system is developed to address this critical issue. The system can monitor road conditions, detect driving patterns, and identify aggressive driving behaviors. The system is based on neural networks trained on a comprehensive dataset of driving events, driving styles, and road conditions. The system effectively detects potential risks and helps mitigate the frequency and impact of accidents. The primary goal is to ensure the safety of drivers and vehicles. Collecting data involved gathering information on three key road events: normal street and normal drive, speed bumps, circular yellow speed bumps, and three aggressive driving actions: sudden start, sudden stop, and sudden entry. The gathered data is processed and analyzed using a machine learning system designed for limited power and memory devices. The developed system resulted in 91.9% accuracy, 93.6% precision, and 92% recall. The achieved inference time on an Arduino Nano 33 BLE Sense with a 32-bit CPU running at 64 MHz is 34 ms and requires 2.6 kB peak RAM and 139.9 kB program flash memory, making it suitable for resource-constrained embedded systems.
DEEP LEARNING FOR SMART GRID INTRUSION DETECTION: A HYBRID CNN-LSTM-BASED MODELgerogepatton
As digital technology becomes more deeply embedded in power systems, protecting the communication
networks of Smart Grids (SG) has emerged as a critical concern. Distributed Network Protocol 3 (DNP3)
represents a multi-tiered application layer protocol extensively utilized in Supervisory Control and Data
Acquisition (SCADA)-based smart grids to facilitate real-time data gathering and control functionalities.
Robust Intrusion Detection Systems (IDS) are necessary for early threat detection and mitigation because
of the interconnection of these networks, which makes them vulnerable to a variety of cyberattacks. To
solve this issue, this paper develops a hybrid Deep Learning (DL) model specifically designed for intrusion
detection in smart grids. The proposed approach is a combination of the Convolutional Neural Network
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dataset (DNP3), which focuses on unauthorized commands and Denial of Service (DoS) cyberattacks, to
train and test our model. The results of our experiments show that our CNN-LSTM method is much better
at finding smart grid intrusions than other deep learning algorithms used for classification. In addition,
our proposed approach improves accuracy, precision, recall, and F1 score, achieving a high detection
accuracy rate of 99.50%.
Using recycled concrete aggregates (RCA) for pavements is crucial to achieving sustainability. Implementing RCA for new pavement can minimize carbon footprint, conserve natural resources, reduce harmful emissions, and lower life cycle costs. Compared to natural aggregate (NA), RCA pavement has fewer comprehensive studies and sustainability assessments.
KuberTENes Birthday Bash Guadalajara - K8sGPT first impressionsVictor Morales
K8sGPT is a tool that analyzes and diagnoses Kubernetes clusters. This presentation was used to share the requirements and dependencies to deploy K8sGPT in a local environment.
A SYSTEMATIC RISK ASSESSMENT APPROACH FOR SECURING THE SMART IRRIGATION SYSTEMSIJNSA Journal
The smart irrigation system represents an innovative approach to optimize water usage in agricultural and landscaping practices. The integration of cutting-edge technologies, including sensors, actuators, and data analysis, empowers this system to provide accurate monitoring and control of irrigation processes by leveraging real-time environmental conditions. The main objective of a smart irrigation system is to optimize water efficiency, minimize expenses, and foster the adoption of sustainable water management methods. This paper conducts a systematic risk assessment by exploring the key components/assets and their functionalities in the smart irrigation system. The crucial role of sensors in gathering data on soil moisture, weather patterns, and plant well-being is emphasized in this system. These sensors enable intelligent decision-making in irrigation scheduling and water distribution, leading to enhanced water efficiency and sustainable water management practices. Actuators enable automated control of irrigation devices, ensuring precise and targeted water delivery to plants. Additionally, the paper addresses the potential threat and vulnerabilities associated with smart irrigation systems. It discusses limitations of the system, such as power constraints and computational capabilities, and calculates the potential security risks. The paper suggests possible risk treatment methods for effective secure system operation. In conclusion, the paper emphasizes the significant benefits of implementing smart irrigation systems, including improved water conservation, increased crop yield, and reduced environmental impact. Additionally, based on the security analysis conducted, the paper recommends the implementation of countermeasures and security approaches to address vulnerabilities and ensure the integrity and reliability of the system. By incorporating these measures, smart irrigation technology can revolutionize water management practices in agriculture, promoting sustainability, resource efficiency, and safeguarding against potential security threats.
Low power architecture of logic gates using adiabatic techniquesnooriasukmaningtyas
The growing significance of portable systems to limit power consumption in ultra-large-scale-integration chips of very high density, has recently led to rapid and inventive progresses in low-power design. The most effective technique is adiabatic logic circuit design in energy-efficient hardware. This paper presents two adiabatic approaches for the design of low power circuits, modified positive feedback adiabatic logic (modified PFAL) and the other is direct current diode based positive feedback adiabatic logic (DC-DB PFAL). Logic gates are the preliminary components in any digital circuit design. By improving the performance of basic gates, one can improvise the whole system performance. In this paper proposed circuit design of the low power architecture of OR/NOR, AND/NAND, and XOR/XNOR gates are presented using the said approaches and their results are analyzed for powerdissipation, delay, power-delay-product and rise time and compared with the other adiabatic techniques along with the conventional complementary metal oxide semiconductor (CMOS) designs reported in the literature. It has been found that the designs with DC-DB PFAL technique outperform with the percentage improvement of 65% for NOR gate and 7% for NAND gate and 34% for XNOR gate over the modified PFAL techniques at 10 MHz respectively.