journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
This paper presents a study on a new full bridge series resonant converter (SRC) with wide zero voltage switching (ZVS) range, and higher output voltage. The high frequency transformer is connected in series with the LC series resonant tank. The tank inductance is therefore increased; all switches having the ability to turn on at ZVS, with lower switching frequency than the LC tank resonant frequency. Moreover, the step-up high frequency (HF) transformer design steps are introduced in order to increase the output voltage to overcome the gain limitation of the conventional SRC. Compared to the conventional SRC, the proposed converter has higher energy conversion, able to increase the ZVS range by 36%, and provide much higher output power. Finally, the a laboratory prototypes of the both converters with the same resonant tank parameters and input voltage are examined based on 1 and 2.2 kW power respectively, for veryfing the reliability of the performance and the operation principles of both converters.
Small Signal Modelling of a Buck Converter using State Space Averaging for Ma...paperpublications3
Abstract: Nowadays, step-down power converters such as buck scheme are widely employed in a variety of applications such as power supplies, spacecraft power systems, hybrid vehicles and power supplies in particle accelerators. This paper presents a comprehensive small-signal model for the DC-DC buck converter operated under Continuous Conduction Mode (CCM) for a magnetic load. Initially, the buck converter is modeled using state-space average model and dynamic equations, depicting the converter, are derived. The proposed model can be used to design powerful, precise and robust closed loop controller that can satisfy stability and performance conditions of the DC-DC buck regulator. This model can be used in any DC-DC converter (Buck, Boost, and Buck-Boost) by modifying the converter mathematical equations.
A Novel Hybrid Dstatcom Topology for Load Compensation with Non-Stiff SourceIJERA Editor
The distribution static compensator (DSTATCOM) is a shunt active filter, which injects currents into the point
of common coupling (PCC) (the common point where load, source, and DSTATCOM are connected) such that
the harmonic filtering, power factor correction, and load balancing can be achieved. The distribution static
compensator (DSTATCOM) is used for load compensation in power distribution network. A new topology for
DSTATCOM applications with non-stiff source is proposed. The proposed topology enables DSTATCOM to
have a reduced dc-link voltage without compromising the compensation capability. It uses a series capacitor
along with the interfacing inductor and a shunt filter capacitor. With the reduction in dc-link voltage, the
average switching frequency of the insulated gate bipolar transistor switches of the D-STATCOM is also
reduced. Consequently, the switching losses in the inverter are reduced. Detailed design aspects of the series and
shunt capacitors are discussed in this paper. A simulation study of the proposed topology has been carried out
using MATLAB environment and the results analyzed.
This paper presents a comprehensive and systematic approach in developing a new switching look-up table for direct power control (DPC) strategy applied to the three-phase grid connected three-level neutral-point clamped (3L-NPC) pulse width modulated (PWM) rectifier. The term of PWM rectifier used in this paper is also known as AC-DC converter. The approach provides detailed information regarding the effects of each multilevel converter space vector to the distribution of input active and reactive power in the converter system. Thus, the most optimal converter space vectors are able to be selected by the switching look-up table, allowing smooth control of the active and reactive powers for each sector. In addition, the proposed DPC utilizes an NPC capacitor balanced strategy to enhance the performance of front-end AC-DC converter during load and supply voltage disturbances. The steady state as well as the dynamic performances of the proposed DPC are presented and analyzed by using MATLAB/Simulink software. The results show that the AC-DC converter utilizing the new look-up table is able to produce almost sinusoidal line currents with lower current total harmonic distortion, unity power factor operation, adjustable DC-link output voltage and good dynamic response during load disturbance.
Improving the Stability of Cascaded DC Power Supply System by Adaptive Active...IJMER
Abstract: When all links are changes in the cascade is the corner of the shape in the dc division
energy orbit (DEO). When resistances are intermission betwixt one by one stylish changes in that
would possibly end up so the cascaded orbits are unsteady. They are antecedent we can place in a
nearer to the useful in the cascaded orbit can be got in compelled to vary the supply they have load
changes in the internal structure of the same regions in the electrical device they can be opposed in
a quality of the characteristic of dc DEO. Throughout the Associate in nursing adaptation active
device in the (AACC) we can know another determined in the cascaded orbit. Therefore the AACC
was connected by side by side in the cascaded orbit’s they can mediate in between the carries and
completely a requirement of a notice then they carries the voltage with none modification in this
subsystems. Then it will have a stylish to the customary have basic units to measuring in the dc
DEO. When the AACC is additionally a similar bus device to cut back the output resistance of the
supply device, therefore averting in a interiority have their load changes in the input resistance, of
the cascaded orbit have their solutions then they becomes constant. We have important carrier
device it will computing in the AACC adaptation in line with they have output energy to the
cascaded orbit, they have energy vesting in the AACC that’s way they will reduced and therefore
they have a lot of energy in a reacting to the orbit so it is a best in the orbit of a submissive device.
What\'s many, since no capacitance have a requirement among an AACC, when the cascaded orbits
have their quantity of it slowly it will extend in time. They have activity fundamental truth to stop
their magnificence thought in the AACC are mentioned throughout of this project, it can have four
thousand eight hundred and zero watts cascaded orbit was contain a strive of process to move in a
full-bridge changes they can be styli shed and evaluated. So when the simulation solutions have to
clear the performance of the arrangement of AACC.
Modeling and Analysis of Transformerless High Gain Buck-boost DC-DC ConvertersIAES-IJPEDS
This paper proposes a transfomerless switched capacitor buck boost converter model, which provides higher voltage gain and higher efficiency when compared to the conventional buck boost converter. The averaged model based on state- space description is analyzed in the paper. The simulation results are presented to confirm the capability of the converter to generate high voltage ratios. The comparison between the proposed model and the traditional model is also provided to reveal the improvement. The proposed converter is suitable for for a wide application which requires high step-up DC-DC converters such as DC micro-grids and solar electrical energy.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
This paper presents a study on a new full bridge series resonant converter (SRC) with wide zero voltage switching (ZVS) range, and higher output voltage. The high frequency transformer is connected in series with the LC series resonant tank. The tank inductance is therefore increased; all switches having the ability to turn on at ZVS, with lower switching frequency than the LC tank resonant frequency. Moreover, the step-up high frequency (HF) transformer design steps are introduced in order to increase the output voltage to overcome the gain limitation of the conventional SRC. Compared to the conventional SRC, the proposed converter has higher energy conversion, able to increase the ZVS range by 36%, and provide much higher output power. Finally, the a laboratory prototypes of the both converters with the same resonant tank parameters and input voltage are examined based on 1 and 2.2 kW power respectively, for veryfing the reliability of the performance and the operation principles of both converters.
Small Signal Modelling of a Buck Converter using State Space Averaging for Ma...paperpublications3
Abstract: Nowadays, step-down power converters such as buck scheme are widely employed in a variety of applications such as power supplies, spacecraft power systems, hybrid vehicles and power supplies in particle accelerators. This paper presents a comprehensive small-signal model for the DC-DC buck converter operated under Continuous Conduction Mode (CCM) for a magnetic load. Initially, the buck converter is modeled using state-space average model and dynamic equations, depicting the converter, are derived. The proposed model can be used to design powerful, precise and robust closed loop controller that can satisfy stability and performance conditions of the DC-DC buck regulator. This model can be used in any DC-DC converter (Buck, Boost, and Buck-Boost) by modifying the converter mathematical equations.
A Novel Hybrid Dstatcom Topology for Load Compensation with Non-Stiff SourceIJERA Editor
The distribution static compensator (DSTATCOM) is a shunt active filter, which injects currents into the point
of common coupling (PCC) (the common point where load, source, and DSTATCOM are connected) such that
the harmonic filtering, power factor correction, and load balancing can be achieved. The distribution static
compensator (DSTATCOM) is used for load compensation in power distribution network. A new topology for
DSTATCOM applications with non-stiff source is proposed. The proposed topology enables DSTATCOM to
have a reduced dc-link voltage without compromising the compensation capability. It uses a series capacitor
along with the interfacing inductor and a shunt filter capacitor. With the reduction in dc-link voltage, the
average switching frequency of the insulated gate bipolar transistor switches of the D-STATCOM is also
reduced. Consequently, the switching losses in the inverter are reduced. Detailed design aspects of the series and
shunt capacitors are discussed in this paper. A simulation study of the proposed topology has been carried out
using MATLAB environment and the results analyzed.
This paper presents a comprehensive and systematic approach in developing a new switching look-up table for direct power control (DPC) strategy applied to the three-phase grid connected three-level neutral-point clamped (3L-NPC) pulse width modulated (PWM) rectifier. The term of PWM rectifier used in this paper is also known as AC-DC converter. The approach provides detailed information regarding the effects of each multilevel converter space vector to the distribution of input active and reactive power in the converter system. Thus, the most optimal converter space vectors are able to be selected by the switching look-up table, allowing smooth control of the active and reactive powers for each sector. In addition, the proposed DPC utilizes an NPC capacitor balanced strategy to enhance the performance of front-end AC-DC converter during load and supply voltage disturbances. The steady state as well as the dynamic performances of the proposed DPC are presented and analyzed by using MATLAB/Simulink software. The results show that the AC-DC converter utilizing the new look-up table is able to produce almost sinusoidal line currents with lower current total harmonic distortion, unity power factor operation, adjustable DC-link output voltage and good dynamic response during load disturbance.
Improving the Stability of Cascaded DC Power Supply System by Adaptive Active...IJMER
Abstract: When all links are changes in the cascade is the corner of the shape in the dc division
energy orbit (DEO). When resistances are intermission betwixt one by one stylish changes in that
would possibly end up so the cascaded orbits are unsteady. They are antecedent we can place in a
nearer to the useful in the cascaded orbit can be got in compelled to vary the supply they have load
changes in the internal structure of the same regions in the electrical device they can be opposed in
a quality of the characteristic of dc DEO. Throughout the Associate in nursing adaptation active
device in the (AACC) we can know another determined in the cascaded orbit. Therefore the AACC
was connected by side by side in the cascaded orbit’s they can mediate in between the carries and
completely a requirement of a notice then they carries the voltage with none modification in this
subsystems. Then it will have a stylish to the customary have basic units to measuring in the dc
DEO. When the AACC is additionally a similar bus device to cut back the output resistance of the
supply device, therefore averting in a interiority have their load changes in the input resistance, of
the cascaded orbit have their solutions then they becomes constant. We have important carrier
device it will computing in the AACC adaptation in line with they have output energy to the
cascaded orbit, they have energy vesting in the AACC that’s way they will reduced and therefore
they have a lot of energy in a reacting to the orbit so it is a best in the orbit of a submissive device.
What\'s many, since no capacitance have a requirement among an AACC, when the cascaded orbits
have their quantity of it slowly it will extend in time. They have activity fundamental truth to stop
their magnificence thought in the AACC are mentioned throughout of this project, it can have four
thousand eight hundred and zero watts cascaded orbit was contain a strive of process to move in a
full-bridge changes they can be styli shed and evaluated. So when the simulation solutions have to
clear the performance of the arrangement of AACC.
Modeling and Analysis of Transformerless High Gain Buck-boost DC-DC ConvertersIAES-IJPEDS
This paper proposes a transfomerless switched capacitor buck boost converter model, which provides higher voltage gain and higher efficiency when compared to the conventional buck boost converter. The averaged model based on state- space description is analyzed in the paper. The simulation results are presented to confirm the capability of the converter to generate high voltage ratios. The comparison between the proposed model and the traditional model is also provided to reveal the improvement. The proposed converter is suitable for for a wide application which requires high step-up DC-DC converters such as DC micro-grids and solar electrical energy.
A Modern Technique of Deduction in Leakage Current in Resonant Bi-directional...IJMTST Journal
This Paper Presents A whole New resonant twin active bridge(DAB) topology, that uses a tuned inductor-capacitor-inductor(LCL) network. As compared to ancient DAB topologies, the planned topologies significantly reduced the bridge current, lowering every physical phenomenon and alter losses and conjointly VA rating associated with the bridges. The performance of the DAB is investigated using a mathematical model at a lower place varied operational conditions. Experiment results of a model is reduced the outflow current of the circuit. are presented with discussion to demonstrate the improved performance of the LCL DAB topology. Result clearly that the planned DAB Topology provide higher efficiency over an oversized vary of every input voltage and as compared to ancient DAB topology
Control Method for Unified Power Quality Conditioner Using Fuzzy Based Nine-S...IJERA Editor
A nine-switch power converter having two sets of out-put terminals was recently proposed in place of the
traditional back-to-back power converter that uses 12 switches in total. The nine-switch converter has already
been proven to have certain advantages, in addition to its component saving topological feature. Despite these
advantages, the nine-switch converter has so far found limited applications due to its many perceived
performance tradeoffs like requiring an oversized dc-link capacitor, limited amplitude sharing, and constrained
phase shift between its two sets of output terminals. Instead of accepting these tradeoffs as limitations, a nineswitch
power conditioner is proposed here that virtually “converts” most of these topological short comings into
interesting performance advantages. Aiming further to reduce its switching losses, an appropriate discontinuous
modulation scheme is proposed and studied here in detail to doubly ensure that maxi-mal reduction of
commutations is achieved. With an appropriately designed control scheme then incorporated, the nine-switch
converter is shown to favorably raise the overall power quality in experiment, hence justifying its role as a
power conditioner at a reduced semiconductor cost.
A Novel Control Method for Unified Power Quality Conditioner Using Nine-Switc...IJERA Editor
A nine-switch power converter having two sets of out-put terminals was recently proposed in place of the traditional back-to-back power converter that uses 12 switches in total. The nine-switch converter has already been proven to have certain advantages, in addition to its component saving topological feature. Despite these advantages, the nine-switch converter has so far found limited applications due to its many perceived performance tradeoffs like requiring an oversized dc-link capacitor, limited amplitude sharing, and constrained phase shift between its two sets of output terminals. Instead of accepting these tradeoffs as limitations, a nine-switch power conditioner is proposed here that virtually “converts” most of these topological short comings into interesting performance advantages. Aiming further to reduce its switching losses, an appropriate discontinuous modulation scheme is proposed and studied here in detail to doubly ensure that maxi-mal reduction of commutations is achieved. With an appropriately designed control scheme then incorporated, the nine-switch converter is shown to favorably raise the overall power quality in experiment, hence justifying its role as a power conditioner at a reduced semiconductor cost.
POWER COMPARISON OF CMOS AND ADIABATIC FULL ADDER CIRCUITSVLSICS Design
Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. Apart from the basic addition adders also used in performing useful operations such as subtraction, multiplication, division, address calculation, etc. In most of these systemsthe adder lies in the critical path that determines the overall performance of the system. In this paper conventional complementary metal oxide emiconductor (CMOS) and adiabatic adder circuits are analyzed in terms of power and transistor count using 0.18UM technology.
Mitigation of Power Quality Issues by Nine Switches UPQC Using PI & ANN with ...IJERA Editor
A nine-switch power converter having two sets of output terminals was recently proposed in place of the traditional back-to-back power converter that uses 12 switches in total. The nine-switch converter has already been proven to have certain advantages, in addition to its component saving topological feature. Despite these advantages, the nine-switch converter has so far found limited applications due to its many perceived performance tradeoffs like requiring an oversized dc-link capacitor, limited amplitude sharing, and constrained phase shift between its two sets of output terminals. Instead of accepting these tradeoffs as limitations, a nine-switch power conditioner is proposed here that virtually ―converts‖ most of these topological short comings into interesting performance advantages. Aiming further to reduce its switching losses, Harmonics, Voltage Sag & Swell an appropriate discontinuous modulation scheme is proposed and studied here in detail to doubly ensure that maximal reduction of commutations is achieved. With an appropriately designed control scheme with PI and ANN with Hysteresis controller then incorporated, the nine-switch converter is shown to favorably raise the overall power quality in Simulation, hence justifying its role as a power conditioner at a reduced cost.
A three-phase bidirectional isolated dc-dc converter consists of two six-pulse two-level active converters that enable bidirectional power flow by introducing a lag phase-shift angle of one converter with respect to the other converter. This paper explains the operating modes of a three-phase bidirectional isolated dc-dc converter in detail, taking into account the transfer of energy between the dc voltage sources and high-frequency ac inductances in the three-phase bidirectional isolated dc-dc converter. The power flow of the dc-dc converter is also examined based on the operating modes.
Development of a Novel Three Phase Grid-Tied Multilevel Inverter TopologyIAES-IJPEDS
The conventional line-commutated ac-to-dc converters/ inverters have square-shaped line current. It contains higher-order harmonics which generates EMI and it causes more heating of the core of distribution or power transformers. PWM based inverters using MOSFET/IGBT have higher switching losses, and the power handling capability and reliability are quite low in comparison to thyristors/ SCR. A thyristor based forced commutated inverters are not suitable for PWM applications due to the problems of commutation circuits. A pure sinusoidal voltage output or waveform with low harmonic contents is most desirable for ac load using dc to ac conversion. This paper presents a new multilevel inverter topology in which three phase ac- to-dc converter circuits are used in inversion mode by controlling the switching angle. Due to natural commutation, no separate circuit is required for synchronization. In this paper simulation and analysis are done for grid-tied three-phase 6-pulse, Two three-phase, 3-pulse and 12-pulse converter. These converters are analysed for different battery voltage and different switching angle combinations in order to reduce the total harmonic distortion (THD). Three-phase harmonic filters are further added to the grid side to reduce the harmonic content in the line current. A comparative study of these converters is also presented in this paper.
1 ijaems oct-2015-3-design and development of novel matrix converter performanceINFOGAIN PUBLICATION
Matrix converter is a direct AC-AC converter topology that directly converts energy from an AC source to an AC load without the need of a bulky and limited lifetime energy storage element. Due to the significant advantages offered by matrix converter, such as adjustable power factor, capability of regeneration and high quality sinusoidal input/output waveforms. Matrix converter has been one of the AC–AC topologies that hasreceived extensive research attention for being an alternative to replace traditional AC-DC-AC converters in the variable voltage and variable frequency AC drive applications. In the present paper an indirect space vector modulated matrix converter is proposed. The basic idea of an indirect modulation scheme is to separately apply SVM to the rectification and inversion stages, before combining their switching states to produce the final gating signals. The paper encompasses development of a laboratory prototype of 230V, 250VA three phase to three phase DSP controlled matrix converter fed induction motor drive. The observations and real time testings have been carried out to evaluate and improve the stability of system under various typical abnormal input voltage conditions
This paper presents a new simplified cascade multiphase DC-DC buck power converter suitable for low voltage and large current applications. Cascade connection enables very low voltage ratio without using very small duty cycles nor transformers. Large current with very low ripple content is achieved by using the multiphase technique. The proposed converter needs smaller number of components compared to conventional cascade multiphase DC-DC buck power converters. This paper also presents useful analysis of the proposed DC-DC buck power converter with a method to optimize the phase and cascade number. Simulation and experimental results are included to verify the basic performance of the proposed DC-DC buck power converter.
DG FED MULTILEVEL INVERTER BASED D-STATCOM FOR VARIOUS LOADING CONDITIONSIJCI JOURNAL
During the past few decades, power industries have proved that the adverse impacts on the PQ can be
mitigated or avoided by conventional means, and that technique using fast controlled force commutated
power electronics (PE) are even more effective. PQ compensators can be categorized into two main types.
One is shunt connected compensation device that effectively eliminates harmonics. The other is the series
connected device, which has an edge over the shunt type for correcting the distorted system side voltages
and voltage sags caused by power transmission system faults. The STATCOM used in distribution systems
is called DSTACOM (Distribution-STACOM) and its configuration is the same, but with small
modifications. Recent advances in the power-handling capabilities of static switch devices such as 3.3kV,
4.5kV, and 6.5kV Insulated Gate Bipolar Transistors (IGBTs) with voltage rating commercially available,
have made the use of the voltage source inverters (VSI) feasible for high-power applications. High power
and high-voltage conversion systems have become very important issues for the power electronic industry
handling the large ac drive and electrical power applications at both the transmission and distribution
levels. For these reasons, new families of multilevel inverters have emerged as the solution for working
with higher voltage levels. Multilevel inverters (MLI) include an array of power semiconductors and
capacitor voltage sources, the output of which generate voltages with stepped waveforms. These converter
topologies can generate high-quality voltage waveforms with power semiconductor switches operating at a
frequency near the fundamental. It significantly reduces the harmonics problem with reduced voltage stress
across the switch. This research work is mainly focusing on application of multilevel DSTATCOM for
power quality improvement in distribution system with integration of RES. Matlab/Simulink based model is
developed and simulation results are presented.
The transmission of electric power has to take place in the most efficient way in addition to providing flexibility in the process. Flexible A.C. Transmission System (FACTS) promotes the use of static controllers to enhance the controllability and increase the power transfer capability. Providing reactive shunt compensation with shunt-connected capacitors and reactors is a well-established technique to get a better voltage profile in a power system. Shunt Capacitors are inexpensive but lack dynamic capabilities, thus some form of dynamically controlled reactive power compensation becomes essential. In this paper, three phase Distribution Static Var Compensator (D-SVC) has been developed and studied under different conditions. Open loop mode and closed loop mode of operation of D-SVC is simulated and studied. The work presented here is very much useful for distribution system, for effective reactive power management and better Voltage control.
Electrical, Electronics and Computer Engineering,
Information Engineering and Technology,
Mechanical, Industrial and Manufacturing Engineering,
Automation and Mechatronics Engineering,
Material and Chemical Engineering,
Civil and Architecture Engineering,
Biotechnology and Bio Engineering,
Environmental Engineering,
Petroleum and Mining Engineering,
Marine and Agriculture engineering,
Aerospace Engineering.
A Novel Control Strategy of Indirect Matrix Converter Using Space Vector Modu...IJPEDS-IAES
This paper introduces a control scheme of Indirect Matrix Converter which includes space vector modulation to stabilize the frequency variations. The terminal voltage and frequency of any synchronous machine can be controlled easily with this scheme. Further the control strategy is proposed and implemented in Matlab/Simulink Embedded system which gives significant better performance compared to conventional control technique like better Total Harmonic Distortion (THD), more output voltage with same Modulation Index, less switching stress and less switching loss. This method might prove effective for wind energy conversion system using DFIG as the DFIG speed is close to synchronous speed. The complete control strategy is verified using MATLAB/Simulink.
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
A Modern Technique of Deduction in Leakage Current in Resonant Bi-directional...IJMTST Journal
This Paper Presents A whole New resonant twin active bridge(DAB) topology, that uses a tuned inductor-capacitor-inductor(LCL) network. As compared to ancient DAB topologies, the planned topologies significantly reduced the bridge current, lowering every physical phenomenon and alter losses and conjointly VA rating associated with the bridges. The performance of the DAB is investigated using a mathematical model at a lower place varied operational conditions. Experiment results of a model is reduced the outflow current of the circuit. are presented with discussion to demonstrate the improved performance of the LCL DAB topology. Result clearly that the planned DAB Topology provide higher efficiency over an oversized vary of every input voltage and as compared to ancient DAB topology
Control Method for Unified Power Quality Conditioner Using Fuzzy Based Nine-S...IJERA Editor
A nine-switch power converter having two sets of out-put terminals was recently proposed in place of the
traditional back-to-back power converter that uses 12 switches in total. The nine-switch converter has already
been proven to have certain advantages, in addition to its component saving topological feature. Despite these
advantages, the nine-switch converter has so far found limited applications due to its many perceived
performance tradeoffs like requiring an oversized dc-link capacitor, limited amplitude sharing, and constrained
phase shift between its two sets of output terminals. Instead of accepting these tradeoffs as limitations, a nineswitch
power conditioner is proposed here that virtually “converts” most of these topological short comings into
interesting performance advantages. Aiming further to reduce its switching losses, an appropriate discontinuous
modulation scheme is proposed and studied here in detail to doubly ensure that maxi-mal reduction of
commutations is achieved. With an appropriately designed control scheme then incorporated, the nine-switch
converter is shown to favorably raise the overall power quality in experiment, hence justifying its role as a
power conditioner at a reduced semiconductor cost.
A Novel Control Method for Unified Power Quality Conditioner Using Nine-Switc...IJERA Editor
A nine-switch power converter having two sets of out-put terminals was recently proposed in place of the traditional back-to-back power converter that uses 12 switches in total. The nine-switch converter has already been proven to have certain advantages, in addition to its component saving topological feature. Despite these advantages, the nine-switch converter has so far found limited applications due to its many perceived performance tradeoffs like requiring an oversized dc-link capacitor, limited amplitude sharing, and constrained phase shift between its two sets of output terminals. Instead of accepting these tradeoffs as limitations, a nine-switch power conditioner is proposed here that virtually “converts” most of these topological short comings into interesting performance advantages. Aiming further to reduce its switching losses, an appropriate discontinuous modulation scheme is proposed and studied here in detail to doubly ensure that maxi-mal reduction of commutations is achieved. With an appropriately designed control scheme then incorporated, the nine-switch converter is shown to favorably raise the overall power quality in experiment, hence justifying its role as a power conditioner at a reduced semiconductor cost.
POWER COMPARISON OF CMOS AND ADIABATIC FULL ADDER CIRCUITSVLSICS Design
Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. Apart from the basic addition adders also used in performing useful operations such as subtraction, multiplication, division, address calculation, etc. In most of these systemsthe adder lies in the critical path that determines the overall performance of the system. In this paper conventional complementary metal oxide emiconductor (CMOS) and adiabatic adder circuits are analyzed in terms of power and transistor count using 0.18UM technology.
Mitigation of Power Quality Issues by Nine Switches UPQC Using PI & ANN with ...IJERA Editor
A nine-switch power converter having two sets of output terminals was recently proposed in place of the traditional back-to-back power converter that uses 12 switches in total. The nine-switch converter has already been proven to have certain advantages, in addition to its component saving topological feature. Despite these advantages, the nine-switch converter has so far found limited applications due to its many perceived performance tradeoffs like requiring an oversized dc-link capacitor, limited amplitude sharing, and constrained phase shift between its two sets of output terminals. Instead of accepting these tradeoffs as limitations, a nine-switch power conditioner is proposed here that virtually ―converts‖ most of these topological short comings into interesting performance advantages. Aiming further to reduce its switching losses, Harmonics, Voltage Sag & Swell an appropriate discontinuous modulation scheme is proposed and studied here in detail to doubly ensure that maximal reduction of commutations is achieved. With an appropriately designed control scheme with PI and ANN with Hysteresis controller then incorporated, the nine-switch converter is shown to favorably raise the overall power quality in Simulation, hence justifying its role as a power conditioner at a reduced cost.
A three-phase bidirectional isolated dc-dc converter consists of two six-pulse two-level active converters that enable bidirectional power flow by introducing a lag phase-shift angle of one converter with respect to the other converter. This paper explains the operating modes of a three-phase bidirectional isolated dc-dc converter in detail, taking into account the transfer of energy between the dc voltage sources and high-frequency ac inductances in the three-phase bidirectional isolated dc-dc converter. The power flow of the dc-dc converter is also examined based on the operating modes.
Development of a Novel Three Phase Grid-Tied Multilevel Inverter TopologyIAES-IJPEDS
The conventional line-commutated ac-to-dc converters/ inverters have square-shaped line current. It contains higher-order harmonics which generates EMI and it causes more heating of the core of distribution or power transformers. PWM based inverters using MOSFET/IGBT have higher switching losses, and the power handling capability and reliability are quite low in comparison to thyristors/ SCR. A thyristor based forced commutated inverters are not suitable for PWM applications due to the problems of commutation circuits. A pure sinusoidal voltage output or waveform with low harmonic contents is most desirable for ac load using dc to ac conversion. This paper presents a new multilevel inverter topology in which three phase ac- to-dc converter circuits are used in inversion mode by controlling the switching angle. Due to natural commutation, no separate circuit is required for synchronization. In this paper simulation and analysis are done for grid-tied three-phase 6-pulse, Two three-phase, 3-pulse and 12-pulse converter. These converters are analysed for different battery voltage and different switching angle combinations in order to reduce the total harmonic distortion (THD). Three-phase harmonic filters are further added to the grid side to reduce the harmonic content in the line current. A comparative study of these converters is also presented in this paper.
1 ijaems oct-2015-3-design and development of novel matrix converter performanceINFOGAIN PUBLICATION
Matrix converter is a direct AC-AC converter topology that directly converts energy from an AC source to an AC load without the need of a bulky and limited lifetime energy storage element. Due to the significant advantages offered by matrix converter, such as adjustable power factor, capability of regeneration and high quality sinusoidal input/output waveforms. Matrix converter has been one of the AC–AC topologies that hasreceived extensive research attention for being an alternative to replace traditional AC-DC-AC converters in the variable voltage and variable frequency AC drive applications. In the present paper an indirect space vector modulated matrix converter is proposed. The basic idea of an indirect modulation scheme is to separately apply SVM to the rectification and inversion stages, before combining their switching states to produce the final gating signals. The paper encompasses development of a laboratory prototype of 230V, 250VA three phase to three phase DSP controlled matrix converter fed induction motor drive. The observations and real time testings have been carried out to evaluate and improve the stability of system under various typical abnormal input voltage conditions
This paper presents a new simplified cascade multiphase DC-DC buck power converter suitable for low voltage and large current applications. Cascade connection enables very low voltage ratio without using very small duty cycles nor transformers. Large current with very low ripple content is achieved by using the multiphase technique. The proposed converter needs smaller number of components compared to conventional cascade multiphase DC-DC buck power converters. This paper also presents useful analysis of the proposed DC-DC buck power converter with a method to optimize the phase and cascade number. Simulation and experimental results are included to verify the basic performance of the proposed DC-DC buck power converter.
DG FED MULTILEVEL INVERTER BASED D-STATCOM FOR VARIOUS LOADING CONDITIONSIJCI JOURNAL
During the past few decades, power industries have proved that the adverse impacts on the PQ can be
mitigated or avoided by conventional means, and that technique using fast controlled force commutated
power electronics (PE) are even more effective. PQ compensators can be categorized into two main types.
One is shunt connected compensation device that effectively eliminates harmonics. The other is the series
connected device, which has an edge over the shunt type for correcting the distorted system side voltages
and voltage sags caused by power transmission system faults. The STATCOM used in distribution systems
is called DSTACOM (Distribution-STACOM) and its configuration is the same, but with small
modifications. Recent advances in the power-handling capabilities of static switch devices such as 3.3kV,
4.5kV, and 6.5kV Insulated Gate Bipolar Transistors (IGBTs) with voltage rating commercially available,
have made the use of the voltage source inverters (VSI) feasible for high-power applications. High power
and high-voltage conversion systems have become very important issues for the power electronic industry
handling the large ac drive and electrical power applications at both the transmission and distribution
levels. For these reasons, new families of multilevel inverters have emerged as the solution for working
with higher voltage levels. Multilevel inverters (MLI) include an array of power semiconductors and
capacitor voltage sources, the output of which generate voltages with stepped waveforms. These converter
topologies can generate high-quality voltage waveforms with power semiconductor switches operating at a
frequency near the fundamental. It significantly reduces the harmonics problem with reduced voltage stress
across the switch. This research work is mainly focusing on application of multilevel DSTATCOM for
power quality improvement in distribution system with integration of RES. Matlab/Simulink based model is
developed and simulation results are presented.
The transmission of electric power has to take place in the most efficient way in addition to providing flexibility in the process. Flexible A.C. Transmission System (FACTS) promotes the use of static controllers to enhance the controllability and increase the power transfer capability. Providing reactive shunt compensation with shunt-connected capacitors and reactors is a well-established technique to get a better voltage profile in a power system. Shunt Capacitors are inexpensive but lack dynamic capabilities, thus some form of dynamically controlled reactive power compensation becomes essential. In this paper, three phase Distribution Static Var Compensator (D-SVC) has been developed and studied under different conditions. Open loop mode and closed loop mode of operation of D-SVC is simulated and studied. The work presented here is very much useful for distribution system, for effective reactive power management and better Voltage control.
Electrical, Electronics and Computer Engineering,
Information Engineering and Technology,
Mechanical, Industrial and Manufacturing Engineering,
Automation and Mechatronics Engineering,
Material and Chemical Engineering,
Civil and Architecture Engineering,
Biotechnology and Bio Engineering,
Environmental Engineering,
Petroleum and Mining Engineering,
Marine and Agriculture engineering,
Aerospace Engineering.
A Novel Control Strategy of Indirect Matrix Converter Using Space Vector Modu...IJPEDS-IAES
This paper introduces a control scheme of Indirect Matrix Converter which includes space vector modulation to stabilize the frequency variations. The terminal voltage and frequency of any synchronous machine can be controlled easily with this scheme. Further the control strategy is proposed and implemented in Matlab/Simulink Embedded system which gives significant better performance compared to conventional control technique like better Total Harmonic Distortion (THD), more output voltage with same Modulation Index, less switching stress and less switching loss. This method might prove effective for wind energy conversion system using DFIG as the DFIG speed is close to synchronous speed. The complete control strategy is verified using MATLAB/Simulink.
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
International Journal of Engineering Research and Development (IJERD)IJERD Editor
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
Five control algorithms are presented in this paper for STATCOM that meets the requirement of load reactive power and correspondingly voltage balancing of isolated dc capacitors for H-bridges. The control techniques used for an inverter in this paper are Sinusoidal Phase Shifted Carrier (SPSC) PWM, Sinusoidal Phase Disposition (SPD) PWM Third Harmonic Injected Phase Shifted Carrier (THIPSC) PWM, Space Vector Phase Shifted Carrier (SVPSC) PWM, and Space Vector Phase Disposition (SVPD) PWM techniques. The STATCOM performance for the different load changes is simulated in MATLAB environment. The performance parameters such as balancing the DC link voltage, THD for the STATCOM output currents, voltages, and reactive components supplied by the STATCOM to the load are compared for all the control strategies.
COMPREHENSIVE ANALYSIS AND SIMULATION OF MULTILEVEL POWER CONVERTERS TO CURTA...ecij
Present day industrial applications require higher power apparatus for power conversion. At medium voltage grid, to connect only one power semiconductor switch directly is a not practically successful concept. To overcome this multilevel power converter structure has been introduced and studied as an alternative in high power and medium voltage applications. Renewable energy sources like photovoltaic, wind, fuel cells can be conveniently interfaced to a multilevel converter system for high power applications. In this study it is discussed in detail for different levels of the multilevel converters using pulse width
modulation technique (PWM) the harmonics contents decreases gradually. The simulated results are presented and compared thereafter. Total harmonic distortion decreases as the number of levels increased are tabulated accordingly. All the simulation results are carried out under MATLAB/Simulink environment.
COMPREHENSIVE ANALYSIS AND SIMULATION OF MULTILEVEL POWER CONVERTERS TO CURTA...ecij
Present day industrial applications require higher power apparatus for power conversion. At medium
voltage grid, to connect only one power semiconductor switch directly is a not practically successful
concept. To overcome this multilevel power converter structure has been introduced and studied as an
alternative in high power and medium voltage applications. Renewable energy sources like photovoltaic,
wind, fuel cells can be conveniently interfaced to a multilevel converter system for high power applications.
In this study it is discussed in detail for different levels of the multilevel converters using pulse width
modulation technique (PWM) the harmonics contents decreases gradually. The simulated results are
presented and compared thereafter. Total harmonic distortion decreases as the number of levels increased
are tabulated accordingly. All the simulation results are carried out under MATLAB/Simulink environment.
Voltage Control of Single-Phase Two Winding Self Excited Induction Generator ...IJPEDS-IAES
Single-phase induction generator is very suitable to be used in the typical loads which only need a single-phase power supply with small power capacity requirement, such as diesel engine, picohydro or small wind plant. It has some advantages such as rugged, effective cost, maintenance free and require no external excitation. However, it has inductive characteristic which makes poor voltage regulation. This paper proposed a shunt reactive compensator called SVC-MERS which can provide a variable reactive power to maintain the generator voltage despite of load variations. The experiment was conducted on single-phase two winding induction generator coupled by a three-phase induction motor which serves as the prime mover. SVC-MERS and the load are connected in shunt to the main winding, while the excitation capacitor was connected to the auxiliary winding. The experimental results showed that SVC-MERS can improve voltage regulation and substantially enhanced steady state loading limit.
Design & Simulation Of 3-Phase, 15-Level Inverter with Reverse Voltage TopologyIJERA Editor
Multilevel inverters have been widely accepted for high-power high-voltage applications. Their performance is highly superior to that of conventional Seven-level inverters due to reduced harmonic distortion, lower electromagnetic interference, and higher dc link voltages. In this paper, a new topology with a reversing-voltage component is proposed to improve the multilevel performance. This topology requires fewer components compared to existing inverters (particularly in higher levels) and requires fewer carrier signals and gate drives. Therefore, thecomplexity is greatly reduced particularly for higher output voltage levels. The Proposed 15-level inverter is modelled and simulated in Matlab 2012a using Simulink and Sim Power Systems set tool boxes
A New Configuration of Asymmetric Multilevel Converter to Maximize the Number...IJMTST Journal
The multilevel converters are increasingly becoming popular because of its high power applications. This research paper describes about the new structure that can produce increased number of output voltage waveform using a single source and reduced number of power electronic components. In designing a multilevel converter, the power electronic switches play a very imperative role as it describes the installation area, cost, configuration complexity and may more things that play a significant role while designing. The prime function of multilevel converter is to abolish total harmonic distortion and to incorporate desired ac voltage from several separate dc sources. Each level consists of H-Bridge converter units. High efficiency, high voltage capability, lower switching losses are its prime advantages. A multilevel power converter structure can be introduced as an alternative in medium voltage and high power situations. This structure not only achieves high power ratings but also empower the use of renewable energy sources. It finds its basic application in adjustable speed drives, Static Compensator (STATCOM).
A Novel Control Method for Unified Power Quality Conditioner Using Nine-Switc...IJERA Editor
A nine-switch power converter having two sets of out-put terminals was recently proposed in place of the traditional back-to-back power converter that uses 12 switches in total. The nine-switch converter has already been proven to have certain advantages, in addition to its component saving topological feature. Despite these advantages, the nine-switch converter has so far found limited applications due to its many perceived performance tradeoffs like requiring an oversized dc-link capacitor, limited amplitude sharing, and constrained phase shift between its two sets of output terminals. Instead of accepting these tradeoffs as limitations, a nine-switch power conditioner is proposed here that virtually “converts” most of these topological short comings into interesting performance advantages. Aiming further to reduce its switching losses, an appropriate discontinuous modulation scheme is proposed and studied here in detail to doubly ensure that maxi-mal reduction of commutations is achieved. With an appropriately designed control scheme then incorporated, the nine-switch converter is shown to favorably raise the overall power quality in experiment, hence justifying its role as a power conditioner at a reduced semiconductor cost.
Investigation of TTMC-SVPWM Strategies for Diode Clamped and Cascaded H-bridg...ijeei-iaes
This paper presents a concept of two types multilevel inverters such as diode clamped and cascaded H-bridge for harmonic reduction on high power applications. Normally, multilevel inverters can be used to reduce the harmonic problems in electrical distribution systems. This paer focused on the performance and analysis of a three phase seven level inverter including diode clamped and cascaded H-bridge based on new tripizodal triangular space vector PWM technique approaches. TTMC based modified Space vector Pulse width modulation technique so called tripizodal triangular Space vector Pulse width modulation (TTMC-SVPWM) technique. In this paper the reference sine wave generated as in case of conventional off set injected SVPWM technique. It is observed that the TTMC-Space vector pulse width modulation ensures excellent, close to optimized pulse distribution results and THD is compared to seven level, diode clamped and cascaded multi level inverters. Theoretical investigations were confirmed by the digital simulations using MATLAB/SIMULINK software.
A Novel Integrated AC-DC Five Level Converter Strategy for Power Factor Corre...IJMTST Journal
Multilevel configuration has the advantage of its simplicity and modularity over the configurations of the other converters. With the application of multilevel converter in the high voltage and large power occasions in recent years, its modulation strategy has become a research hot point in the field of power electronics. The proposed power-factor-correction circuit can achieve unity power factor and ripple-free input current using a coupled inductor. The proposed rectifier can also produce input currents that do not have dead band regions and an output current that is continuous for all load conditions. The features of this converter are that it has lower input section peak current stresses and a better harmonic content than similar converter with a non-interleaved output, the output current is continuous for all load ranges, and the dc bus voltage is less than 450 for all line and load conditions. In this paper, the operation of the new converter is explained, its steady-state characteristics are determined by analysis, and these characteristics are used to develop a procedure for the design of the converter. Hence the simulation results are obtained using MATLAB/SIMULINK software. The proposed system provides a closed loop control for variable output voltage. The SSPFC AC/DC converter can operate with lower peak voltage stresses across the switches and the DC bus capacitors as it is a three-level converter. The proposed concept can be implemented with 5-level for efficient output voltage.
To overcome the problem of mismatched voltage levels between parallel-connected low voltage photovoltaic (PV)
arrays and the higher grid voltage, a hybrid boost three level dc-dc converter is developed based on three level inverter with
the traditional single phase diode clamping. Only one inductor, two capacitors in series, and those power switches and diodes,
which are easy to be integrated, are used for establish the topology with transformerless high voltage gain. The operation
principle of the topology is analyzed, and then the pulse width modulation (PWM) control method is obtained according to
the switching functions about the output pulse voltages of both half-bridges. Therefore, the converter can not only operate
with high voltage gain, but also make the duty cycles of power switches closer to 0.5. A feedforward closed loop control
operation is proposed such that even in varying input the converter is capable of giving a constant output. Finally an
experimental is set up in the laboratory for open loop control operation. All experimental results verify the feasibility of the
circuit and validity of the PWM control method.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Similar to International Journal of Engineering Research and Development (IJERD) (20)
A Novel Method for Prevention of Bandwidth Distributed Denial of Service AttacksIJERD Editor
Distributed Denial of Service (DDoS) Attacks became a massive threat to the Internet. Traditional
Architecture of internet is vulnerable to the attacks like DDoS. Attacker primarily acquire his army of Zombies,
then that army will be instructed by the Attacker that when to start an attack and on whom the attack should be
done. In this paper, different techniques which are used to perform DDoS Attacks, Tools that were used to
perform Attacks and Countermeasures in order to detect the attackers and eliminate the Bandwidth Distributed
Denial of Service attacks (B-DDoS) are reviewed. DDoS Attacks were done by using various Flooding
techniques which are used in DDoS attack.
The main purpose of this paper is to design an architecture which can reduce the Bandwidth
Distributed Denial of service Attack and make the victim site or server available for the normal users by
eliminating the zombie machines. Our Primary focus of this paper is to dispute how normal machines are
turning into zombies (Bots), how attack is been initiated, DDoS attack procedure and how an organization can
save their server from being a DDoS victim. In order to present this we implemented a simulated environment
with Cisco switches, Routers, Firewall, some virtual machines and some Attack tools to display a real DDoS
attack. By using Time scheduling, Resource Limiting, System log, Access Control List and some Modular
policy Framework we stopped the attack and identified the Attacker (Bot) machines
Hearing loss is one of the most common human impairments. It is estimated that by year 2015 more
than 700 million people will suffer mild deafness. Most can be helped by hearing aid devices depending on the
severity of their hearing loss. This paper describes the implementation and characterization details of a dual
channel transmitter front end (TFE) for digital hearing aid (DHA) applications that use novel micro
electromechanical- systems (MEMS) audio transducers and ultra-low power-scalable analog-to-digital
converters (ADCs), which enable a very-low form factor, energy-efficient implementation for next-generation
DHA. The contribution of the design is the implementation of the dual channel MEMS microphones and powerscalable
ADC system.
Influence of tensile behaviour of slab on the structural Behaviour of shear c...IJERD Editor
-A composite beam is composed of a steel beam and a slab connected by means of shear connectors
like studs installed on the top flange of the steel beam to form a structure behaving monolithically. This study
analyzes the effects of the tensile behavior of the slab on the structural behavior of the shear connection like slip
stiffness and maximum shear force in composite beams subjected to hogging moment. The results show that the
shear studs located in the crack-concentration zones due to large hogging moments sustain significantly smaller
shear force and slip stiffness than the other zones. Moreover, the reduction of the slip stiffness in the shear
connection appears also to be closely related to the change in the tensile strain of rebar according to the increase
of the load. Further experimental and analytical studies shall be conducted considering variables such as the
reinforcement ratio and the arrangement of shear connectors to achieve efficient design of the shear connection
in composite beams subjected to hogging moment.
Gold prospecting using Remote Sensing ‘A case study of Sudan’IJERD Editor
Gold has been extracted from northeast Africa for more than 5000 years, and this may be the first
place where the metal was extracted. The Arabian-Nubian Shield (ANS) is an exposure of Precambrian
crystalline rocks on the flanks of the Red Sea. The crystalline rocks are mostly Neoproterozoic in age. ANS
includes the nations of Israel, Jordan. Egypt, Saudi Arabia, Sudan, Eritrea, Ethiopia, Yemen, and Somalia.
Arabian Nubian Shield Consists of juvenile continental crest that formed between 900 550 Ma, when intra
oceanic arc welded together along ophiolite decorated arc. Primary Au mineralization probably developed in
association with the growth of intra oceanic arc and evolution of back arc. Multiple episodes of deformation
have obscured the primary metallogenic setting, but at least some of the deposits preserve evidence that they
originate as sea floor massive sulphide deposits.
The Red Sea Hills Region is a vast span of rugged, harsh and inhospitable sector of the Earth with
inimical moon-like terrain, nevertheless since ancient times it is famed to be an abode of gold and was a major
source of wealth for the Pharaohs of ancient Egypt. The Pharaohs old workings have been periodically
rediscovered through time. Recent endeavours by the Geological Research Authority of Sudan led to the
discovery of a score of occurrences with gold and massive sulphide mineralizations. In the nineties of the
previous century the Geological Research Authority of Sudan (GRAS) in cooperation with BRGM utilized
satellite data of Landsat TM using spectral ratio technique to map possible mineralized zones in the Red Sea
Hills of Sudan. The outcome of the study mapped a gossan type gold mineralization. Band ratio technique was
applied to Arbaat area and a signature of alteration zone was detected. The alteration zones are commonly
associated with mineralization. The alteration zones are commonly associated with mineralization. A filed check
confirmed the existence of stock work of gold bearing quartz in the alteration zone. Another type of gold
mineralization that was discovered using remote sensing is the gold associated with metachert in the Atmur
Desert.
Reducing Corrosion Rate by Welding DesignIJERD Editor
The paper addresses the importance of welding design to prevent corrosion at steel. Welding is
used to join pipe, profiles at bridges, spindle, and a lot more part of engineering construction. The
problems happened associated with welding are common issues in these fields, especially corrosion.
Corrosion can be reduced with many methods, they are painting, controlling humidity, and also good
welding design. In the research, it can be found that reducing residual stress on the welding can be
solved in corrosion rate reduction problem.
Preheating on 500oC and 600oC give better condition to reduce corosion rate than condition after
preheating 400oC. For all welding groove type, material with 500oC and 600oC preheating after 14 days
corrosion test is 0,5%-0,69% lost. Material with 400oC preheating after 14 days corrosion test is 0,57%-0,76%
lost.
Welding groove also influence corrosion rate. X and V type welding groove give better condition to reduce
corrosion rate than use 1/2V and 1/2 X welding groove. After 14 days corrosion test, the samples with
X welding groove type is 0,5%-0,57% lost. The samples with V welding groove after 14 days corrosion test is
0,51%-0,59% lost. The samples with 1/2V and 1/2X welding groove after 14 days corrosion test is 0,58%-
0,71% lost.
Router 1X3 – RTL Design and VerificationIJERD Editor
Routing is the process of moving a packet of data from source to destination and enables messages
to pass from one computer to another and eventually reach the target machine. A router is a networking device
that forwards data packets between computer networks. It is connected to two or more data lines from different
networks (as opposed to a network switch, which connects data lines from one single network). This paper,
mainly emphasizes upon the study of router device, it‟s top level architecture, and how various sub-modules of
router i.e. Register, FIFO, FSM and Synchronizer are synthesized, and simulated and finally connected to its top
module.
Active Power Exchange in Distributed Power-Flow Controller (DPFC) At Third Ha...IJERD Editor
This paper presents a component within the flexible ac-transmission system (FACTS) family, called
distributed power-flow controller (DPFC). The DPFC is derived from the unified power-flow controller (UPFC)
with an eliminated common dc link. The DPFC has the same control capabilities as the UPFC, which comprise
the adjustment of the line impedance, the transmission angle, and the bus voltage. The active power exchange
between the shunt and series converters, which is through the common dc link in the UPFC, is now through the
transmission lines at the third-harmonic frequency. DPFC multiple small-size single-phase converters which
reduces the cost of equipment, no voltage isolation between phases, increases redundancy and there by
reliability increases. The principle and analysis of the DPFC are presented in this paper and the corresponding
simulation results that are carried out on a scaled prototype are also shown.
Mitigation of Voltage Sag/Swell with Fuzzy Control Reduced Rating DVRIJERD Editor
Power quality has been an issue that is becoming increasingly pivotal in industrial electricity
consumers point of view in recent times. Modern industries employ Sensitive power electronic equipments,
control devices and non-linear loads as part of automated processes to increase energy efficiency and
productivity. Voltage disturbances are the most common power quality problem due to this the use of a large
numbers of sophisticated and sensitive electronic equipment in industrial systems is increased. This paper
discusses the design and simulation of dynamic voltage restorer for improvement of power quality and
reduce the harmonics distortion of sensitive loads. Power quality problem is occurring at non-standard
voltage, current and frequency. Electronic devices are very sensitive loads. In power system voltage sag,
swell, flicker and harmonics are some of the problem to the sensitive load. The compensation capability
of a DVR depends primarily on the maximum voltage injection ability and the amount of stored
energy available within the restorer. This device is connected in series with the distribution feeder at
medium voltage. A fuzzy logic control is used to produce the gate pulses for control circuit of DVR and the
circuit is simulated by using MATLAB/SIMULINK software.
Study on the Fused Deposition Modelling In Additive ManufacturingIJERD Editor
Additive manufacturing process, also popularly known as 3-D printing, is a process where a product
is created in a succession of layers. It is based on a novel materials incremental manufacturing philosophy.
Unlike conventional manufacturing processes where material is removed from a given work price to derive the
final shape of a product, 3-D printing develops the product from scratch thus obviating the necessity to cut away
materials. This prevents wastage of raw materials. Commonly used raw materials for the process are ABS
plastic, PLA and nylon. Recently the use of gold, bronze and wood has also been implemented. The complexity
factor of this process is 0% as in any object of any shape and size can be manufactured.
Spyware triggering system by particular string valueIJERD Editor
This computer programme can be used for good and bad purpose in hacking or in any general
purpose. We can say it is next step for hacking techniques such as keylogger and spyware. Once in this system if
user or hacker store particular string as a input after that software continually compare typing activity of user
with that stored string and if it is match then launch spyware programme.
A Blind Steganalysis on JPEG Gray Level Image Based on Statistical Features a...IJERD Editor
This paper presents a blind steganalysis technique to effectively attack the JPEG steganographic
schemes i.e. Jsteg, F5, Outguess and DWT Based. The proposed method exploits the correlations between
block-DCTcoefficients from intra-block and inter-block relation and the statistical moments of characteristic
functions of the test image is selected as features. The features are extracted from the BDCT JPEG 2-array.
Support Vector Machine with cross-validation is implemented for the classification.The proposed scheme gives
improved outcome in attacking.
Secure Image Transmission for Cloud Storage System Using Hybrid SchemeIJERD Editor
- Data over the cloud is transferred or transmitted between servers and users. Privacy of that
data is very important as it belongs to personal information. If data get hacked by the hacker, can be
used to defame a person’s social data. Sometimes delay are held during data transmission. i.e. Mobile
communication, bandwidth is low. Hence compression algorithms are proposed for fast and efficient
transmission, encryption is used for security purposes and blurring is used by providing additional
layers of security. These algorithms are hybridized for having a robust and efficient security and
transmission over cloud storage system.
Application of Buckley-Leverett Equation in Modeling the Radius of Invasion i...IJERD Editor
A thorough review of existing literature indicates that the Buckley-Leverett equation only analyzes
waterflood practices directly without any adjustments on real reservoir scenarios. By doing so, quite a number
of errors are introduced into these analyses. Also, for most waterflood scenarios, a radial investigation is more
appropriate than a simplified linear system. This study investigates the adoption of the Buckley-Leverett
equation to estimate the radius invasion of the displacing fluid during waterflooding. The model is also adopted
for a Microbial flood and a comparative analysis is conducted for both waterflooding and microbial flooding.
Results shown from the analysis doesn’t only records a success in determining the radial distance of the leading
edge of water during the flooding process, but also gives a clearer understanding of the applicability of
microbes to enhance oil production through in-situ production of bio-products like bio surfactans, biogenic
gases, bio acids etc.
Gesture Gaming on the World Wide Web Using an Ordinary Web CameraIJERD Editor
- Gesture gaming is a method by which users having a laptop/pc/x-box play games using natural or
bodily gestures. This paper presents a way of playing free flash games on the internet using an ordinary webcam
with the help of open source technologies. Emphasis in human activity recognition is given on the pose
estimation and the consistency in the pose of the player. These are estimated with the help of an ordinary web
camera having different resolutions from VGA to 20mps. Our work involved giving a 10 second documentary to
the user on how to play a particular game using gestures and what are the various kinds of gestures that can be
performed in front of the system. The initial inputs of the RGB values for the gesture component is obtained by
instructing the user to place his component in a red box in about 10 seconds after the short documentary before
the game is finished. Later the system opens the concerned game on the internet on popular flash game sites like
miniclip, games arcade, GameStop etc and loads the game clicking at various places and brings the state to a
place where the user is to perform only gestures to start playing the game. At any point of time the user can call
off the game by hitting the esc key and the program will release all of the controls and return to the desktop. It
was noted that the results obtained using an ordinary webcam matched that of the Kinect and the users could
relive the gaming experience of the free flash games on the net. Therefore effective in game advertising could
also be achieved thus resulting in a disruptive growth to the advertising firms.
Hardware Analysis of Resonant Frequency Converter Using Isolated Circuits And...IJERD Editor
-LLC resonant frequency converter is basically a combo of series as well as parallel resonant ckt. For
LCC resonant converter it is associated with a disadvantage that, though it has two resonant frequencies, the
lower resonant frequency is in ZCS region[5]. For this application, we are not able to design the converter
working at this resonant frequency. LLC resonant converter existed for a very long time but because of
unknown characteristic of this converter it was used as a series resonant converter with basically a passive
(resistive) load. . Here, it was designed to operate in switching frequency higher than resonant frequency of the
series resonant tank of Lr and Cr converter acts very similar to Series Resonant Converter. The benefit of LLC
resonant converter is narrow switching frequency range with light load[6] . Basically, the control ckt plays a
very imp. role and hence 555 Timer used here provides a perfect square wave as the control ckt provides no
slew rate which makes the square wave really strong and impenetrable. The dead band circuit provides the
exclusive dead band in micro seconds so as to avoid the simultaneous firing of two pairs of IGBT’s where one
pair switches off and the other on for a slightest period of time. Hence, the isolator ckt here is associated with
each and every ckt used because it acts as a driver and an isolation to each of the IGBT is provided with one
exclusive transformer supply[3]. The IGBT’s are fired using the appropriate signal using the previous boards
and hence at last a high frequency rectifier ckt with a filtering capacitor is used to get an exact dc
waveform .The basic goal of this particular analysis is to observe the wave forms and characteristics of
converters with differently positioned passive elements in the form of tank circuits.
Simulated Analysis of Resonant Frequency Converter Using Different Tank Circu...IJERD Editor
LLC resonant frequency converter is basically a combo of series as well as parallel resonant ckt. For
LCC resonant converter it is associated with a disadvantage that, though it has two resonant frequencies, the
lower resonant frequency is in ZCS region [5]. For this application, we are not able to design the converter
working at this resonant frequency. LLC resonant converter existed for a very long time but because of
unknown characteristic of this converter it was used as a series resonant converter with basically a passive
(resistive) load. . Here, it was designed to operate in switching frequency higher than resonant frequency of the
series resonant tank of Lr and Cr converter acts very similar to Series Resonant Converter. The benefit of LLC
resonant converter is narrow switching frequency range with light load[6] . Basically, the control ckt plays a
very imp. role and hence 555 Timer used here provides a perfect square wave as the control ckt provides no
slew rate which makes the square wave really strong and impenetrable. The dead band circuit provides the
exclusive dead band in micro seconds so as to avoid the simultaneous firing of two pairs of IGBT’s where one
pair switches off and the other on for a slightest period of time. Hence, the isolator ckt here is associated with
each and every ckt used because it acts as a driver and an isolation to each of the IGBT is provided with one
exclusive transformer supply[3]. The IGBT’s are fired using the appropriate signal using the previous boards
and hence at last a high frequency rectifier ckt with a filtering capacitor is used to get an exact dc
waveform .The basic goal of this particular analysis is to observe the wave forms and characteristics of
converters with differently positioned passive elements in the form of tank circuits. The supported simulation
is done through PSIM 6.0 software tool
Amateurs Radio operator, also known as HAM communicates with other HAMs through Radio
waves. Wireless communication in which Moon is used as natural satellite is called Moon-bounce or EME
(Earth -Moon-Earth) technique. Long distance communication (DXing) using Very High Frequency (VHF)
operated amateur HAM radio was difficult. Even with the modest setup having good transceiver, power
amplifier and high gain antenna with high directivity, VHF DXing is possible. Generally 2X11 YAGI antenna
along with rotor to set horizontal and vertical angle is used. Moon tracking software gives exact location,
visibility of Moon at both the stations and other vital data to acquire real time position of moon.
“MS-Extractor: An Innovative Approach to Extract Microsatellites on „Y‟ Chrom...IJERD Editor
Simple Sequence Repeats (SSR), also known as Microsatellites, have been extensively used as
molecular markers due to their abundance and high degree of polymorphism. The nucleotide sequences of
polymorphic forms of the same gene should be 99.9% identical. So, Microsatellites extraction from the Gene is
crucial. However, Microsatellites repeat count is compared, if they differ largely, he has some disorder. The Y
chromosome likely contains 50 to 60 genes that provide instructions for making proteins. Because only males
have the Y chromosome, the genes on this chromosome tend to be involved in male sex determination and
development. Several Microsatellite Extractors exist and they fail to extract microsatellites on large data sets of
giga bytes and tera bytes in size. The proposed tool “MS-Extractor: An Innovative Approach to extract
Microsatellites on „Y‟ Chromosome” can extract both Perfect as well as Imperfect Microsatellites from large
data sets of human genome „Y‟. The proposed system uses string matching with sliding window approach to
locate Microsatellites and extracts them.
Importance of Measurements in Smart GridIJERD Editor
- The need to get reliable supply, independence from fossil fuels, and capability to provide clean
energy at a fixed and lower cost, the existing power grid structure is transforming into Smart Grid. The
development of a smart energy distribution grid is a current goal of many nations. A Smart Grid should have
new capabilities such as self-healing, high reliability, energy management, and real-time pricing. This new era
of smart future grid will lead to major changes in existing technologies at generation, transmission and
distribution levels. The incorporation of renewable energy resources and distribution generators in the existing
grid will increase the complexity, optimization problems and instability of the system. This will lead to a
paradigm shift in the instrumentation and control requirements for Smart Grids for high quality, stable and
reliable electricity supply of power. The monitoring of the grid system state and stability relies on the
availability of reliable measurement of data. In this paper the measurement areas that highlight new
measurement challenges, development of the Smart Meters and the critical parameters of electric energy to be
monitored for improving the reliability of power systems has been discussed.
Study of Macro level Properties of SCC using GGBS and Lime stone powderIJERD Editor
One of the major environmental concerns is the disposal of the waste materials and utilization of
industrial by products. Lime stone quarries will produce millions of tons waste dust powder every year. Having
considerable high degree of fineness in comparision to cement this material may be utilized as a partial
replacement to cement. For this purpose an experiment is conducted to investigate the possibility of using lime
stone powder in the production of SCC with combined use GGBS and how it affects the fresh and mechanical
properties of SCC. First SCC is made by replacing cement with GGBS in percentages like 10, 20, 30, 40, 50 and
by taking the optimum mix with GGBS lime stone powder is blended to mix in percentages like 5, 10, 15, 20 as
a partial replacement to cement. Test results shows that the SCC mix with combination of 30% GGBS and 15%
limestone powder gives maximum compressive strength and fresh properties are also in the limits prescribed by
the EFNARC.
Company Valuation webinar series - Tuesday, 4 June 2024FelixPerez547899
This session provided an update as to the latest valuation data in the UK and then delved into a discussion on the upcoming election and the impacts on valuation. We finished, as always with a Q&A
Implicitly or explicitly all competing businesses employ a strategy to select a mix
of marketing resources. Formulating such competitive strategies fundamentally
involves recognizing relationships between elements of the marketing mix (e.g.,
price and product quality), as well as assessing competitive and market conditions
(i.e., industry structure in the language of economics).
Affordable Stationery Printing Services in Jaipur | Navpack n PrintNavpack & Print
Looking for professional printing services in Jaipur? Navpack n Print offers high-quality and affordable stationery printing for all your business needs. Stand out with custom stationery designs and fast turnaround times. Contact us today for a quote!
RMD24 | Retail media: hoe zet je dit in als je geen AH of Unilever bent? Heid...BBPMedia1
Grote partijen zijn al een tijdje onderweg met retail media. Ondertussen worden in dit domein ook de kansen zichtbaar voor andere spelers in de markt. Maar met die kansen ontstaan ook vragen: Zelf retail media worden of erop adverteren? In welke fase van de funnel past het en hoe integreer je het in een mediaplan? Wat is nu precies het verschil met marketplaces en Programmatic ads? In dit half uur beslechten we de dilemma's en krijg je antwoorden op wanneer het voor jou tijd is om de volgende stap te zetten.
Recruiting in the Digital Age: A Social Media MasterclassLuanWise
In this masterclass, presented at the Global HR Summit on 5th June 2024, Luan Wise explored the essential features of social media platforms that support talent acquisition, including LinkedIn, Facebook, Instagram, X (formerly Twitter) and TikTok.
The world of search engine optimization (SEO) is buzzing with discussions after Google confirmed that around 2,500 leaked internal documents related to its Search feature are indeed authentic. The revelation has sparked significant concerns within the SEO community. The leaked documents were initially reported by SEO experts Rand Fishkin and Mike King, igniting widespread analysis and discourse. For More Info:- https://news.arihantwebtech.com/search-disrupted-googles-leaked-documents-rock-the-seo-world/
The key differences between the MDR and IVDR in the EUAllensmith572606
In the European Union (EU), two significant regulations have been introduced to enhance the safety and effectiveness of medical devices – the In Vitro Diagnostic Regulation (IVDR) and the Medical Device Regulation (MDR).
https://mavenprofserv.com/comparison-and-highlighting-of-the-key-differences-between-the-mdr-and-ivdr-in-the-eu/
Discover the innovative and creative projects that highlight my journey throu...dylandmeas
Discover the innovative and creative projects that highlight my journey through Full Sail University. Below, you’ll find a collection of my work showcasing my skills and expertise in digital marketing, event planning, and media production.
Buy Verified PayPal Account | Buy Google 5 Star Reviewsusawebmarket
Buy Verified PayPal Account
Looking to buy verified PayPal accounts? Discover 7 expert tips for safely purchasing a verified PayPal account in 2024. Ensure security and reliability for your transactions.
PayPal Services Features-
🟢 Email Access
🟢 Bank Added
🟢 Card Verified
🟢 Full SSN Provided
🟢 Phone Number Access
🟢 Driving License Copy
🟢 Fasted Delivery
Client Satisfaction is Our First priority. Our services is very appropriate to buy. We assume that the first-rate way to purchase our offerings is to order on the website. If you have any worry in our cooperation usually You can order us on Skype or Telegram.
24/7 Hours Reply/Please Contact
usawebmarketEmail: support@usawebmarket.com
Skype: usawebmarket
Telegram: @usawebmarket
WhatsApp: +1(218) 203-5951
USA WEB MARKET is the Best Verified PayPal, Payoneer, Cash App, Skrill, Neteller, Stripe Account and SEO, SMM Service provider.100%Satisfection granted.100% replacement Granted.
Cracking the Workplace Discipline Code Main.pptxWorkforce Group
Cultivating and maintaining discipline within teams is a critical differentiator for successful organisations.
Forward-thinking leaders and business managers understand the impact that discipline has on organisational success. A disciplined workforce operates with clarity, focus, and a shared understanding of expectations, ultimately driving better results, optimising productivity, and facilitating seamless collaboration.
Although discipline is not a one-size-fits-all approach, it can help create a work environment that encourages personal growth and accountability rather than solely relying on punitive measures.
In this deck, you will learn the significance of workplace discipline for organisational success. You’ll also learn
• Four (4) workplace discipline methods you should consider
• The best and most practical approach to implementing workplace discipline.
• Three (3) key tips to maintain a disciplined workplace.
Improving profitability for small businessBen Wann
In this comprehensive presentation, we will explore strategies and practical tips for enhancing profitability in small businesses. Tailored to meet the unique challenges faced by small enterprises, this session covers various aspects that directly impact the bottom line. Attendees will learn how to optimize operational efficiency, manage expenses, and increase revenue through innovative marketing and customer engagement techniques.
At Techbox Square, in Singapore, we're not just creative web designers and developers, we're the driving force behind your brand identity. Contact us today.
Personal Brand Statement:
As an Army veteran dedicated to lifelong learning, I bring a disciplined, strategic mindset to my pursuits. I am constantly expanding my knowledge to innovate and lead effectively. My journey is driven by a commitment to excellence, and to make a meaningful impact in the world.
International Journal of Engineering Research and Development (IJERD)
1. International Journal of Engineering Research and Development
e-ISSN: 2278-067X, p-ISSN: 2278-800X, www.ijerd.com
Volume 8, Issue 5 (August 2013), PP. 26-36
26
Quasi-Three-Level and Five-Level Operation of A Diode-
Clamped Multilevel Inverter Using Space Vector
Modulation
1
k.Rajesh, 2
k.Vijaya Bhaskar,
1
PG student (PE&ED), S.V.P.C.E.T., Puttur,
2
Associate Professor,S.V.P.C.E.T., Puttur,
Abstract:- This study presents space vector-based quasi-two-level operation of a diode-clamped multilevel
inverter which improves dc link utilisation and output voltage quality, and avoids the dc link capacitor voltage
balancing problem experienced with standard multilevel operation. Beside a review of quasi-two-level operation
and the capacitor voltage balancing method, the study presents a detailed discussion on the implementation of
space vector modulation and the selection of switching sequence for a five-level inverter. Additionally, the
condition for maximum theoretical modulation index for space vector modulation is established. A prototype
five-level diode-clamped inverter is to experimentally validate the approach. Also this study extends the concept
of quasi-two-level-to-three-level operation of the diode-clamped multilevel inverter in order to address the
shortcomings experienced with quasi-two-level operation, such as low waveform quality and high switching
losses. The validity of three-level inverter operation is confirmed experimentally on a prototype of a five-level
diode-clamped inverter. The study also highlights the limitations of three-level operation of a diode-clamped
multilevel inverter.
I. INTRODUCTION
Two-level voltage source inverters are commonly used in many applications, ranging from low voltage
to high voltage [1]–[5]. In medium- and high-voltage applications, two-level converters with series connected
devices are preferred because of its simple construction, simple to control and resilience to ac faults. However,
they require large ac filters and transformers with high insulation requirements owing to increased dv/dt
(resulting from switching a large voltage step) and have higher switching losses [4]–[9]. The alternative
approach for generating high voltage is to use a multilevel converter [8]. This approach reduces the filtering
requirements (requires small ac filters), generates high voltage without the need for series connection of the
devices, reduces insulation requirements on the interfacing transformer owing to low dv/dt (resulting from the
switching of small voltage step at reduced switching frequency) and have lower switching losses [9]–[19].
However, the device count and complexity of the control system increase significantly; ability to ride through
different types of faults is in doubt and requires complex capacity voltage balancing methods, which increase
with the number of levels. The common types of multilevel converters are diode-clamped, flying capacitors,
cascaded with an electrically isolated dc source and a modular converter [20]-[21]. Diode-clamped multilevel
inverters have received more research and industrial attention than other multilevel topologies. This is because
of its unique circuit structure that allows regeneration (bi-directional power flow) at no addition cost; requires
fewer capacitors (resulting in small size) and the device voltage stress is limited to one capacitor voltage. In
order to sustain these advantages, the voltage across each dc link capacitor of the diode-clamped circuit must be
maintained at Vdc/(N 2 1), where N is the number of levels and Vdc is rail-to-rail dc voltage [1]–[6]. The
structure has higher stray inductance than other multilevel topologies.
As the number of inverter levels increases, dc link capacitor voltage balancing becomes challenging;
being power factor-and modulation index-dependent [1]-[6]. This means the amount of deliverable active power
and extractable voltage magnitudes are restricted depending on the inverter operating point [7]–[16]. Since a
diode-clamped multilevel inverter uses the same dc link capacitors as an energy tank for the all three phases, it
requires capacitor voltage balancing strategies that consider the interactive effect of the all three phases.
There are three approaches commonly used to maintain capacitor voltage balance. The first approach
utilizes the addition of small dc offset to the modulating signals of the three phases in order to achieve voltage
sharing between the dc link capacitors of the diode-clamped inverter [12]-[15]. However, this approach is viable
only in three-phase systems where the dc offset is cancelled in the line-to-line voltage and no dc will appear in
the three-phase load currents. This approach has been established only for three-level diode-clamped inverters
[known as the neutral-point clamped (NPC) inverter] and limits the maximum attainable modulation index to 1
2 d, where d is the per unit dc offset demonstrate the possibility of using dc offset to balance the dc link
capacitors of the active NPC converter with more than three level. However, the main drawback of the active
2. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
27
NPC converter with more than three levels is that it requires a number of series-connected switching devices in
the inner clamping paths and in the main converter arm. In practice, this may necessitate the use of voltage
sharing mechanism such as active or passive snubber circuits, which is undesirable. Also it lacks modularity as
the converter switches are rated differently as they experience different voltage stresses. The authors in [25]
propose an optimized pulse pattern to achieve near uniform distribution of switching losses between the
converter switches, hence facilitating an approximately modular thermal circuit design. However, the authors
have not addressed the problems related with series device connection. This may limit the active NPC converter
to medium-voltage applications.
The second balancing approach uses the redundant state vectors of the multilevel space vector
modulation that generate the same line-to-line voltage with opposite effect on the dc link capacitors of the
diode-clamped inverter [6]-[19]. As the number of inverter levels increases, the usable redundant states that
guarantee voltage balance, with minimum number of switching transitions within one switching cycle, tend to
move towards the centre of the space vector diagram (in the area corresponding to lower modulation index) [6]-
[16]. This limits the maximum achievable modulation index and results in poor harmonic performance. Also
with increased levels, the number of redundant states increases exponentially, making the use of space vector
modulation impractical.
The third approach uses auxiliary balancing circuitry to maintain the correct voltage sharing between
the dc link capacitors [3]-[12]-[14]-[15]. This approach has been proven practically with three- and five-level
inverters (single phase and three phases), however, it adds cost, losses and complexity to the control system.
Since this paper is concerned with the diode-clamped inverter, the other topologies are not pursued here.
Quasi-two-level operation of a five-level diode-clamped inverter has been proposed [16]-[20] as a potential
alternative to standard multilevel operation which is hampered by the capacitor voltage balancing problems. In
these references, the authors use sinusoidal pulse-width modulation (SPWM) based on regular sampling. It is
demonstrated that the maximum attainable modulation index for quasi-two-level operation with SPWM is 0.937
without pulse dropping for unity power factor with a dwelling time of 5 ms [16]. The key objectives of the
quasi-two-level operation of a diode-clamped multilevel inverter are [16]-[20]:
Improves the dc link voltage utilisation of the diode- clamped inverter with more than three-levels in
applications involving large amounts of real power (operation with high power factor and high modulation
index).
Avoids the dc link capacitor voltage imbalance associated with standard multilevel operation.
Instead of switching the output phase between 0 and Vdc a sin two-level inverter case, the intermediate
nodes of the dc link capacitors are utilised to generate intermediate voltage levels; these voltage levels are
used to achieve smooth transition between voltage levels 0 to Vdc (this reduces dv/dt as a result of small
voltage steps). The capacitive clamps perform a controllable soft clamping function.
Reduces dc link capacitor size, which results in lower clamping circuit stray inductance and small inverter
footprint.
This paper describes the principle of quasi-two-level operation of the diode-clamped multilevel inverter
where space vector modulation is used rather than SPWM. Space vector modulation is adopted in order to
extend the modulation index linear range, where capacitor balancing is based on the state dwelling time. The
validity of the presented results is confirmed using experimentation.
II. QUASI-TWO-LEVEL OPERATION
Fig. 1 shows one-phase of a five-level diode-clamped inverter. This diode-clamped circuit version
ensures the voltages across the switching devices and clamping diodes are limited to one capacitor voltage and
eliminates the need for series connection of clamping diodes. When this diode- clamped circuit is operated in
quasi-two-level mode, the dc link nodes 1 – 3 are utilised to generate intermediate voltage levels in order to
achieve a stepped transition between the voltage levels +1/2Vdc and -1/2Vdc, in which the intermediate voltage
levels are held for minimum dwell time compatible with the recovery of the clamping circuit [16], [21] and [22].
The use of the step waveform approach within each switching cycle allows the inverter switching devices to
operate based on the principle of minimum switching losses that guarantee the switching of one voltage level in
each switching instant. As a result the overall dv/dt is reduced [16]. However, the effective switching frequency
per switch is the same as the two-level inverter (this may increase the switching frequency considerably). This
approach also eliminates the need for series connection of the devices and capacitive snubber circuits.
Since quasi-two-level operation does not utilise the full potential of multilevel modulation, it produces lower-
quality output voltage compared to full multilevel operation for the same number of levels and switching
frequency. However, it represents a practical compromise between a multilevel inverter operation and two-level
inverter operation.
During the switching transition of the output voltage from 0 to Vdc and vice versa, the dc link nodes 1 –
3 are loaded with a short pulse current of dwell duration of Td with an average magnitude of ia Td/Ts , where ia is
3. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
28
the phase current and Ts is the switching cycle. As a result, the current shape drawn from these nodes are a
sampled version of the load currents as shown in Fig. 2. Since the intermediate dc link nodes (1 – 3) are used
only for short durations, the energy drawn from the dc link capacitors is much smaller than with full multilevel
operation; as a result, capacitor voltage balancing issues are significantly reduced.
Fig.1. one-phase leg of a five-level diode-clamped inverter
4. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
29
III. SPACE VECTOR PULSE-WIDTH MODULATION IMPLEMENTATION OF QUASI-
TWO-LEVEL OPERATION
Quasi-two-level operation of multilevel inverters can be implemented using regular sampled SPWM,
selective harmonic elimination or space vector modulation. However, space vector pulse-width modulation is
considered in this paper for the reasons previously given. Quasi-two-level operation using space vector
modulation can be realised by two different methods. The first method ignores the internal triangular regions
within each sector of the space vector diagram in Fig. 3. Instead each sector of space vector diagram is treated as
one triangular region. The switch states on the circumference of the main triangular region are used regardless
of the voltage vector location within each sector. Thus, the switching sequence when the voltage vector is
located in the first sector will be
The average currents drawn from the intermediate dc link nodes 1 –3 with the first method in the first
sector can be expressed as follows
Since the dwell time at nodes 1–3 are set the same, Td , within each switching cycle, the average
currents drawn from these nodes must be zero according to i1 = i2 = i3 = d(ia + ib + ic ) = 0, where d ¼ (Td/Ts).
Theoretically, this means the dc link of a five-level inverter when operated in quasi-two level will remain
balanced, as with a standard three- level inverter (assumes perfect modular without errors in calculations of
switching instants over full fundament period, ignoring non-linearity of the switching devices, and equal dc link
capacitors). Practically, a capacitor voltage-balancing strategy is needed to ensure correct voltage sharing
between the dc link capacitors under all practical cases, such as transient conditions, load imbalance and
imperfect modulators.
The second space vector modulation (SVM) method considers each sector of the space vector diagram
to be comprised of many layers. For example, in a five-level inverter case, Fig. 3, the first sector comprises four
layers A, B, C and D. Therefore the switch sequence is determined based on the location of the target voltage
vector within the sector. For example, if the target voltage vector is located in layer D, the resultant switching
sequence is the same as the first method. If the voltage vector is located in layer C, there two possible switching
sequences:
(1) 000 → 100 → 200 → 300 → 310 → 320 → 330 → 331 → 332 → 333//333 → 332 → 331 → 330 →
320 → 310 → 300 → 200 → 100 →000.
(2) 111 → 211 → 211 → 311 → 411 → 421 → 431 → 441 → 442 → 443 → 444//444 → 443 → 442 → 441
→ 431 → 321 → 411 → .311 → 211 → 111.
If the reference voltage vector is located in layer B, three possible switching sequences can be formed,
5. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
30
in similar way as for layer B, but requires fewer switch states. Therefore the second method may produce lower
switching losses at medium and lower modulation indices as a result of a considerable reduction in the number
of switching transitions required per switching cycle. The average currents drawn from the dc link nodes 1 – 3,
with the sequence (i), can be expressed as
Since non-zero current is drawn from node 3 with this switching sequence, capacitor i3 will be charged
or discharged depending on the relative direction of i3.
Similarly, the average currents drawn from dc link nodes 1 – 3 with sequence (ii), when the reference voltage
vector is located in the third layer, can be expressed as
When sequence (ii) is used, non-zero current is drawn from node 1; as a result, the capacitor C1 will be
charged or discharged depending on direction of i1. Equations (1) –(3) show the first method always draws zero
net currents from dc link nodes 1 – 3. As a result, the first method is expected to perform better than the second
method in terms of dc link capacitor voltage balancing. Based on the balancing grounds, the first method is
favoured over the second method in avoiding severe dc link capacitor voltage imbalance problems.
Since the switch states on the circumference of each sector are normally utilized, calculation of dwell
times T1 , T2 and T0 corresponding to the main voltage vectors V1 , V2 and V0 based on two-level space
modulation. Therefore T1, T2 and T0 are given by
Where ma = 2/√ 3 (Vref /Vdc ) is the modulation index.
In order to establish the theoretical maximum modulation index limit for space vector-based quasi-two-
level operation of a five-level inverter, consider the first sector of the space vector diagram in Fig. 3. In this
sector, the maximum duty cycle, based on two-level space vector modulation, is
Substituting (4) into (5), the following expression for duty cycle is obtained
For fixed dwell times, the condition for maximum modulation index, before over-modulation, can be
obtained, without creating voltage imbalance at the dc link. This condition is developed when a restriction on
maximum allowable pulse width is imposed to prevent pulse dropping and switching of more than one voltage
levels at any instant (as a result of no time left from the switching cycle to implement the dwell times in order to
achieve smooth transition during the switching).
6. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
31
The maximum pulse width is attained when θ+ (π/3) = π/2, therefore the maximum attainable
modulation index is ma<= 1-6 δ. This limit is the same as that achieved with SPWM, as demonstrated in [16].
However, the dc link utilisation with space vector modulation is better than with SPWM for the same
modulation index, which results in higher output voltage than SPWM, by a factor of (2/ 3) (which is 15.5%
extra).
IV. REVIEW OF DWELL TIME BALANCING STRATEGY
The balancing strategy maintains voltage sharing between the dc link capacitors by adjusting the
voltage output dwell time at nodes 1–3 [16]-[21]. The node dwell times are decided based on the direction of the
currents at each node and the voltage deviation direction of each dc link capacitor from its reference voltage
(1/(N 2 1))Vdc [16]. The voltage deviation of each dc link capacitor is defined as ΔVci = (1/(N-1))Vdc – Vci,
and i = {1,2,……,N-1}, that is, ΔVci = (1/4)Vdc – Vci for a five level inverter. Assuming the current directions
in Fig.1 as positive and the maximum and minimum dwell times at each node are and the dwelling time
capacitor voltage balancing strategy is summarized as [16].
For more details on the dwell time control-balancing Strategy, refer to [16]-[21].
V. THREE-LEVEL OPERATION OF A DIODE-CLAMPED MULTILEVEL INVERTER
In an attempt to improve output voltage waveform quality and reduce switching losses, three-level
operation of diode-clamped multilevel inverter is investigated as a potential alternative to quasi-two-level
operation of diode-clamped inverters. In a three-level operation mode, the five-level diode-clamped inverter in
Fig. 1 is operated as a three-level inverter, with the switching technique modified to prevent switching of more
than one voltage level during the transition between 21/2Vdc to 0 and 0 to +1/2Vdc through 21/4Vdc and
+1/4Vdc , respectively (see Fig. 4a).
Fig.4. Phase voltage and space vector diagram for three-level operation of a five – level diode-clamped inverter.
7. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
32
a. Expanded version of phase voltage referred to node 2
b. First sector of space vector diagram of a five-level inverter
The modification introduced in the switching technique permits smooth transition between the dc link
nodes 0 (voltage level -1/2Vdc) to 2 (voltage level 0) through node 1 (voltage level -1/4Vdc) and between nodes
2 –4 (voltage level +1/2Vdc) through node 3 (voltage level + 1/4Vdc). The maximum dwell time at nodes 1 and
3 is Td , which can be adjusted in order to maintain the voltage balance of dc link capacitors, taking into
consideration the current direction at nodes 1 and 3. Node 2 is maintained at 1/2Vdc with respect to both the
positive and negative dc rail using standard line-to-line voltage redundancy of the three-level diode-clamped
inverter. Fig. 4b shows the five-level inverter space vector diagram used to achieve three-level operation of the
diode- clamped inverter in Fig. 1. Labels A, B, C and D depicted the regions in the first sector of the five-level
space vector diagram. The switching sequence is selected according to the target vector location to
besynthesised. For example, if the target vector is located in region B, the only possible switching sequence
using symmetrical modulation (three nearest vectors plus one redundant vector) is: 200 300 400 410
420 421 422/422 421 420 410 400 300 200. With this switching sequence, the average
currents drawn from the dc link nodes 1–3 within each switching period are
Where i^
1 , i^2 and i^
3 are the average currents drawn from the intermediate nodes of the dc link 1 – 3
with in one switching period, d410 = d421 = d300 = δ, and d200 + d422 = (T1/Ts). T1 represents the time shared
between the two redundant switch states (200 and 422) that represent voltage vector V1 so as to maintain the
potential of the node 2 at 1/2Vdc with respect to the positive and negative rails. When the target vector is
located at region C, the two possible switching sequences using symmetrical modulation are
a). 200 210 220 320 420 421 422//422 421 420 320 220 210 200.
b). 220 320 420 421 432 442// 422 432 422 421 420 320 220.
The average currents drawn from nodes 1 – 3 within each switching period when the target vector is
located in region C and switching sequences (a) and (b) are applied are expressed by (9) and (10)
Equation (8) shows that the dc link capacitor voltages can be maintained at 1/4Vdc independent of load
power factor only if δ=0, and the redundant switch states corresponding to vector V1 (with duty cycles d200 and
d422) are utilised to maintain zero mean current from dc link nodes 1 –3. A similar problem exists when the
target located in region C, with both switching sequences (a) and (b). For this reason, the dc link capacitor
8. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
33
voltage balancing of the diode-clamped inverter when operated in a three-level mode remains power factor-
dependent. The times T0 through T5, corresponding to voltage vectors V0 through V5 , are calculated using
standard three-level space vector modulation, then the dwell time Td is introduced at states, such as (300, 411),
410 and (310, 421), to allow smooth transition between 200– 400, 400– 420 and 420– 422 without switching of
two voltage levels. As a result, low
Dv/dt and low switching losses are possible owing to a significant reduction in a number of switch states
required per switching period. In general, it can be noticed that three-level operation of diode-clamped
multilevel inverters is only possible when number of levels is odd.
VI. PERFORMANCE EVALUATION OF THREE- LEVEL OPERATION
Fig. 5 shows the results obtained when a five-level diode - clamped inverter is operated in a three-level
mode with a modulation index of 0.9, feeding a three-phase static load with 0.8 power factor lagging. Three-
level operation of the five-level diode-clamped inverter is implemented using space vector modulation as
explained above, with a switching frequency of 2.1 kHz and dc link capacitance of 2.2 mF. Figs. 5a– c show the
line voltage, load current and dc link capacitor voltages. It is observed that three -level operation of the diode-
clamped inverter produces voltage and current waveforms with limited distortion, and the dc link capacitor
voltages are not equally distributed across the four dc link capacitors as shown in Fig.5c. This is because the
mean currents from the dc link nodes 1 and 3 cannot be forced to zero for non-zero values of dwell time as
demonstrated by (8) – (10). This increases the voltage stress across some of the circuit devices. This voltage
imbalance increases when the power factor approach unity. Fig. 6 shows the results obtained when a five-level
inverter is operated in three-level mode with 0.8 modulation index and 0.67 power factor lagging. These results
show that the quality of current waveforms is improved and distribution of the dc voltage across the four dc link
capacitors voltages is better compared to that in Fig. 5c. This demonstrates that the capacitor voltage balancing
of the diode-clamped inverter operated in three-level mode is power factor - dependent as in standard multilevel
operation of diode-clamped inverter with more than three levels. The only difference is that the mean currents
drawn from the nodes 1 and 2 are smaller than that with full multilevel operation. The lower averages node
currents result in relatively smaller voltage drift from the desire set point. However, the voltage drift from
1/4Vdc is worse at unity power factor. Also it can be noticed that the dc link capacitors voltage ripple with
three-level operation is large despite the use of relatively large capacitance compare to that use for quasi-two-
level operation.
Fig (a) Output voltage, current and three phase wave forms of Quasi 3 level inverter using SPWM
9. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
34
Fig (b) Output voltage, current and three phase wave forms of Quasi 3 level inverter using SVM
Fig. 5 Voltage and current waveforms demonstrating the concept of three-level operation of a diode-
clamped inverter (dc link voltage is 200 V, switching frequency 2.1 kHz, modulation index, M = 0.9 and load
power factor is 0.8 lagging)
a) Line voltage (total harmonic distortion (THD) = 29.78%). Scale (x-axis: 5 ms/div and y-axis: 100
V/div)
b) Three-phase load currents. Scale (x-axis: 2.5 ms/div and y-axis: 2 A/div)
c) Voltage across the four link capacitors. Scale (x-axis: 50 ms/div and y-axis: 20 V/div)
Fig (a) Output voltage, current and three phase waveforms for SPWM operation of 5-level inverter
voltage
10. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
35
Fig (b) Output voltage, current and three phase wave forms of five level inverter using SVM
Fig. 6 Voltage and current waveforms obtained when a three-phase five-level diode-clamped inverter is
operated in three-level mode with 200 V dc link, modulation index ¼ 0.8 and power factor ¼ 0.67 lagging)
a) Line voltage. Scale (x-axis: 5 ms/div and y-axis: 100 V/div)
b) Three-phase load currents. Scale (x-axis: 2.5 ms/div and y-axis: 2 A/div)
c) Voltage across the four dc link capacitors. Scale (x-axis: 100 ms/div and y-axis: 10 V/div)
VII. CONCLUSIONS
This paper investigates the use of space vector modulation - based quasi-two-level operation of diode-
clamped inverter to maximise dc link utilisation, reduce dc link capacitance, avoid dc link capacitor voltage
imbalance and improve the quality of output voltage by placing the dominant harmonic components beyond and
around second switching frequency components. This approach produces an inverter viable for medium-voltage
applications where a large amount of active power exchange is required, such as drive systems and grid -
connected inverters for integration of renewable energy resources. In attempt to improve output voltage
waveform quality and reduce switching loss, this paper investigated the extension of quasi-two-level operation
concept of the diode - clamped multilevel inverter to three-level operation. It is established that three-level
operation requires large dc link capacitance and dc link capacitor voltage balancing is power factor- and dwell
time-dependent.
REFERENCES
[1] Saeedifard, M., Iravani, R., Pou, J.: ‘Analysis and control of DC- capacitor-voltage-drift phenomenon
of a passive front-end five- level converter’, IEEE Trans. Ind. Electron., 2007, 54, pp. 3255– 3266.
[2] Flourentzou, N., Agelidis, V.G., Demetriades, G.D.: ‘VSC-based HVDC power transmission
systems: an overview’, IEEE Trans. Power Electron., 2009, 24, pp. 592 –602.
[3] Newton, C., Sumner, M., Alexander, T.: ‘Multi-level converters: a real solution to high voltage
drives?’. IEE Colloquium on Update on New Power Electronic Techniques (Digest No: 1997/091),
1997, pp. 3/ 1 –3/5.
[4] Franquelo, L.G., Rodriguez, J., Leon, J.I., Kouro, S., Portillo, M.A.M.: ‘The age of multilevel
converters arrives’, IEEE Ind. Electron. Mag., 2008, 2, pp. 28–39.
[5] Abu-Rub, H., Holtz, J., Rodriguez, J., Ge, B.: ‘Medium- oltage multilevel converters – state of the art,
challenges, and requirements in industrial applications’, IEEE Trans. Ind.Electron., 2010, 57, pp.
2581– 2596
[6] pzp, J., Pindado, R., Boroyevich, D.: ‘Voltage-balance limits in four- level diode-clamped converters
11. Quasi-Three-Level and Five-Level Operation of A Diode-Clamped Multilevel…
36
with passive front ends’, IEEE Trans. Ind. Electron., 2005, 52, pp. 190 –196
[7] Saeedifard, M., Nikkhajoei, H., Iravani, R.: ‘A space vector modulated STATCOM based on a three-
level neutral point clamped converter’, IEEE Trans. Power Deliv., 2007, 22, pp.1029–1039.
[8] Rodriguez, j Franquelo, L.G., Kouro, S., et al.: ‘Multilevel converters: an enabling technology for
high-power applications’, Proc. IEEE, 2009, 97, pp. 1786–1817
[9] Kouro, S., Malinowski, M., Gopakumar, K., et al.: ‘Recent advances and industrial applications of
multilevel converters’, IEEE Trans. Ind. Electron., 2010, 57, pp. 2553–2580.
[10] Naumanen, V., Korhonen, J., Silventoinen, P., Pyrho, x, nen, Mitigation of high du/dt- originated
motor over voltages in multilevel inverter drives, IET Power Electron., 2010,3,pp.681-689.
[11] Yuan, X., Li, Y., Wang, C.: ‘Objective optimisation for multilevel neutral-point-clamped converters
with zero-sequence signal control’,IET Power Electron., 2001, 3, pp. 755– 763.
[12] Newton, C., Sumner, M.: ‘Neutral point control for multi- level inverters: theory, design and
operational limitations’.Industry Applications Conf., 1997 Thirty-Second IAS Annual Meeting, IAS
’97, IEEE Conf. Record of the 1997, 1997, vol. 2, pp. 1336– 1343
[13] Chaves, M., Margato, E., Silva, J.F., Pinto, S.F.: ‘New approach in Back to-back m-level diode
clamped multilevel converter modeling and direct current bus voltages balancing’, IET Power
Electron., 2001, 3, pp. 578–589.
[14] Ashaibi, A.A., Finney, S.J., Williams, B.W., Massoud, A.M.: Switched mode power supplies for
charge-up, discharge and balancing dc-link capacitors of diode-clamped five-level inverter’, IET
Power Electron., 2001, 3, pp. 612 –628.
[15] Newton, C., Sumner, M.: ‘Novel technique for maintaining balanced internal DC link voltages in
diode clamped five- level inverters’, IEE Proc. Electr. Power Appl., 1999, 146, pp. 341– 349.
[16] Adam, G.P., Finney, S.J., Massoud, A.M., Williams, B.W.: ‘Capacitor balance issues of the diode-
clamped multilevel inverter operated in a quasi two-state mode’, IEEE Trans. Ind. Electron., 2008,
55, pp. 3088– 3099.
[17] Hatti, N., Kondo, Y., Akagi, H.: ‘Five-level diode-clamped PWM converters connected back-to-back
for motor drives’, IEEE Trans. Ind. Appl., 2008, 44, pp. 1268–1276.
[18] Akagi, H., Fujita, H., Yonetani, S., Kondo, Y.: ‘A 6.6-kV Transformer less STATCOM based on a
five-level diode- clamped pwm converter: system design and experimentation of a 200-V 10- kVA
laboratory model’, IEEE Trans. Ind. Appl., 2008, 44, pp. 672–680.
[19] Hotait, H.A., Massoud, A.M., Finney, S.J., Williams, B.W.: ‘Capacitor voltage balancing using
redundant states of space vector modulation for five-level diode clamped inverters’, IET Power
Electron. 2010, 3, pp. 292–313.
[20] Adam, G.P., Finney, S.J., Williams, B.W.: ‘Quasi two-level operation of a five-level inverter’.
Compatibility in Power Electronics, 2007, CPE ’07, 2007, pp. 1 –6.
[21] Adam, G.P., Finney, S.J., Williams, B.W., Mohammed, M.T.: ‘Two- level operation of a diode-
clamped multilevel inverter’. 0 IEEE Int. Symp. on Industrial Electronics (ISIE), 2010, pp. 1137–
1142.
[22] Barbosa, P., Steimer, P., Steinke, J., Meysenc, L., Winkelnkemper, M., Celanovic, N.: ‘Active
neutral-point diode-clamped multilevel converters’. IEEE 36th Power Electronics Specialists Conf.,
2005, PESC ’05, 2005, pp. 2296–2301.
[23] Pulikanti, S.R., Agelidis, V.G.: ‘Control of neutral point and flying capacitor voltages in five-level
SHE-PWM controlled NPC converter’. Fourth IEEE Conf. on Industrial Electronics and
Applications, 2009, ICIEA 2009, 2009, pp. 172–177.
[24] Pulikanti, S.R., Agelidis, V.G.: ‘Hybrid flying-capacitor-based active-neutral-point-clamped five-
level converter operated with SHE-PWM’, IEEE Trans. Ind. Electron., 2011, 58, pp. 4643–4653.
[25] Meili, J., Ponnaluri, S., Serpa, L., Steimer, P.K., Kolar, J.W.: ‘Optimized pulse patterns for the 5-
level ANPC converter for speed high power applications’. IECON 2006 – 32nd Annual Conf. on
IEEE Industrial Electronics, 2006, pp. 2587– 2592.
AUTHORS
K. Rajesh born in Tirupathi. He is completed his B.Tech in 2010 from SITE, Puttur Affiliated to JNTUA. He is
currently perusing M.Tech in SVPCET, Puttur. His areas of interest is Power electronic converters, Facts
devices.
K.Vijaya Bhaskar born in Puttur. He is completed his B.tech in 2007 from JNTUA. He is completed M.Tech in
2010 from JNTUA. His area of interest is Neural networks & Fuzzy systems, Application in Power systems.