Presentation Contents
• Types of Terminators
• Terminator Resistor Selection and Cross-Talk
• Power System Distribution
• Selection Criteria of Bypass Capacitor
• Clock distribution fundamentals
Introduction to Terminators
A cable needs to be terminated when
• It’s long (its length exceeds 1/6 the electrical length of the rising edge)
and reflections occur
• It’s short (its has large inductance and drives a large capacitive load)
and ringing occurs
Types of Terminators
• End Terminations
• Series Terminations
• Middle Terminators
End Terminations
• The driving wave propagates at full intensity all the way down the
cable
• All reflections are damped by the terminating resistor
• The received voltage is equal to the transmitted voltage
End Terminations
• The termination arrangement just discussed rarely appears in TTL or
CMOS circuits because of the large drive current to maintain a high
state.
• The driver must supply VCC/R1 to the terminating resistor With Z0
equal to 65ohm, a 5-V signal requires 5/65 = 76mA Current.
• For High Current Requirement split termination used.
End Terminations
• The parallel combination of R1 and R2 must equal Z0.
• We must not exceed loh max (maximum high-level output current).
• We must not exceed Iol max (maximum low-level output current).
• TTL and CMOS sinks current in low state and sources current in high state
• ECL sources current in both states.
• Y1=1/R1 and Y2=1/R2
End Terminations
Other Topologies Used with End Terminations
Series Terminators
Middle Terminators
AC Biasing for End Terminators
End Terminations for Differential Lines
Terminator Resistor Selection
Terminator Resistor Selection and Cross-Talk
• To compute the worst-case terminating mismatch, the uncertainty in Zo is
added to the uncertainty in the terminating resistor.
• Power handing capacity of many resistors declines at elevated
temperatures.
• Resistor bodies have thermal resistance rating (Degree Celsius rise per
Watt)
• The vertical mount has a lower thermal resistance in still air than the
horizontal mount.
• The horizontal mount has a lower inductance because the leads stay low.
Along with resistance value, a tolerance, and power rating, the next most
important factor is the parasitic series inductance.
• Every 1% of reactance causes 1/2% of reflection.
Terminator Resistor Selection and Cross-Talk
Cross-Talk
Cross-Talk
Cross-Talk
Power Regulators
 LDO
 Switching Regulators
• Buck
• Boost
• Buck-Boost
 Power Modules
LDO
Pros:
Linear Operation
Easy to implement
No noise addition
Cost Effective
Less space on board
Cons:
Heats More
Less efficient
Switching Regulator
Pros:
 Most efficient
 Can boost from Low input to higher output
Cons:
 Switching noise addition
 Ripple noise addition
 Need more supporting components
 Costly compare to LDO
Power System Distribution
• Power Rule 1. Use low-impedance ground connections between
gates.
• Power Rule 2. The impedance between power pins on any two gates
should be just as low as the impedance between ground pins.
• Power Rule 3. There must be a low-impedance path between power
and ground.
Voltage reference used with single-ended logic
Common-path noise caused by a ground connection
Common-path inductance in power wiring
Single-plane power system
Differential signal transmission between gates
Power System Design Take Care
• Sense wires correct for resistance in power distribution wiring.
• Inductance in power wiring presents a much harder problem than resistance.
• Use lower-inductance wiring.
• Use logic immune to power supply noise.
• Reduce the size of changing power supply currents.
• It is almost impossible to reduce wiring inductance by simply using a bigger wire.
Power System Design Take Care
• A power supply provides low impedance at low frequencies. Local bypass
capacitors provide low impedance at higher frequencies.
• The best way to get very low inductance is to parallel a lot of small capacitors.
• Power and ground planes separated by 0.01 in. of FR-4 have a capacitance of 100
pF/in.
• Wide, flat parallel structures work much better as distribution wiring than round
wires.
Selection Criteria of Bypass Capacitor
• Lead inductance acts like an inductor in series with a capacitor. ESR acts like
a resistor in series with a capacitor.
• Together they degrade a capacitor's effectiveness as a bypass element.
• For large-valued capacitors, smaller packages have higher series inductance
and ESR than larger packages.
• Capacitor performance varies widely.
Selection Criteria of Bypass Capacitor
Selection Criteria of Bypass Capacitor
• When mounting components on the back side of any printed circuit board,
determine whether your manufacturing shop will use the reflow or wave solder
assembly method.
• Aluminum electrolytics are the workhorse capacitors most often used for board-
level bypass. Their characteristics are similar to those of tantalum, which has an
even higher dielectric constant at a slightly higher cost.
• The Z5U dielectric material has a higher dielectric constant than X7R but worse
temperature and aging properties. Below 10°C, Z5U is not recommended.
Selection Criteria of Bypass Capacitor
• The X7R dielectric material has a lower dielectric constant than Z5U, but better
temperature and aging properties.
• Higher-dielectric-constant materials pack more capacitance into a smaller space
but have poor temperature coefficients and aging instability.
• Aluminum electrolytics do not work well in cold applications.
Clock distribution fundamentals
• Timing margin measures the slack, or excess time, remaining in each
clock cycle.
• Timing margin protects your circuit against signal crosstalk,
miscalculation of logic delays, and later minor changes in the layout.
• Clock skew has as much of an impact on overall operating speed as
any other propagation delay.
Clock Tree
Clock distribution fundamentals
• Slow the rise time of the driver.
• Lower the capacitance of each tap.
• Lower the characteristic impedance of the clock distribution line, (Zo).
• A 20 Ὠ clock line is 2.5 times less sensitive to the capacitance of clock taps
than a 50 Ὠ line.
• A single driver can service two or more source-terminated lines under
restricted circumstances.
Single clock driver feeding two source-terminated lines
Fixed Delay Adjustments
Adjustable Delays
Automatically Programmable Delays
Delays for Timing Requirement
• Delay elements are built from three basic building blocks transmission
lines, logic gates, and passive lumped circuits.
• A fixed delay cannot cancel variations in board fabrication or active
component delay.
• An adjustable delay compensates for actual delays, not just nominal delays,
elsewhere in the circuit.
• Whatever form of delay you choose, incorporate its uncertainty in delay
into your timing margin calculations.
Canceling Parasitic Capacitance of a Clock Repeater
High Speed Schematic Design
High Speed Schematic Design

High Speed Schematic Design

  • 2.
    Presentation Contents • Typesof Terminators • Terminator Resistor Selection and Cross-Talk • Power System Distribution • Selection Criteria of Bypass Capacitor • Clock distribution fundamentals
  • 3.
    Introduction to Terminators Acable needs to be terminated when • It’s long (its length exceeds 1/6 the electrical length of the rising edge) and reflections occur • It’s short (its has large inductance and drives a large capacitive load) and ringing occurs
  • 4.
    Types of Terminators •End Terminations • Series Terminations • Middle Terminators
  • 5.
    End Terminations • Thedriving wave propagates at full intensity all the way down the cable • All reflections are damped by the terminating resistor • The received voltage is equal to the transmitted voltage
  • 6.
    End Terminations • Thetermination arrangement just discussed rarely appears in TTL or CMOS circuits because of the large drive current to maintain a high state. • The driver must supply VCC/R1 to the terminating resistor With Z0 equal to 65ohm, a 5-V signal requires 5/65 = 76mA Current. • For High Current Requirement split termination used.
  • 7.
    End Terminations • Theparallel combination of R1 and R2 must equal Z0. • We must not exceed loh max (maximum high-level output current). • We must not exceed Iol max (maximum low-level output current). • TTL and CMOS sinks current in low state and sources current in high state • ECL sources current in both states. • Y1=1/R1 and Y2=1/R2
  • 8.
  • 9.
    Other Topologies Usedwith End Terminations
  • 10.
  • 11.
  • 12.
    AC Biasing forEnd Terminators
  • 13.
    End Terminations forDifferential Lines
  • 14.
  • 15.
    Terminator Resistor Selectionand Cross-Talk • To compute the worst-case terminating mismatch, the uncertainty in Zo is added to the uncertainty in the terminating resistor. • Power handing capacity of many resistors declines at elevated temperatures. • Resistor bodies have thermal resistance rating (Degree Celsius rise per Watt) • The vertical mount has a lower thermal resistance in still air than the horizontal mount. • The horizontal mount has a lower inductance because the leads stay low. Along with resistance value, a tolerance, and power rating, the next most important factor is the parasitic series inductance. • Every 1% of reactance causes 1/2% of reflection.
  • 16.
  • 17.
  • 18.
  • 19.
  • 20.
    Power Regulators  LDO Switching Regulators • Buck • Boost • Buck-Boost  Power Modules
  • 21.
    LDO Pros: Linear Operation Easy toimplement No noise addition Cost Effective Less space on board Cons: Heats More Less efficient
  • 22.
    Switching Regulator Pros:  Mostefficient  Can boost from Low input to higher output Cons:  Switching noise addition  Ripple noise addition  Need more supporting components  Costly compare to LDO
  • 23.
    Power System Distribution •Power Rule 1. Use low-impedance ground connections between gates. • Power Rule 2. The impedance between power pins on any two gates should be just as low as the impedance between ground pins. • Power Rule 3. There must be a low-impedance path between power and ground.
  • 24.
    Voltage reference usedwith single-ended logic
  • 25.
    Common-path noise causedby a ground connection
  • 26.
  • 27.
  • 28.
  • 29.
    Power System DesignTake Care • Sense wires correct for resistance in power distribution wiring. • Inductance in power wiring presents a much harder problem than resistance. • Use lower-inductance wiring. • Use logic immune to power supply noise. • Reduce the size of changing power supply currents. • It is almost impossible to reduce wiring inductance by simply using a bigger wire.
  • 30.
    Power System DesignTake Care • A power supply provides low impedance at low frequencies. Local bypass capacitors provide low impedance at higher frequencies. • The best way to get very low inductance is to parallel a lot of small capacitors. • Power and ground planes separated by 0.01 in. of FR-4 have a capacitance of 100 pF/in. • Wide, flat parallel structures work much better as distribution wiring than round wires.
  • 31.
    Selection Criteria ofBypass Capacitor • Lead inductance acts like an inductor in series with a capacitor. ESR acts like a resistor in series with a capacitor. • Together they degrade a capacitor's effectiveness as a bypass element. • For large-valued capacitors, smaller packages have higher series inductance and ESR than larger packages. • Capacitor performance varies widely.
  • 32.
    Selection Criteria ofBypass Capacitor
  • 33.
    Selection Criteria ofBypass Capacitor • When mounting components on the back side of any printed circuit board, determine whether your manufacturing shop will use the reflow or wave solder assembly method. • Aluminum electrolytics are the workhorse capacitors most often used for board- level bypass. Their characteristics are similar to those of tantalum, which has an even higher dielectric constant at a slightly higher cost. • The Z5U dielectric material has a higher dielectric constant than X7R but worse temperature and aging properties. Below 10°C, Z5U is not recommended.
  • 34.
    Selection Criteria ofBypass Capacitor • The X7R dielectric material has a lower dielectric constant than Z5U, but better temperature and aging properties. • Higher-dielectric-constant materials pack more capacitance into a smaller space but have poor temperature coefficients and aging instability. • Aluminum electrolytics do not work well in cold applications.
  • 35.
    Clock distribution fundamentals •Timing margin measures the slack, or excess time, remaining in each clock cycle. • Timing margin protects your circuit against signal crosstalk, miscalculation of logic delays, and later minor changes in the layout. • Clock skew has as much of an impact on overall operating speed as any other propagation delay.
  • 36.
  • 37.
    Clock distribution fundamentals •Slow the rise time of the driver. • Lower the capacitance of each tap. • Lower the characteristic impedance of the clock distribution line, (Zo). • A 20 Ὠ clock line is 2.5 times less sensitive to the capacitance of clock taps than a 50 Ὠ line. • A single driver can service two or more source-terminated lines under restricted circumstances.
  • 38.
    Single clock driverfeeding two source-terminated lines
  • 39.
  • 40.
  • 41.
  • 42.
    Delays for TimingRequirement • Delay elements are built from three basic building blocks transmission lines, logic gates, and passive lumped circuits. • A fixed delay cannot cancel variations in board fabrication or active component delay. • An adjustable delay compensates for actual delays, not just nominal delays, elsewhere in the circuit. • Whatever form of delay you choose, incorporate its uncertainty in delay into your timing margin calculations.
  • 43.