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1
Guided By Presented by
Ms.ShaemaLizbeth AnoopKumarN
(Asst.Prof.EEE) (11708)
23-09-2014
2
Introduction
Today the energy demand is increasing
Hence, renewable energy plays an important role to replace traditional
natural resources such as fuel and coal
 Photovoltaic (PV) energy has recently become a common interest of
research because it is free, green, and inexhaustible
3
Inverter
convert DC power into AC power at desired output voltage
and frequency
It can be achieved by either controlled turn-on and turn-
off devices like IGBT MOSFET BJT MCT or by forced
commutated thyristors
The output voltage waveform of an ideal inverter Should
be sinusoidal
4
Inverter Circuit
s1 s3
Dc
i/p
s4 s2
Load
5
Inverter Circuit
s1 s3
Dc
i/p
s4 s2
Load
6
Inverter Circuit
s1 s3
Dc
i/p
s4 s2
Load
7
• The switches s1, s2 ,s3 & s4 are semiconductor devices
• The switches must have controlled turn-on & turn-off
characteristics
• The frequency of the AC output voltage is determined by the
rate at which these devices switched on and off
8
Transformer Inverter V/S Transformerless
inverter
• Transformers are used in the
inverter for stepping up the
voltage
• They provide galvanic isolation
between the PV array and the
grid
• They are bulky, heavy, and
expensive ,even though
significant size and weight,
reduces the efficiency of the
entire PV system
• Transformerless inverters are
smaller, lighter, lower in cost,
and highly efficient
• No isolation between PV and
grid
• Without a galvanic isolation, a
direct path is to be formed for
the leakage current to flow from
the PV to the grid
9
Transformerless PV system
• A common-mode current is generated and superimposed to the grid
• This increases its harmonics content and causing an electromagnetic
interference (EMI) between the PV system and the grid
10
Common mode Leakage current
Common mode voltage
• Average of the voltages between the outputs and a common
reference. For the full-bridge inverter, the negative terminal of the DC
bus point N, is used as common reference.
• Vcm=
𝑉𝑎𝑛+𝑉𝑏𝑛
2
Differential mode voltage
• Vdm = Van-Vbn
11
Total common mode voltage is given by
Vtm= 𝑉𝑐𝑚 + 𝑉𝑑𝑚
𝐿𝑎−𝐿𝑏
2(𝐿𝑎+𝐿𝑏)
To eliminate this leakage current,
 Design the inverter circuit so that Equivalent common mode Voltage
should kept constant
 Provide Galvanic isolation between the grid and PV array at the
freewheeling period
12
Some Inverter Topologies
H5 inverter
13
H5 inverter
• includes an extra switch at the DC side
• The extra switch is turned OFF at each freewheeling period, during
both grid half waves, disconnecting therefore the inverter from the DC
source
• The reported system efficiencies (8KW,345-V dc input and a 16-kHz
switching frequency prototype)
CEC efficiency = 98%
14
H5 inverter - Disadvantages
• this topology has high conduction losses due to the fact that the
current must conduct through three switches in series during the
active phase
• However H5 guarantees a small common-mode voltage variation
resulting in a low leakage current level
• any small mismatch or over delay in the switching process would lead
to a high leakage current level
15
H6 inverter
16
H6 inverter
• Replacing the switch S5 of the H5 inverter with two split switches S5 and
S6 into two phase legs and adding two freewheeling diodes D5 and D6
for freewheeling current flows
• The H6 inverter can be implemented using MOSFETs for the line
frequency switching devices, eliminating the use of less efficient IGBTs.
• For a 300 W prototype -180 V dc input voltage and 30 kHz switching
frequency.
EU efficiency = 98.1%,
17
H6 inverter - Disadvantages
• When the inverter output voltage and current has a phase shift the
MOSFET body diodes may be activated.
• This can cause body diode reverse-recovery issues and decrease the
reliability of the system.
• Conduction losses are present, due to the three series-connected
switches in the current path during active phases
18
Dual-paralleled-buck inverters
19
Dual-paralleled-buck inverters
• This inverter eliminates the problem of high conduction losses in the
H5 and H6inverter during active phases.
• For a 4.5 kW prototype
input dc voltage =375 V
switching frequency =16 kHz.
EU efficiency =98.8%
20
Dual-paralleled-buck inverters - disadvantages
• The grid is directly connected by two active switches S3 and S4 which
may cause a grid short-circuit problem, reducing the reliability of the
topology.
• A dead time of 500 µs between the line-frequency switches S3 and S4
at the zero-crossing instants needed to be added to avoid grid shoot-
through.
• This adjustment to improve the system reliability comes at the cost of
high zero-crossing distortion for the output grid current.
21
Issues in inverters
1. Shoot through fault
Arises due to the any mismatch in the switching process
Due to this , there exists cross conduction period
Which results, possibility for supply get shorted.
22
2. Reverse recovery issue
When a semiconductor device is switching from conducting to
blocking state, it takes a short period of time for the charge carriers in
the vicinity of the junction to recombine and create a non-conducting
depletion region. During this time period the diode conducts in the
reverse direction, this is called the reverse recovery time.
Reduces the efficiency of the system
23
3.Common mode leakage current
 a direct path is to be formed for the leakage current to flow from the
PV to the grid.
this leakage current increases grid current ripples, system losses, and
electromagnetic interference.
24
4.Low output AC current distortion
Due to dead time requirement at every PWM switching commutation
instant
Also at grid zero crossing instant
25
Super Junction MOSFET
Super junction MOSFET is used as a switching device
higher power conversion efficiency & fast switching performance
High efficiency can be achieved even at light load operations achieving a
high California energy commission/European union efficiency
avoid the fixed voltage-drop and the tail-current induced
turn-off losses of IGBTs to achieve ultra high efficiency
26
Vertical structure of Power MOSFET’s
27
Super-junction technology has deep p type pillar-like structure in the
body in contrast to the well like structure of conventional planar
technology.
The effect of the pillars is to confine the electric field in the lightly
doped epi-region
the resistance of n-type epi can be dramatically reduced, compared
to the conventional planar technology, while maintaining same level
of breakdown voltage
28
29
Switching losses can be reduced
High efficiency can be obtained using the super junction MOSFET as
active switch
Also it haven’t any chance to induce MOSFET body diode reverse
recovery
30
Proposed Inverter Topology
31
• Consist of switches (S1–S6), six diodes (D1–D6) and two split ac-
coupled inductors L1 and L2.
• The diodes D1–D4 perform voltage clamping functions for active
switches S1–S4.
• The ac-side switch pairs are composed of S5,D5 and S6,D6
• Provide unidirectional current flow branches during the freewheeling
phases decoupling the grid from the PV array and minimizing the CM
leakage current
32
Active Stages of positive half cycle
33
Freewheeling stages of positive half cycle
34
Active stages of negative half cycle
35
Freewheeling stage of negative half cycle
36
Gating signal for the proposed
transformerless inverter
37
• The proposed inverter divides the ac side into two independent units
for positive and negative half cycle.
• high efficiency and low leakage current features
• Has no shoot-through enhancing the reliability of the inverter.
• inverter does not lead itself to the reverse recovery issues for the
main power switches
• Super-junction MOSFETs can be utilized without any reliability or
efficiency penalties
38
Power loss comparison of inverter topologies
39
Conclusions
• ultra high efficiency can be achieved using SJ-MOSFET for all switches
since their body diodes are never activated
• no shoot-through issue & low ac output current distortion is achieved
• low-ground loop CM leakage current
• the higher operating frequencies with high efficiency enables reduced
cooling requirements and results in system cost savings by shrinking
passive components.
• Experimental Verification on a 5KW prototype shows 99% of CEC
efficiency
40
41
REFERENCES
1. Q. Li and P. Wolfs, “A review of the single phase photovoltaic
module integrated converter topologies with three different DC link
configurations IEEE Trans. Ind. Electron., vol. 23, no. 23, pp. 1320–
1333, Apr. 2008.
2. R. Gonzalez, J. Lopez, P. Sanchis, and L. Marroyo, “Transformerless
inverter for single-phase photovoltaic systems,” IEEE Trans. Power
Electron vol. 22, no. 2, pp. 693–697, Mar. 2007.
42
3. Automatic Disconnection Device Between a Generator and the Public
Low-Voltage Grid, Germany Standard DIN VDE 0126, 2006, 2010
4. S.-Y. Park, C.-L Chen, J.-S. Lai, and S.-R. Moon, “Admittance
compensation in current loop control for a grid-tie LCL fuel cell
inverter,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1716–1723, Jul.
2008.
5. M. C. Cavalcanti, A. M. Farias, F. A. S. Neves, and J. L. Afonso,
“Eliminating leakage currents in neutral point clamped inverters for
photovoltaic systems,” IEEE Trans. Power Electron., vol. 59, no. 1, pp.
435–443, Jan. 2012
43
44

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High Reliability and Efficiency Single phase Transformerless Inverter for Grid Connected Photovoltaic System Anoop kumar Niravuparambil

  • 1. 1
  • 2. Guided By Presented by Ms.ShaemaLizbeth AnoopKumarN (Asst.Prof.EEE) (11708) 23-09-2014 2
  • 3. Introduction Today the energy demand is increasing Hence, renewable energy plays an important role to replace traditional natural resources such as fuel and coal  Photovoltaic (PV) energy has recently become a common interest of research because it is free, green, and inexhaustible 3
  • 4. Inverter convert DC power into AC power at desired output voltage and frequency It can be achieved by either controlled turn-on and turn- off devices like IGBT MOSFET BJT MCT or by forced commutated thyristors The output voltage waveform of an ideal inverter Should be sinusoidal 4
  • 8. • The switches s1, s2 ,s3 & s4 are semiconductor devices • The switches must have controlled turn-on & turn-off characteristics • The frequency of the AC output voltage is determined by the rate at which these devices switched on and off 8
  • 9. Transformer Inverter V/S Transformerless inverter • Transformers are used in the inverter for stepping up the voltage • They provide galvanic isolation between the PV array and the grid • They are bulky, heavy, and expensive ,even though significant size and weight, reduces the efficiency of the entire PV system • Transformerless inverters are smaller, lighter, lower in cost, and highly efficient • No isolation between PV and grid • Without a galvanic isolation, a direct path is to be formed for the leakage current to flow from the PV to the grid 9
  • 10. Transformerless PV system • A common-mode current is generated and superimposed to the grid • This increases its harmonics content and causing an electromagnetic interference (EMI) between the PV system and the grid 10
  • 11. Common mode Leakage current Common mode voltage • Average of the voltages between the outputs and a common reference. For the full-bridge inverter, the negative terminal of the DC bus point N, is used as common reference. • Vcm= 𝑉𝑎𝑛+𝑉𝑏𝑛 2 Differential mode voltage • Vdm = Van-Vbn 11
  • 12. Total common mode voltage is given by Vtm= 𝑉𝑐𝑚 + 𝑉𝑑𝑚 𝐿𝑎−𝐿𝑏 2(𝐿𝑎+𝐿𝑏) To eliminate this leakage current,  Design the inverter circuit so that Equivalent common mode Voltage should kept constant  Provide Galvanic isolation between the grid and PV array at the freewheeling period 12
  • 14. H5 inverter • includes an extra switch at the DC side • The extra switch is turned OFF at each freewheeling period, during both grid half waves, disconnecting therefore the inverter from the DC source • The reported system efficiencies (8KW,345-V dc input and a 16-kHz switching frequency prototype) CEC efficiency = 98% 14
  • 15. H5 inverter - Disadvantages • this topology has high conduction losses due to the fact that the current must conduct through three switches in series during the active phase • However H5 guarantees a small common-mode voltage variation resulting in a low leakage current level • any small mismatch or over delay in the switching process would lead to a high leakage current level 15
  • 17. H6 inverter • Replacing the switch S5 of the H5 inverter with two split switches S5 and S6 into two phase legs and adding two freewheeling diodes D5 and D6 for freewheeling current flows • The H6 inverter can be implemented using MOSFETs for the line frequency switching devices, eliminating the use of less efficient IGBTs. • For a 300 W prototype -180 V dc input voltage and 30 kHz switching frequency. EU efficiency = 98.1%, 17
  • 18. H6 inverter - Disadvantages • When the inverter output voltage and current has a phase shift the MOSFET body diodes may be activated. • This can cause body diode reverse-recovery issues and decrease the reliability of the system. • Conduction losses are present, due to the three series-connected switches in the current path during active phases 18
  • 20. Dual-paralleled-buck inverters • This inverter eliminates the problem of high conduction losses in the H5 and H6inverter during active phases. • For a 4.5 kW prototype input dc voltage =375 V switching frequency =16 kHz. EU efficiency =98.8% 20
  • 21. Dual-paralleled-buck inverters - disadvantages • The grid is directly connected by two active switches S3 and S4 which may cause a grid short-circuit problem, reducing the reliability of the topology. • A dead time of 500 µs between the line-frequency switches S3 and S4 at the zero-crossing instants needed to be added to avoid grid shoot- through. • This adjustment to improve the system reliability comes at the cost of high zero-crossing distortion for the output grid current. 21
  • 22. Issues in inverters 1. Shoot through fault Arises due to the any mismatch in the switching process Due to this , there exists cross conduction period Which results, possibility for supply get shorted. 22
  • 23. 2. Reverse recovery issue When a semiconductor device is switching from conducting to blocking state, it takes a short period of time for the charge carriers in the vicinity of the junction to recombine and create a non-conducting depletion region. During this time period the diode conducts in the reverse direction, this is called the reverse recovery time. Reduces the efficiency of the system 23
  • 24. 3.Common mode leakage current  a direct path is to be formed for the leakage current to flow from the PV to the grid. this leakage current increases grid current ripples, system losses, and electromagnetic interference. 24
  • 25. 4.Low output AC current distortion Due to dead time requirement at every PWM switching commutation instant Also at grid zero crossing instant 25
  • 26. Super Junction MOSFET Super junction MOSFET is used as a switching device higher power conversion efficiency & fast switching performance High efficiency can be achieved even at light load operations achieving a high California energy commission/European union efficiency avoid the fixed voltage-drop and the tail-current induced turn-off losses of IGBTs to achieve ultra high efficiency 26
  • 27. Vertical structure of Power MOSFET’s 27
  • 28. Super-junction technology has deep p type pillar-like structure in the body in contrast to the well like structure of conventional planar technology. The effect of the pillars is to confine the electric field in the lightly doped epi-region the resistance of n-type epi can be dramatically reduced, compared to the conventional planar technology, while maintaining same level of breakdown voltage 28
  • 29. 29
  • 30. Switching losses can be reduced High efficiency can be obtained using the super junction MOSFET as active switch Also it haven’t any chance to induce MOSFET body diode reverse recovery 30
  • 32. • Consist of switches (S1–S6), six diodes (D1–D6) and two split ac- coupled inductors L1 and L2. • The diodes D1–D4 perform voltage clamping functions for active switches S1–S4. • The ac-side switch pairs are composed of S5,D5 and S6,D6 • Provide unidirectional current flow branches during the freewheeling phases decoupling the grid from the PV array and minimizing the CM leakage current 32
  • 33. Active Stages of positive half cycle 33
  • 34. Freewheeling stages of positive half cycle 34
  • 35. Active stages of negative half cycle 35
  • 36. Freewheeling stage of negative half cycle 36
  • 37. Gating signal for the proposed transformerless inverter 37
  • 38. • The proposed inverter divides the ac side into two independent units for positive and negative half cycle. • high efficiency and low leakage current features • Has no shoot-through enhancing the reliability of the inverter. • inverter does not lead itself to the reverse recovery issues for the main power switches • Super-junction MOSFETs can be utilized without any reliability or efficiency penalties 38
  • 39. Power loss comparison of inverter topologies 39
  • 40. Conclusions • ultra high efficiency can be achieved using SJ-MOSFET for all switches since their body diodes are never activated • no shoot-through issue & low ac output current distortion is achieved • low-ground loop CM leakage current • the higher operating frequencies with high efficiency enables reduced cooling requirements and results in system cost savings by shrinking passive components. • Experimental Verification on a 5KW prototype shows 99% of CEC efficiency 40
  • 41. 41
  • 42. REFERENCES 1. Q. Li and P. Wolfs, “A review of the single phase photovoltaic module integrated converter topologies with three different DC link configurations IEEE Trans. Ind. Electron., vol. 23, no. 23, pp. 1320– 1333, Apr. 2008. 2. R. Gonzalez, J. Lopez, P. Sanchis, and L. Marroyo, “Transformerless inverter for single-phase photovoltaic systems,” IEEE Trans. Power Electron vol. 22, no. 2, pp. 693–697, Mar. 2007. 42
  • 43. 3. Automatic Disconnection Device Between a Generator and the Public Low-Voltage Grid, Germany Standard DIN VDE 0126, 2006, 2010 4. S.-Y. Park, C.-L Chen, J.-S. Lai, and S.-R. Moon, “Admittance compensation in current loop control for a grid-tie LCL fuel cell inverter,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1716–1723, Jul. 2008. 5. M. C. Cavalcanti, A. M. Farias, F. A. S. Neves, and J. L. Afonso, “Eliminating leakage currents in neutral point clamped inverters for photovoltaic systems,” IEEE Trans. Power Electron., vol. 59, no. 1, pp. 435–443, Jan. 2012 43
  • 44. 44