This document discusses the integration of HDT's signal integrity and EMC simulation tools with Zuken Redac's PCB design tools. It summarizes the need for such integrated tools due to increasing circuit speeds and densities exacerbating signal and power integrity issues. It outlines HDT's tool suite including PRESTO for post-layout simulation and EMIR for EMC analysis. The benefits of integrating these tools directly into Zuken Redac's design flow are discussed, such as automatically generating simulations from the layout. The goals of the partnership between the two companies is to provide a complete concurrent engineering solution.