The document presents an innovative time-domain macromodeling technique for linear multiport systems using automated piecewise-linear fitting (pwlfit) of their step response. This method enhances modeling efficiency and computational speed through segment fast convolution (sfc), offering an alternative to traditional frequency-domain methods. Two application examples demonstrate the effectiveness of the pwlfit approach in time-domain simulations.

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Automated Piecewise-Linear Fitting of S-Parameters step-response (PWLFIT)
for fast Time-domain modeling and simulation
Research · December 2018
DOI: 10.13140/RG.2.2.34124.36481/2
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2. 1
Time-Domain Piecewise-Linear Fitting Method
Based on Digital Wave Processing of S-Parameters
Piero Belforte, Domenico Spina, Member, IEEE, Giulio Antonini, Senior Member, IEEE , Luigi Lombardi, and
Tom Dhaene Senior Member, IEEE
Abstract—An innovative full time-domain macromodeling
technique for general, linear multiport systems is described. The
methodology is defined in a digital wave framework and time-
domain simulations are performed via an efficient method called
Segment Fast Convolution (SFC). It is based on a piecewise-
constant (PWC) model of the impulse response of scattering
parameters, computed starting from a piecewise-linear fitting
of their step response (PWLFIT). Such step response is di-
rectly available from time-domain reflectometer measurements
(TDR/TDT) or equivalent simulations. The model-building phase
is performed in a fast automated framework and an analytic
formulation of computational efficiency of the SFC with respect to
the standard time-domain convolution is given. Two application
examples are used to verify the PWLFIT performance and to
perform a comparison with macromodeling methods defined in
the frequency-domain, such as Vector Fitting (VF).
Index Terms—Digital wave models, time-domain macromodel-
ing, S-parameters, step response.
I. INTRODUCTION
Multiport linear and passive networks characterized by
sampled data are very frequent in the analysis or design of
high-frequency or high-speed circuits. Their accurate modeling
over a wide frequency range is extremely challenging. In the so
called macromodel analysis, a complex network is described in
terms of its terminal transfer function in the frequency-domain,
which can be estimated via a network analyzer (NA) or a full-
wave field solver. Several techniques exist in the literature
describing the generation of these macromodels, including
methods based on rational approximation, Padé synthesis, and
asymptotic waveform evaluation [1]–[10].
In the last decade, the Vector Fitting (VF) method [11], [12]
has become very popular. It allows one to simplify the identi-
fication of a frequency-domain macromodel in a rational form
as a two step process: first the poles are properly located in the
complex plane, then the corresponding residues are computed
solving a least squares problem. Next, the obtained rational
model can be converted into an equivalent state-space model,
which can be linked to linear and non-linear terminations for
frequency- or time-domain simulations. Note that, an equiv-
alent SPICE-like circuit (typically composed only by lumped
elements and controlled sources) can be computed from a
such state-space representation via several techniques [13],
[14]. Alternatively, VF-based rational models can be used in a
time-domain recursive convolution algorithm, that is far more
Manuscript received December 28, 2018.
Piero Belforte is an independent researcher at Via G. C. Cavalli 28 bis,
10138 Turin, Italy; e-mail: piero.belforte@gmail.com, Research Gate account:
https://www.researchgate.net/profile/Piero_Belforte.
Domenico Spina and Tom Dhaene are with the Internet Technology
and Data Science Lab (IDLab), Department of Information Technology,
Ghent University-imec, B-9052, Ghent, Belgium; e-mail: {domenico.spina,
tom.dhaene}@ugent.be.
Luigi Lombardi and Giulio Antonini are with the UAq EMC Laboratory,
Dipartimento di Ingegneria Industriale e dell’Informazione e di Economia,
Università degli Studi dell’Aquila, Via G. Gronchi 18, 67100, L’Aquila, Italy;
e-mail: giulio.antonini@univaq.it.
computationally efficient than a direct convolution approach
[15]. The computational complexity of the state-space model
and the recursive convolution is the same for a fixed number
of poles. However, the fitting process does not necessarily
lead to a passive model: passivity assessment and enforcement
schemes must be imposed to the resulting rational macromodel
[16]–[18]. When fitting complex multiport networks defined
over a wide frequency bandwidth, it may happen that hundreds
of poles and residues are required to accurately reproduce the
system response: this can significantly increase the modeling
complexity, especially when passivity enforcement schemes
must be applied.
More recently, a mixed frequency/time domain approach has
been proposed in [19] as alternative to the pure frequency-
domain rational modeling. It based on the inverse fast Fourier
transform (IFFT) of the sampled frequency response of the
multiport network under study: if the transfer function is
described by scattering parameters (S-parameters) and the
reference impedance is optimally chosen, then the correspond-
ing time-domain impulse response die out quickly. Hence, a
suitable decimation scheme of the impulse response can be
applied in order to speed up the calculation of the time-domain
convolution.
In this work we describe a native time-domain macro-
modeling scheme for the simulation of passive multiport
networks, which is integrated in a Digital Wave simulator
(DWS) environment. In particular, the method is based on
the S-parameters step response defined in the time-domain,
which can be provided either by time domain reflectometry
or by numerical simulations. Then, a suitable piecewise-linear
model of such step response (PWLFIT) is computed in an
automated framework, which, thanks to a numerical derivative,
gives a piecewise-constant (PWC) representation of the S-
parameters impulse response. Finally, such PWC model is
used to efficiently compute the time-domain convolution. The
segment fast convolution (SFC) methodology is an alternative
to frequency-domain approaches, such as VF, and mixed fre-
quency/time domain techniques, as the one described in [19].
Indeed, the response of the system under study is evaluated
directly into the time-domain, without employing the IFFT
of frequency tabulated data [19], which is prone to artifacts
related to the sampling and the limited bandwidth considered.
Since PWLFIT optimizes the step response behavior, it is
particularly well suited for digital applications where the
typical signals involved are pulses.
The paper is organized as follows. The historical back-
ground of the DWS environment is presented in Section II,
while Section III describes the features of the S-parameters
step response. The novel automated PWLFIT method and
the corresponding SFC are presented in Sections IV and V,
respectively. Two suitable application examples are shown in
Section VI, while conclusions are drawn in Section VII.

3. II. BACKGROUND OF DIGITAL WAVE SIMULATORS
Alfred Fettweis formulated the theory of wave digital filters
(WDF) in the early 1970s [20], [21]. The WDF concept
provides an elegant framework for creating digital models of
analog reference circuits (or any lumped reference system).
Wave digital structures (WDS) allow to create models in the
discrete time domain and can be used to describe both linear
and nonlinear systems. Due to their numerical properties,
WDS are well suited for hardware implementation and for
Digital Signal Processing (DSP) in various fields like, for
example, Virtual Audio (VA) [22].
In the same years at CSELT Labs of Turin, Italy, an
extension of digital wave concept to Transmission Lines and
z-domain macromodels was applied to develop measurement-
based modeling and simulation programs for the design of
advanced high-speed digital systems [23]. In 1980 an early
application of S-parameter convolutional models of lossy lines
directly derived from TDR/TDT measurements in a digital
wave environment was developed [24], [25]. In mid ’80s, Piero
Belforte conceived a new full time-domain approach to black-
box system identification called Behavioral Time Modeling
(BTM). BTM is based on the time-domain step response of the
S-parameters measured or simulated at the ports of the device
to be identified. Each S-parameter step response is graphically
modeled by means of a minimum number of linear segments
belonging to a piecewise-linear approximation of the original
behavior (PWLFIT). This model was then included within the
first general-purpose digital wave simulator called SPRINT
[26], [27], developed by the company HDT founded by Piero
Belforte and Giancarlo Guaschino in 1988. The breakpoints
were extracted using a specific utility called Model Capture
System (MCS) of the graphic environment SIGHTS [28]. The
source waveform was graphically approximated by a series of
linear segments connecting the breakpoints manually chosen
by the user in order to get a good approximation of the
original waveform. This set of breakpoints is directly inserted
in the input netlist of the simulator using the B-elements,
where B stands for Behavioral. Dramatic speed-ups due to
the resulting staircase impulse response calculated inside the
simulator from the PWL approximation and to the related
segment fast convolution (SFC) were observed in practical
applications. No need of conditioning of breakpoints due the
good model stability was also experienced, enhancing the
speed and stability properties of the wave simulator.
Since 1988 until now, thousands real world simulations
have successfully carried out using BTM/PWLFIT models.
In particular, massive use of PWLFIT was done in the 90’s
when it was utilized to model interconnects, power distribution
planes, I/O nonlinear cells and power/ ground supply ports
of active devices (drivers, receivers) and to perform a fast
post-layout exhaustive simulations of printed circuit boards
or even multi-board systems [29]–[31]. An overview of the
applications fields of DWS is reported in [32] along with a
specific application of the PWLFIT method to lossy TLs in
the multigigabit speed range. Recently, the wave digital filter
approach has received a renewed interest from the research
community as a valuable alternative to standard circuit solvers
[33]–[36].
The main contributions of this work are twofold: the defi-
nition of an automated framework for the calculation of PWL
models, in addition to the (manual) graphical approach used so
far, and the detailed description of the SFC method based on
a PWC representation of the S-parameters impulse response.
It is important to remark that the SFC method described in
Section V is general and it can be implemented in a wide range
of software environments, such as Matlab1
or C++. However,
it was originally implemented in a DWS, via a suitable
representation through finite impulse response (FIR) scattering
elements. Hence, the efficiency of PWLFIT is combined to the
features of the DWS environment, such as high computational
speed, accurate Trasmission Line Modeling (TLM), stability,
ability to process nonlinearities without iterations and linear
growth of processing times with respect to the complexity of
the network considered [32], [37].
III. S-PARAMETERS STEP RESPONSE
The standard S-parameters representation of a linear time
invariant (LTI) system in time domain reads:
b (t) = s (t) ∗ a (t) =
t
0
s (t − τ) a (τ) dτ (1)
Hence, the S-parameters coincide with the reflected waves
when the incident ones are delta-function pulses, a (τ) =
δ (τ). If the incident waves are represented by a step at each
port, a (τ) = u (τ), we have:
bs (t) = s (t) ∗ u (t) =
t
0
s (t − τ) u (τ) dτ (2)
=
t
0
s (t) dt · u (t) = S (t) · u (t)
Since the step response can be obtained by integrating the
impulse response, it is easy to verify that the following relation
holds between the standard S-parameters and the S-parameters
step response:
s (t) =
dS (t)
dt
(3)
From (2), it is also clear that, while in general the relation
between the incident and reflected waves is of the convolu-
tional type involving the S-parameters, the step response is
proportional to the input steps through the S-parameters step
response, namely S (t).
It is to be remarked that the impulse response s (t) can
always be recovered by the step response S (t) through a
simple time derivative, as in (3).
Although the two approaches are theoretically equivalent for
LTI systems, there are several reasons which make the step
response more appealing than the impulse response. Some of
them are:
• The S-parameters step response S (t) can be eas-
ily obtained by means of time domain reflectometry
(TDR/TDT) measurements. Modern vector network an-
alyzer (VNA) instruments support TDR/TDT emulation
via sophisticated post-processing techniques [38], [39].
• The S-parameters step response provides DC data as well.
• If the reference impedance of the measurement and/or
simulation is properly chosen, the time-domain S-
parameters step responses normally show relatively short
duration before reaching steady state (DC) conditions.
This effect is due to the damping effect of the reference
resistances at the ports of the device under test (DUT).
• The frequency content of a step decreases with the
frequency, while that of a pulse extends to infinity.
1The Mathworks Inc., Natick, MA, USA.

4. IV. PIECEWISE-LINEAR MODELING
Let us assume that the time-domain S-parameters step
response of the DUT has been evaluated for a finite set
of time samples via TDR/TDT measurements or numerical
simulations: the goal is to compute a corresponding PWL
representation.
Hence, the problem at hand can be formulated as follows:
given a finite set of time samples tj for j = 1, . . . , M defined
in t ∈ [tmin − tmax] and the corresponding step response
values Sj = S (tj), the desired time-domain PWL model
SP W L (t) with N segments can be computed by identifying
the pairs (ti, Si) for i = 1, . . . , N that define the extreme
points of each linear segment, indicated as breakpoints in
the rest of the contribution. It is important to remark that
such PWL model will be used to accurately and efficiently
compute the output signals of the system under study via the
convolution operator, as described in Section V. Due to the
properties of the convolution operator, it is possible to model
each element of the time-domain scattering parameters step
response matrix independently from the others. This leads to
a significant reduction in the computational complexity of the
model building phase and allows one to model in a parallel
framework the different elements of the S-parameters step
response matrix. As a result, the PWLFIT method is described
in the following for samples of a scalar function Sj rather than
a matrix Sj.
In order to compute the desired PWL model, a novel two-
stage algorithm is adopted: first, an iterative approach is used
to identify the N breakpoints giving a sufficiently accurate
PWL model; then, the values of Si for i = 1, . . . , N obtained
so far are modified in order to reduce the error of the PWL
model in a least-squares sense. In particular, the iterative
algorithm can be described as follows:
1) A linear model is computed using the two breakpoints
given by (tmin, Smin) and (tmax, Smax).
2) The next breakpoint is chosen where the absolute error
between the data and the model is higher. The PWL
model is updated by adding the new breakpoint.
3) If the root mean square error between the PWL model
and the data is higher than a chosen threshold, the
procedure is repeated from step 2.
Let us indicate with tM
j and SM
j the set of all the M
time samples considered and the corresponding S−parameter
values, while tN
i and SN
i represent the same quantities for
the N breakpoints computed so far. Note that, in the iterative
modeling algorithm, the following holds: tN
i ⊂ tM
j and
SN
i ⊂ SM
j . While several techniques exist in the literature
to identify the breakpoints of a PWL model [40]–[42], the
iterative algorithm has been chosen due to its efficiency and
ease of implementation. It offers a limited computational cost
even when thousands of samples ti are considered: at each
iteration only the absolute error between the model and the
data must be computed.
Finally, the PWL model obtained so far can be refined
in an extra post-processing step to improve its accuracy
without increasing the number of breakpoints N. This is a
desirable characteristic, since the model efficiency in time-
domain simulations depends on N, as described in Section
V.
Now, the problem at hand can be formulated as:
min
Si for i=2,...,N−1


M
j=1
|Sj − SP W L (tj)|
2

 (4)
0 0.5 1 1.5 2
Time [ns]
0
0.5
1
StepResponse
0 0.5 1 1.5 2
Time [ns]
0
0.05
0.1
Abs.Error
Fig. 1. Example of the PWLFIT strategy. Top: S-parameters step response
(full blue line) and PWL model with N = 15 without post-processing (orange
dashed line). Bottom: Corresponding absolute error.
0 0.5 1 1.5 2
Time [ns]
0
0.5
1
StepResponse
0 0.5 1 1.5 2
Time [ns]
0
0.05
0.1
Abs.Error
Fig. 2. Example of the PWLFIT strategy. Top: S-parameters step response
(full blue line) and PWL model with N = 15 after post-processing (red
dashed line). Bottom: Corresponding absolute error.
where SP W L (tj) is the output of the PWL model evaluated
on tj for j = 1, . . . , M. It is important to note that the
value of the first and last breakpoints are not modified in (4).
Indeed, as indicated above, they correspond to the first and last
sample of the of the S-parameters step response, respectively.
Such samples bear important physical meaning: the first one
is computed for t = 0 and it is bound by causality, while
the last sample defines the system DC behavior [37]. The
problem outlined in (4) can be easily formulated as a system of
equations, which can be solved via a suitable linear system: in
particular, the public-domain Matlab routine lsq_lut_piecewise
(Copyright (c) 2013, Guido Albertin, available at:
http://www.mathworks.com/matlabcentral/fileexchange/)
was used for this purpose. Now, let us indicate with ¯Si for
i = 1, . . . , N the breakpoints obtained by solving (4) and
with ¯S
N
i the corresponding compact representation. The main
difference between the breakpoints (tN
i , SN
i ) computed by
the iterative approach outlined above and the ones obtained
by solving (4) is the following: ¯S
N
i ⊂ SM
j .

5. Initial Breakpoints
No
Post-processing
j=1
Yes
S-parameters step response
evaluated at [ tj ]l=1
LM
j=1
PWL Model with
(ti , Si )N N
Accuracy
Reached?
Add new breakpoint
PWL Model with
(ti , Si )N N
Fig. 3. Flowchart of the PWLFIT breakpoints extraction.
In general, the problem of improving the accuracy of a
PWL model could be formalized (and solved) differently than
(4). For example, it is possible to change the breakpoints
location tN
i , rather than their value SN
i . In this work, a linear
system formulation has been adopted for the post-processing
given its robustness, accuracy and computational efficiency.
In particular, the post-processing algorithm shows significant
advantages when the number of breakpoints is relatively
limited: a huge simulation speedup can be achieved while
ensuring high simulation accuracy. Figures 1 and 2 show an
application of the PWLFIT modeling strategy before and after
the post-processing, respectively, when only 15 breakpoints are
used. The S-parameters step response has been normalized
between 0 and 1 in such figures, for clarity. Note that, the
post-processing step improves the modeling accuracy not only
in the dynamic transient, but also when the step response
approaches the DC value. In particular, the PWL model error
depends on the oscillations in the time-domain response before
reaching steady state, which is a typical situation for dynamic
systems (see Section VI): without employing a post-processing
phase, it is not possible to reduce such error unless additional
breakpoints are considered.
As concluding remark, the novel procedure outlined above
presents a PWL model-building phase defined in an automated
framework: only the desired error threshold of the root mean
square error between the PWL model and the data must be
specified by the user. The flowchart of the method is shown
in Fig. 3.
V. SEGMENT FAST CONVOLUTION
In order to explain how the PWL representation of the step
response enables to significantly accelerate the convolution,
we start from a generic convolution between the scattering
parameter impulse response h(t) and an incident wave a(t):
b (t) = s (t) ∗ a (t) =
t
0
s (t − τ) a (τ) dτ (5)
Fig. 4. Top: full convolution (FC). A time-window wave buffer contains the
M samples of the input signals, which are multiplied for the values of the
impulse response and then summed up. Bottom: segment fast convolution
(SFC). A wave buffer is defined for each segment of the PWL model along
with a related segment accumulator and the corresponding multiplicative
coefficient is the slope of the PWL segment.
Assuming a constant time step ts, the numerical discretization
of the convolution provides the discrete-time convolution
bj = (s0aj + s1aj−1 + · · · + sja0) ∆t (6)
=
j
k=0
skaj−k ∆t
If the transient scattering parameters step response is piecewise
linearly approximated as described in Section IV, in virtue of
(3), the corresponding scattering parameters impulse response
results to be PWC. It can be written as
s (t) =
Z
i=1
sirecti (t) (7)
where
si =
¯Si+1 − ¯Si
ti+1 − ti
; (8)
recti (t) =
1 if t ∈ [ti, ti+1]
0 if t ∈ [ti, ti+1].
(9)
Note that (ti, ¯Si) is the i-th breakpoints and Z = N − 1
is the number of time windows (segments) of the PWL
approximation computed in Section IV. Furthermore, it is
interesting to remark that the frequency-domain representation
of the PWC model (7) can be analytically computed.
Upon (7) and (8), the convolution (5) can be rewritten as
b (t) =
Z
i=1
si
ti+1
ti
recti (t − τ) a (τ) dt (10)

6. It is convenient to separate the Z-th time window from the
previous ones as
b (t) =
Z−1
i=1
si
ti+1
ti
a (τ) dτ + sZ
tZ+1
tZ
a (τ) dτ (11)
In a discrete form, (11) reads
bj =
Z−1
i=1
si∆t
MZ−1
k=1
ap+k + sZ∆t
j−MZ−1
k=1
ap+k (12)
where Mi is the number of samples in the i-th time window
and p =
Z−1
r=1 Mr is the cumulative number of time samples
in the time windows before the Z-th. It is worth noticing
that the first term in (12) is already known at time step
t ∈ [tZ, tZ+1] and does not need to be recomputed when the
last time-window is considered. It reads
ΨZ−1 =
Z−1
i=1
si∆t
MZ−1
k=1
ap+k =
Z−1
i=1
Φi (13)
where
Φi = si∆t
MZ−1
k=1
ap+k (14)
Furthermore, in a fixed time-step digital processor like DWS,
the second term in (12) can also be written in a more compact
way as
sZ∆t
j−MZ−1
k=1
ap+k = Φj−1
Z + sZ∆taj (15)
where
Φj−1
Z = sZ∆t
j−MZ−1−1
k=1
ap+k (16)
Hence, the discrete form of the convolution, (12) can be recast
as
bj = ΨZ−1 + Φj−1
Z + sZ∆taj (17)
From (17) it is evident that the j-th sample of the reflected
wave bj is computed just by adding the contribution of the j-
th sample of the incident wave aj to the past history which is
already known. It is also worth to observe that SFC scheme is
completely independent on the number of poles which could
be used to approximate the frequency response by adopting
the VF algorithm [11]. Its computational complexity is strictly
related to the number of breakpoints used to approximate the
S-parameter step response in a piecewise-linear way. This
leads to a significant reduction in the number of operations
with respect to the “full" convolution (FC), expressed by (6).
It is important to remark that equations (6) and (17) can be
implemented as suitable FIR blocks, as shown in Fig. 4. FIR
digital blocks are commonly used in DSP thanks to their
stability properties, due to the absence of poles except in the
origin of z-plane, in their transfer function. In particular the
structure of each segment buffer with his accumulator of Fig. 4
recalls that of a low-pass Moving Average Filter (MAF), well
known in the DSP field. The numerical properties of MAFs,
including their high computation speed, are shown in [43, Ch.
15], [44]. Hence the SFC can be also seen as the sum of the
outputs of a cascade of low-pass MAF blocks each multiplied
by a constant depending on individual segment’s slope. The
number Mi of points averaged by each segment depends on
the chosen time-step (see Fig. 5).
A. Computational cost analysis
A general formula to estimate the speedup of the SFC based
on the PWLFIT method, with respect to the standard FC, can
be derived starting from the time window TW where the step
response is defined, the number of breakpoints N of the PWL
model and the time-step Tst used for the simulations. Let us
consider the situation shown in Fig. 4: the most significant
contributors to the computational time are the arithmetic op-
erations necessary to perform the convolutions, multiplication
and addition. The rest is due to the access time required to
read or write wave buffer positions and could be neglected if
compared to the arithmetic operations. At each time step, the
time TF C required to calculate the FC output is proportional
to the number of additions and multiplications involved, that
in turn is equal to the number M of buffer cells:
TF C = (Tadd + Tpr) M = (Tadd + Tpr) INT
TW
Tst
(18)
where Tadd and Tpr are the time needed to perform addition
and a multiplication, respectively, and INT(·) represents the
operation of rounding up to an integer number.
Now, the time required at each time step to perform the
SFC can be written as
TSF C = (3Tadd + Tpr) (N − 1) (19)
This relation holds because updating any segment accumulator
requires only to add the new wave sample and to subtract the
oldest one from the current accumulated value. Thanks to (18)
and (19), the speed up ratio can be written as:
TF C
TSF C
=
Tadd + Tpr
3Tadd + Tpr
M
N − 1
=
Tadd + Tpr
3Tadd + Tpr
INT (TW /Tst)
N − 1
(20)
As long as N << M, the segment fast convolution offers a
relevant computational efficiency. Indeed, the speedup factor
with respect to the full convolution is inversely proportional to
the simulation time step and was found to range from 1 to 3
orders of magnitude in practical applications. For the interested
reader, a detailed comparative analysis of the computational
cost estimated via (20) with respect to the measured one
(depending on the given CPU and the specific compiler options
used to get the object code) is reported in a separate document
[45].
B. Comparison with other techniques
The flowchart of the BTM method is shown in Fig. 5. In
general, the simulation time step is chosen on the basis of the
desired overall simulation accuracy and is normally different
from the time step of the samples describing the step response
of system. In this case, a preliminary operation is required
before computing the convolution, which is represented in Fig.
5 by the element “time step T interpolation”: for the SFC only
the breakpoints times are interpolated, while all the samples
of the original step response must be interpolated if the FC
is adopted. Obviously, the interpolation is not necessary when
the simulation time step is coincident or multiple of the source
samples step.
The method outlined so far can be classified as a time-
domain macromodeling technique. In this respect, it requires
the S-parameter step response to be made available via mea-
surements (i.e. TDR/TDT) or numerical simulations including
3D EM time-domain solvers. Hence, it differs significantly
from frequency-domain approaches such as the VF algorithm

7. [11], [12], which require the preliminary knowledge of the
frequency response of the system under study. In particular,
the PWLFIT model complexity (order) depends on the number
of segments required to achieve the desired approximation of
the S-parameters step response, while the number of poles
and residues determines the complexity of a VF-based rational
model. However, four main elements deserve to be pointed out:
• When modeling the transfer function of multiport systems
via VF, a common pole set is usually adopted for all
the elements of the corresponding scattering matrix. This
condition leads to computational advantages when per-
forming time-domain simulations based on the computed
VF model [11], but it is not necessary for frequency-
domain analyses. The same does not hold for PWLFIT
, since each element of the S-parameters step response
matrix can be modeled independently from the others,
potentially leading to a parallel implementation of the
method described in Section IV.
• The PWLFIT model does not require a post-processing
step to ensure passivity, which is necessary for VF-based
rational models [18]. This operation can be computation-
ally expensive if the system has a high number of ports
or in presence of a high number of poles, and can reduce
the overall model accuracy.
• The VF algorithm can be applied to different types of
transfer function representations, such as impedance or
admittance parameters, and it is has been adopted in
several parameterized macromodeling methods, such as
[46], [47], while PWLFIT can have some restrictions due
to time-domain duration of the step response.
• The SFC requires the adoption of a fixed time step when
evaluating the system response, this is not necessary with
VF, both in the model building and simulation phase.
The PWLFIT method is also different with respect to the
algorithm outlined in [19], where the time-domain impulse
response is recovered through the IFFT of a frequency-
domain measurement or EM simulation, thus resulting a mixed
frequency/time domain method. While both the algorithms
described here and in [19] aim at accelerating the calculation
of the time-domain convolution, the solution proposed is
substantially different: in [19] the corresponding convolu-
tion scheme is accelerated by ignoring the impulse response
samples which are sufficiently small; while the method here
described is based on a PWC model of the impulse response,
computed starting from a PWL approximation of the step
response. Fitting the S-parameters step response offers several
advantages, as described in Section III; furthermore, PWLFIT
does not require the IFFT of frequency tabulated data, which
is prone to artifacts related to the sampling and the limited
bandwidth considered.
C. Advantages of the DWS environment
The PWLFIT method allows one to perform the time-
domain convolution of general linear and passive systems very
efficiently, thanks to a PWC approximation of the impulse
response. Hence, it can be implemented in any software
environment, such as Matlab or C++, and it can be generalized
in a voltage and current framework, rather than in the wave-
domain here considered.
However, the DWS environment offers several advantages.
First of all, since it is defined in digital wave signal processing
(DSP) framework emulating the network under analysis, it is
naturally compatible with the simulation of time-domain S-
parameters mapped as scattering blocks. Next, it allows one to
Fig. 5. Flowchart of the BTM method alternatives based on PWLFIT
modeling with related segment fast convolution (SFC, left) or full convolution
(FC, right).
maximize the speedup peculiar of the SFC method, since DWS
is significantly faster than conventional nodal analysis tools
and shows a linear growth of the simulation time with respect
to the network complexity. The overall simulation accuracy
can be easily controlled by choosing a suitable simulation time
step. Finally, its excellent stability [32] allows one to solve a
wide range of complex problems with the PWLFIT method.
VI. NUMERICAL RESULTS
A. Clock input port of a SIM card
This example describes a PWLFIT application starting from
actual TDR measurements, as shown in Fig. 6. The device to
be modeled is a SIM card, a very common integrated circuit,
and, in particular, its clock input port. In order to verify the
effect of TDR settings on measurement accuracy, two different
time windows (2ns and 5ns) have been chosen to acquire the
reflection coefficient with 2000 averaged (128 averages per
sample) samples, each with a time step ∆T. The initial pure
delay fraction of each response has been discarded by properly
choosing the beginning of device’s port contribution, leading
to the following sample sets:
• t ∈ [0 − 1.9190] ns, with ∆T = 1 ps;
• t ∈ [0 − 4.6975] ns, with ∆T = 2.5 ps;
Considering the total number of effective samples M obtained
after delay cancellation, in the following we will refer to
the two TDR measurements as File 1920 and File 1880,
respectively. In general, the time window must be wide enough
to include the estimated steady state (DC) level, while the
effect of scale settings can be evaluated in the frequency-
domain. Figure 7 shows the magnitude of the S-parameter
in the range [.01 − 30] GHz estimated via a virtual VNA
(VVNA) implemented in DWS [48] to avoid FFT artifacts,
starting from File 1920 and File 1880: the influence of the
measurement scale setting becomes relevant after 10 GHz,
where significant differences (in the order of 5dB) can be
detected between the two spectra. The 500 ps/div scale (File

8. Fig. 6. Example A. Measurement setup of the S-parameter step response of
a SIM card clock input including a CSA803C TDR equipped with two SD24
heads (17 ps rise time) and a 50 mm long semi-rigid coaxial cable directly
soldered to the DUT port.
0 5 10 15 20 25 30
Frequency [GHz]
-60
-50
-40
-30
-20
-10
0
|S(f)|[dB]
Fig. 7. Example A. Magnitude of the S-parameters estimated via VVNA
from actual TDR measurements for File 1920 (full blue line) and File 1880
(dashed red line).
1880) is less acccurate than the 200 ps/div scale (File 1920) at
the highest frequencies. The VVNA emulates a real VNA by
means of a sweep-frequency sinusoidal signal source, a peak
detector and a phase meter defined as DWS subcircuits, while
the DUT is described by its BTM (FC) model derived from its
step response. The VVNA sweep time is chosen as a tradeoff
between simulation time and accuracy. A 1.5 msec total sweep
time is used in this case for a maximum frequency of 30 GHz,
while the DWS time step is 2 ps for a total of 750 Million
calculated samples [48].
A de-embedding step should be required to remove the
effects of the TDR setup on the acquired response [49].
However, since the de-embedding procedure influences only
the data acquisition phase, it has not been adopted in this
case, for simplicity reasons. The interested reader can refer to
[32] for detailed information on this topic.
Next, PWL models with 16, 33 and 56 breakpoints have
been computed for both cases, following the method described
0 1 2 3 4
Time [ns]
0
0.2
0.4
0.6
0.8
1
1.2
1.4
S-paramStepResponse
Fig. 8. Example A. Measured reflection coefficient (File 1880, full blue line)
and corresponding PWLFIT model with 16 breakpoints (PWL16,dashed red
line).
TABLE I
EXAMPLE A. PWL MODELS ACCURACY
File Name Breakpoints RMS MaxE
1880 16 0.0099 0.0298
1880 33 0.0046 0.0128
1880 56 0.0015 0.0052
1920 16 0.0125 0.0326
1920 33 0.0050 0.0139
1920 56 0.0017 0.0064
TABLE II
EXAMPLE A. SIMULATION TIME PWL 16 FOR FILE 1880
Time Step (ps) Time FC (s) Time SFC (s) Speed up
0.5 832 4.1 202×
1 210 1.8 116×
2 49 1.2 41×
5 9 0.5 18×
10 3.5 0.3 12×
20 1 0.2 5×
in Section IV, in order to show the effect of the model com-
plexity on the SFC performance. Even with a limited number
of breakpoints, the PWL models offer a fair time-domain
accuracy, as shown in Fig. 8. Some breakpoints do not belong
to the one-port S-parameters step response, representing the
DUT reflection coefficient, due to the post-processing step
performed by solving (4). The root mean square error (RMS)
and maximum absolute error (MaxE) for all the PWL models
considered are shown in Table I. The model building phase is
very efficient: each PWL representation in Table I has been
computed in less than 0.05 s on a laptop equipped with an
Intel Core i7-6700HQ and 16 GB of RAM.
Now, the desired PWL approximation of the S-parameters
step response has been analytically computed, as indicated in

9. 0 0.5 1 1.5 2 2.5
Time [ns]
0
1
2
Voltage[V]
0 0.5 1 1.5 2 2.5
Time [ns]
0
10
20
30
Abs.Error[mV]
Fig. 9. Example A. Top: Time-domain simulations via FC of File 1920 (full
blue line) and via SFC with 16 (red dashed line) and 56 breakpoints (green
dots). Bottom: Corresponding absolute error.
Section V, and time-domain simulations have been performed
by DWS directly using these PWL descriptions on a computer
equipped with an Intel Core i7-2630QM and 8GB of RAM,
considering as input source a 50 ohm step generator defined
in t ∈ [0 - 10] µs, with 2 V amplitude and 5 ps rise time.
The choice of a relatively large simulation window is made
to ensure an accurate estimation of the calculation times of
the proposed method, as indicated in [45]. Note that the input
signal considered has a bandwidth with significant components
up to 20 GHz, which is outside of the standard operating
condition of a SIM card. However, this choice allows us to
verify the numerical performance of the PWLFIT method for
high-speed digital signals when the macromodel of a modern
integrated circuit is considered: hence, it is a relevant case
study. Representative simulation results are shown in Fig. 9:
compared with the FC, the SFC based on 56 breakpoints shows
an excellent result when compared to measurement accuracy,
with a maximum absolute error lower than 6 mV. Even the
model with only 16 breakpoints offers a good accuracy for
digital applications. Note that the DC level is estimated accu-
rately, since the last breakpoint for all models corresponds to
the last sample of the S-parameters step response, as indicated
in Section IV. A comparison of the simulation time for the FC
and the SFC based on the model with 16 breakpoints is shown
in Table II for File 1880. The SFC shows a speedup factor of
one to two orders of magnitude, depending on the simulation
time step considered: the speedup increases for small time
steps, as predicted by (20).
In the following, a comparison is performed between PWL-
FIT and VF-based models. The one-port reflection estimated
by DWS simulation via VVNA, starting from the TDR mea-
surement File 1920. The VVNA is chosen in order to avoid
numerical artifacts of FFT-derived reflection, that affects the
spectrum starting from about 3 GHz. On the basis of the
bandwidth of TDR measurement setup, a [20 MHz - 20 GHz]
frequency range is considered to compute the VF model. A
rational model with 57 poles has been obtained via the VF
algorithm, setting -45 dB as threshold for the mean absolute
error between the measured S-parameter and the model re-
sponse in the entire bandwidth. Next, the rational model is
converted into a state-space representation [11] and then into
0 0.5 1 1.5 2 2.5
Time [ns]
0
1
2
Voltage[V]
0 0.5 1 1.5 2 2.5
Time [ns]
0
10
20
30
Abs.Error[mV]
Fig. 10. Example A. Top: Time-domain simulated step responses of File 1920
(full blue line) FC model and related VF-based model (green dashed line).
Bottom: Corresponding absolute error.
Fig. 11. Example A. Superposition of the inner contours of the worst case
eye diagrams of the Simcard clock input simulated by DWS with a 100 Ω
reference impedance at 1Gbps using both FC and different order SFC (PWL)
models. Scale x: 100 ps/div, Scale y: 200 mV/div.
an equivalent SPICE-like circuit, computed via the technique
[13]. Finally, time-domain simulations based on the obtained
circuit have been performed using LTSPICE2
using the same
circuital configuration adopted for the PWLFIT models to be
compared. The time-domain step response of the VF model
is quite similar to the corresponding FC model, as shown in
Fig. 10. Due to the VVNA limitations in the estimation of
the S-parameter at low frequencies, the VF-based model is
affected by an error of few mV in the estimation of the DC
value. Several comparative tests have been performed using a
test circuit based on a 50 MHz square wave signal generated
by a 75 ohm voltage source connected to the DUT thru a 100
ohm, 500 ps delay TL that models a 100 mm long microstrip
interconnect. Two situations were considered, fan out of 1 with
a single DUT connected at the far end of the TL and fan out of
10 where 10 DUTs are connected in parallel. Using a Tstep
of 1ps for DWS and an equivalent Tmax for LTSPICE the
measured speedup (PWL16 vs 57 poles VF) is 100X for the
fan out 1 and 310X for the fan out 10. This significant increase
of simulation time using the VF model in LTSPICE is due to
the exponential growth of computation cost versus network
complexity typical of Spice-derived simulators.
As final remark, the contours of the worst-case eye-diagram
2Linear Technology Corporation, part of Analog Devices, Inc., Norwood,
Massachusetts, USA.

10. 2
1
hd
tc
tc
s1
vs
vs
tc
wc s2 wc
vs
vs
tc
s1
1
2
Fig. 12. Example B. Structure of the coplanar striplines circuit.
(WCED) for all the PWL models indicated in Table I and
their corresponding measurement files (1880 and 1920) are
all shown superimposed in Fig. 11. These contours have been
computed by DWV, the companion graphic environment of
DWS, at a bit-rate of 1 Gbps using a reference impedance of
100 Ω. Only 16 breakpoints are enough to describe the device’s
behavior in the time-domain with good accuracy: increasing
the number of breakpoints has a very limited effect on eye
diagram contours.
B. Coplanar striplines
The second numerical example is simulation-based: it de-
scribes the flexibility of the PWLFIT modeling, which is
implemented in Matlab rather than DWS, and illustrates its
application to multiport systems. In particular, two coplanar
striplines are embedded in a dielectric, as shown in Fig. 12 and
backed by two metallic planes. The conductivity of striplines
and planes is σ = 5.7 · 107
S/m. The relative permittivity
of the dielectric is εr = 4. The blue lines represent the
ports. The geometric parameters in Fig. 12 are the following:
1 = 40 mm, 2 = 14 mm, s1 = 5 mm, s2 = 2 mm,
vs = 10 mm, hd = 20.95 mm and tc = 50 µm. The
digital wave implementation of the Partial Element Equivalent
Circuit (DW-PEEC) method [50], [51] has been adopted to
compute the step response. The geometry has been discretized
by a Manhattan type mesh having 1500 branches and 288
nodes, resulting in a model with N = 2568 unknowns.
Figure 13 shows both the voltage incident wave at the output
port as computed using the original DW-PEEC model and
the corresponding PWLFIT model with 42 breakpoints. The
comparison between the frequency spectrum of the original
and PWL differential transfer impedance Z12 obtained with
a different number of breakpoints (42, 89, 203) are shown in
Fig. 14. It is clearly seen that even using only 203 breakpoints
a very good approximation is achieved up to 10 GHz.
The robustness of the models is tested by applying a random
bit sequence modeled as trapezoidal pulses with different
lengths and rise times as input of the striplines. The striplines
have been terminated on 50 Ω resistances. The input port is
excited with a unit step current. The transient response has
been computed over a time window of 100 ns with a 5 ps
time step, for 2 · 104
samples by the DW-PEEC model using
the PWLFIT macromodel. The voltage at the output port is
shown in Fig. 15 along with the corresponding error. A good
agreement is achieved, confirming the accuracy of the method.
Finally, the speedup of the PWLFIT model using 42 break-
points is measured by comparing its CPU calculation time
0 1 2 3 4 5
Time [ns]
0
5
10
15
Voltage[V]
DW-PEEC
PWL
Fig. 13. Example B. Voltage incident wave at the output port computed by
the DW-PEEC solver and using the PWLFIT model with 42 breakpoints.
0 2 4 6 8 10
Frequency [GHz]
10-13
10-12
10
-11
|Z12
|[]
DW-PEEC
PWL 42
PWL 89
PWL 203
Fig. 14. Example B. Differential transfer impedance spectrum related to the
FC and SFC models with a different number of breakpoints.
with those of the original DW-PEEC implementation and the
FC model: also in this case the SFC algorithm offers a relevant
computational advantage, according to (20) as reported in
Table III, where the computation time of the DW-PEEC model
are used as reference. Additional comparative tests on this
case, performed by means of DWS simulations carried out on
graphically extracted PWLFIT models [28], are shown in [45].
More detailed applications and updates of the BTM method
can be found in the DWS/PWLFIT project [52].
VII. CONCLUSIONS
This paper describes PWLFIT, a time-domain macromod-
eling technique for linear multiport systems. It is based on a
PWC approximation of each S−parameter’s impulse response
calculated starting from a PWL model of the step response
obtained by TDR/TDT measurements or equivalent numerical
simulations. When this model is utilized, an efficient segment
fast convolution (SFC) is implemented, taking advantage of the
computed PWC representation. The benefits of this method are
multifold and can be summarized in simplicity, stability, speed

11. 0 20 40 60 80 100
Time [ns]
0
0.2
0.4
0.6
Voltage[V]
DW-PEEC
PWL
0 20 40 60 80 100
Time [ns]
0
1
2
Abs.Error[V]
10-3
Fig. 15. Example B. Voltages at the output port of the coplanar stripline
when a random bit sequence is used as input.
TABLE III
EXAMPLE B. CPU TIMES FOR 2 × 104 TIME STEPS SIMULATIONS ON A
100 NS TIME WINDOW
CPU time [s] Speed up
DW-PEEC 529.75 -
FC 2.86 185×
SFC 0.20 2580×
and scalability. Simplicity because the model extraction phase
consists only on determining the segments approximating each
S−parameter step response within a user-defined error. This
can be carried out in an automated way, leveraging on a fast
and robust PWL fitting procedure. Furthermore, a parallel
computation can be performed, because each S−parameter
of a multiport network can be modeled independently. Model
stability is due to the FIR implementation that is inherently
stable, because it does not have poles in its transfer function
except in the origin of the z-plane, but only zeroes. High
calculation speed is achieved by the SFC that typically shows
a speedup of one to three orders of magnitude with respect to
the FC, because its computational complexity is strictly related
to the number of segments used to model the S−parameter
step response in a piecewise-linear way. The speedups can
be predicted by formulas taking into account the simulation
parameters. Both stability and speed are enhanced when this
method is implemented in the wave-domain as happens using
the general-purpose simulator DWS. Measured speedup of
DWS/PWLFIT versus Spice/VF, at equivalent model accuracy,
is in the order of 100X for a single model and grows
exponentially with the number of modeled elements in the
simulated network. Finally, an excellent scalability is observed
because the accuracy goals can be easily scaled by modulating
the number of segments of the PWL representation, even in
a specific portion of the time-domain response. The PWL-
FIT method could also be extended to Spice-like simulators
supporting fixed time-step, even if in this case the peculiar
advantages of DWS will be lost. The methodology is alter-
native and complementary to frequency-domain approaches:
PWLFIT is particularly well suited for time-domain native
applications such as digital SI/PI, where the typical signals
involved are pulses, while VF-based methods are suited for
frequency-domain native applications.
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Piero Belforte was born in Turin in 1947, re-
ceived his Laurea degree in Electronics Engineering
summa cum laude in 1970 from the Politecnico of
Turin. From 1970 to 2000 he worked in CSELT,
the Research Center of Telecom Italia. In 1975 he
started the development of high-speed modeling and
simulation tools using innovative DSP algorithms
for fast computer simulation of high-speed elec-
tronic systems. In 1988 he founded and directed
the company HDT (High Design Technology) for
the development of state-of-the art CAE tools for
SI/PI/EMC prediction based on digital wave simula-
tion. From 2001 he continues his research activity as independent researcher.
He is author of several publications and international patents in the field of
digital electronics with reference to digital switching systems and techniques
for telecom networks, high-speed electronics, SI/PI, circuital modeling and
simulation, EMC and test equipment for high performance digital systems.
Domenico Spina (M’15) received the M.S. degree
(cum laude) in electronics engineering from the
University of L’Aquila, L’Aquila, Italy, in 2010,
and the joint Ph.D. degree in electrical engineering
from the Ghent University, Ghent, Belgium, and
the University of L’Aquila in 2014. Since 2015, he
has been a Postdoctoral Researcher in the Depart-
ment of Information Technology, Ghent University.
His current research interests include modeling and
simulation, uncertainty quantification, and machine
learning for electrical and photonics engineering.
Luigi Lombardi received the Laurea degree (cum
laude) in electronic engineering in 2015 and the
Ph.D. degree in 2019, both from the University of
L’Aquila, L’Aquila, Italy. Since November 2018 he
is with Micron Semiconductor.
Giulio Antonini (M’94 - SM’05) received the Lau-
rea degree (cum laude) in electrical engineering from
the University of L’Aquila, L’Aquila, Italy, in 1994
and the Ph.D. degree in electrical engineering from
University of Rome La Sapienza in 1998. Since
1998, he has been with the UAq EMC Laboratory,
University of L’Aquila, where he is currently a
Professor. His scientific interests are in the field of
computational electromagnetics and published more
than 250 papers published on international journals
and conference proceedings. He has coauthored the
book Circuit Oriented Electromagnetic Modeling
Using the PEEC Techniques, (Wiley-IEEE Press, 2017).

13. Tom Dhaene (M’00-SM’05) received the Ph.D.
degree in electrotechnical engineering from Ghent
University, Ghent, Belgium, in 1993. He was a Re-
search Assistant with the Department of Information
Technology, University of Ghent, Ghent, Belgium,
from 1989 to 1993. In 1993, he joined the Electronic
Design Automation Company Alphabit (now part
of Agilent), Santa Clara, CA, USA. He was one
of the key developers of the planar EM simulator
ADS Momentum. In September 2000, he joined the
Department of Mathematics and Computer Science,
University of Antwerp, Antwerp, Belgium, as a
Professor. Since October 2007, he has been a Full Professor in the Department
of Information Technology, Ghent University. He is the author or coauthor
of more 250 peer-reviewed papers and abstracts in international conference
proceedings, journals, and books. He holds five U.S. patents.
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