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GPU Performance Prediction Using High-level Application Models
The document presents a methodology for predicting GPU performance using high-level application models, focusing on the behavior of applications when executed on GPUs. It outlines the objectives, related works, and details issues like data transfer, memory access, and branch divergence that impact GPU programming. The performance prediction engine will consider various factors, including branch divergence and memory access patterns, in its predictions.
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GPU Performance Prediction Using High-level Application Models
- 1. Filipo Novo Mór Advisors: Dr.César Augusto Missio Marcon Dr. Andrew Rau-Chaplin GPU Performance Prediction Using High-level Application Models ERAD 2014 presentation 2014 March Pontifical Catholic University of Rio Grande do Sul Faculty of Informatics Postgraduate Programme in Computer Science
- 2. Outline • Objectives • RelatedWorks • Graphic Processor Units • Methodology • Performance Prediction Engine • Work Schedule
- 3. Objectives • To modelapplications in high-level in order to predict their behaviour when running on GPU. – Secondary goals: • To create a description of a high-level model for the target GPU architecture. • To evaluate the impact of using different cache sizes on the tested applications 3 / 17
- 4. Related Works • Theoreticalworks: app. arch. CUDA HLRA An Adaptive Performance Modeling Tool for GPU Architectures Baghsorkhi et all no yes source code no performance prediction and bottleneck indicators Cross-architecture Performance Predictions for Scientific Applications Using Parameterized Models Marin and Mellor- Crummey yes yes source code no performance prediction An Analytical Model for a GPU Architecture with Memory-level and Thread-level Parallelism Awareness Hong and Kim no no source code no performance prediction. Also proposed two new metrics for GPU modelling, MWP and CWP Exploring the multiple-GPU design space Schaa and Kaeli no yes source code no performance benchmark A Quantitative Performance Analysis Model for GPU Architectures Zhang and Owens no yes source code no performance benchmark yes yes no yes performance prediction authorswork modelling inputs outputs this work 4 / 17
- 5. Related Works • Applicationtools: work authors inputs outputs target architecture Barra Collange et all CUDA source code execution measurements NVIDIA Tesla GPU_Sim Bakhoda et all CUDA source code execution measurements NVIDIA Tesla and GT200 GPU Ocelot Diamos et all CUDA source code execution measurements PTX 2.3 (CUDA 4.0) HLRA execution measurements NVIDIA GK110this work gpgpu-sim.org 5 / 17
- 6. Graphic Processor Unit Simplifiedarchitecture of a NVIDIA GPU 6 / 17
- 7. Graphic Processor Unit Simplifiedarchitecture of a NVIDIA GPU showing the internal sctructure of streaming multiprocessors 7 / 17
- 8. Graphic Processor Unit Whena thread block is assigned to a streaming multiprocessor, it is divided into units called WARPS. 8 / 17 Mohamed Zahran
- 9. Graphic Processor Unit SIMTvs SIMD • Single Instruction, Multiple Register Sets: each thread has its own register set, consequently, instructions may process different data simultaneously on different parallel running threads. • Single Instruction, Multiple Addresses: each thread is permitted to freely access non-coalesced memory addresses, given more flexibility to the programmer. However, this is a unsafe technique because parallel access to non-coalesced addresses may serialize transactions, which reduce performance significantly. • Single Instruction, Multiple Flow Paths: the control flow of different parallel running threads can diverge. 9 / 17
- 10. Graphic Processor Unit BranchDivergence 10 / 17
- 11. Graphic Processor Unit BranchDivergence 11 / 17
- 12. Graphic Processor Unit TheKey Challenges for GPU Programming • Data transfer between CPU and GPU • Memory access • Branch divergence • No recursion 12 / 17
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- 14. Methodology Validating • Applications willbe implement in CUDA as well as in HLRA. • Applications will be chosen accordind to its profile: – Computation vs Communication – Sizing 14 / 17
- 15. Performance Prediction Engine Aspectsto be considered by the engine • Branch divergence • Memory access – Local, Global, Shared and thread register block. • Thread synchronization • Loops 15 / 17
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- 17. Questions Filipo Novo Mór filipo.morat acad.pucrs.br