1. Fundamental Idea
2. Challenge 1- Power Efficiency
3. Challenge 2- Incompatible Interface
4. Challenge 3- Migration to new processor due to increased requirement
5. Conclusion
6. References
Fundamental Idea
Web services based on FPGA hardware have already been realized and defined [2], [3]. Their embedded nature
permits the developers to simply adjust those services to energetically interrelate with their surroundings and collect
Real-time measurement data or control various actuators [4]. These entities can be called environment-aware Web
services in difference to classical Web services that work on remote physical or virtual machines. In the modern era
IP address is added to the targeted VHDL Code design in order to make Internet of things (IOTs) enable VLSI Design.
Reference :- Ajay Rupani1 , Gajendra Sujediya2, A Review of FPGA implementation of Internet of Things
IoT Challenges That Can Be overcome
by
FPGA
Challenge 1 :- Power Efficiency
IoT devices are made to be always on for getting stimuli from the surrounding and perform certain tasks accordingly.
So “Always On” is the key to devices but this leads to consumption of huge power and the battery power wont last long.
Main power consuming elements:-
1. Main processor
2. Processor core at the wireless module
3. Display
Possible approach to solve this matter :-
1. Make the IoT device in sleep state and wait for any human interacting or human stimuli to make the device active again.
2. FPGA will determine depending on User command when to turn on or off the processors and display.
3. As per Xilinx if we use Artix-FPGA which consumes low power then it will be easy for us to develop power efficient IoT
Devices[6].
4. Power consumption comparison table for implementation of Secure hash Algorithm-3 on Xilinx FPGA[6].
Reference:-
Muzaffar Rao, Thomas Newe and Ian Grout, Secure Hash Algorithm-3(SHA-3) implementation on Xilinx FPGAs, Suitable for IoT Applications
Artix-7 FPGA
Challenge 2 :- Incompatible Interfaces
IEEE 1451 protocol focuses on those low-speed devices in IoT such as sensors, actuators, and transducers, while ignoring
other high-speed devices or equipment. To solve this issue FPGA was introduced[8].
With the continuous development of IoT applications, the IEEE 1451 is no longer suitable to handle the novel high-speed
devices, such as digital camera and USB devices.[8]
Market doesn’t fully accept IEEE 1451 because of the high resource cost and complexity for adopting the protocol. Normally, it
needs two physical processors for NCAP module and TIM module, as well as the 10-line TII interface is also difficult to be
implemented.[7]
Reference:- IEEE P1451.2, http://grouper.ieee.org/groups/1451/2 (2003, accessed 10 May 2015).
FPGA can be configured to be multi-core processors and deployed to process different modules in the whole system in
comparison to micro control unit (MCU).Along with that FPGA can support various low-speed and high-speed interfaces
through custom-designed intellectual property (IP) core. With the characteristics of re-programmability, the system
implemented by FPGA can be reused and extended for other applications[8].
Architecture of Smart Interface
Reference :- Shulong Wang1,2, Yibin Hou1,2, Fang Gao1,2 and Xinrong Ji, A reconfigurable smart interface based on IEEE 1451 and
field
Challenge 3 :-Migration to a New Processor Due to Increased Requirements
As days pass by new features, new interfaces, bigger and complicated displays, more efficient wireless modules
and new sensors are getting evolved. With these evolutions there is a need for increased for more powerful
processors to accommodate extra IOs, higher bandwidth and new interface standards.
But with FPGA this problem can be resolved by using a processor companion FPGA. A low cost FPGA can be used
to augment and supplement processor’s requirement which helps the designer to keep the existing processor and
do few modifications in the firmware.
Solution
As days pass by new features, new interfaces, bigger and complicated displays, more efficient wireless modules
and new sensors are getting evolved. With these evolutions there is a need for increased for more powerful
processors to accommodate extra IOs, higher bandwidth and new interface standards.
But with FPGA this problem can be resolved by using a processor companion FPGA. A low cost FPGA can be used
to augment and supplement processor’s requirement which helps the designer to keep the existing processor and
do few modifications in the firmware.
These companion FPGA can expand number of IOs, control new memory types, bridge to new Serial interface
standards or add more sensors by expanding I2C and SPI serial ports
Unique challenges arise for manufacturing these smart, connected devices like:-
1. Power efficiency
2. Interoperability across different interfaces
3. Compatibility with new processors.
However, solving the most common design problems can be addressed with a programmable logic device like
an FPGA, which offers a low cost, small size, and very low power solution ideal for IoT applications.
References
[2] https://www.edn.com/electronics-blogs/eye-on-iot-/4442318/FPGAs-solve-challenges-at-the-core-of-IoT-implementation
[1] Ajay Rupani1 , Gajendra Sujediya2, A Review of FPGA implementation of Internet of Things
[3] A. Ruta, R. Brzoza-Woch, and K. Zieli ´nski, “On fast developmentof FPGA-based SOA services—machine vision case study,”
Available:http://dx.doi.org/10.1007/s10617-012-9084-z
[4] R. Brzoza-Woch, A. Ruta, and K. Zieli´nski, “Remotely reconfigurable hardware software platform with web service interface
for automated video surveillance,” Journal of Systems Architecture, vol. 59, no. 7, pp. 376 – 388, 2013.
DOI: 10.1016/j.sysarc.2013.05.007. [Online]. Available:http://www.sciencedirect.com/science/article/pii/S138376211300074X
[5] Robert Brzoza-Woch, PiotrNawrocki, “Reconfigurable FPGA-based embedded Web services as distributed computational
nodes,” Position Papers of the FEDCSIS. ŁO´ DZ´, Vol. 6, pp-159-164, 2015.
[6]Muzaffar Rao, Thomas Newe and Ian Grout, Secure Hash Algorithm-3(SHA-3) implementation on Xilinx FPGAs, Suitable for
IoT Applications.
[7] IEEE P1451.2, http://grouper.ieee.org/groups/1451/2 (2003, accessed 10 May 2015).
[8] Shulong Wang1,2, Yibin Hou1,2, Fang Gao1,2 and Xinrong Ji, A reconfigurable smart interface based on IEEE 1451 and field
programmable gate array for multiple Internet of Things devices.
FPGA using IoT

FPGA using IoT

  • 2.
    1. Fundamental Idea 2.Challenge 1- Power Efficiency 3. Challenge 2- Incompatible Interface 4. Challenge 3- Migration to new processor due to increased requirement 5. Conclusion 6. References
  • 3.
    Fundamental Idea Web servicesbased on FPGA hardware have already been realized and defined [2], [3]. Their embedded nature permits the developers to simply adjust those services to energetically interrelate with their surroundings and collect Real-time measurement data or control various actuators [4]. These entities can be called environment-aware Web services in difference to classical Web services that work on remote physical or virtual machines. In the modern era IP address is added to the targeted VHDL Code design in order to make Internet of things (IOTs) enable VLSI Design. Reference :- Ajay Rupani1 , Gajendra Sujediya2, A Review of FPGA implementation of Internet of Things
  • 4.
    IoT Challenges ThatCan Be overcome by FPGA
  • 5.
    Challenge 1 :-Power Efficiency IoT devices are made to be always on for getting stimuli from the surrounding and perform certain tasks accordingly. So “Always On” is the key to devices but this leads to consumption of huge power and the battery power wont last long. Main power consuming elements:- 1. Main processor 2. Processor core at the wireless module 3. Display
  • 6.
    Possible approach tosolve this matter :- 1. Make the IoT device in sleep state and wait for any human interacting or human stimuli to make the device active again. 2. FPGA will determine depending on User command when to turn on or off the processors and display. 3. As per Xilinx if we use Artix-FPGA which consumes low power then it will be easy for us to develop power efficient IoT Devices[6]. 4. Power consumption comparison table for implementation of Secure hash Algorithm-3 on Xilinx FPGA[6]. Reference:- Muzaffar Rao, Thomas Newe and Ian Grout, Secure Hash Algorithm-3(SHA-3) implementation on Xilinx FPGAs, Suitable for IoT Applications Artix-7 FPGA
  • 7.
    Challenge 2 :-Incompatible Interfaces IEEE 1451 protocol focuses on those low-speed devices in IoT such as sensors, actuators, and transducers, while ignoring other high-speed devices or equipment. To solve this issue FPGA was introduced[8]. With the continuous development of IoT applications, the IEEE 1451 is no longer suitable to handle the novel high-speed devices, such as digital camera and USB devices.[8] Market doesn’t fully accept IEEE 1451 because of the high resource cost and complexity for adopting the protocol. Normally, it needs two physical processors for NCAP module and TIM module, as well as the 10-line TII interface is also difficult to be implemented.[7] Reference:- IEEE P1451.2, http://grouper.ieee.org/groups/1451/2 (2003, accessed 10 May 2015).
  • 8.
    FPGA can beconfigured to be multi-core processors and deployed to process different modules in the whole system in comparison to micro control unit (MCU).Along with that FPGA can support various low-speed and high-speed interfaces through custom-designed intellectual property (IP) core. With the characteristics of re-programmability, the system implemented by FPGA can be reused and extended for other applications[8]. Architecture of Smart Interface Reference :- Shulong Wang1,2, Yibin Hou1,2, Fang Gao1,2 and Xinrong Ji, A reconfigurable smart interface based on IEEE 1451 and field
  • 9.
    Challenge 3 :-Migrationto a New Processor Due to Increased Requirements As days pass by new features, new interfaces, bigger and complicated displays, more efficient wireless modules and new sensors are getting evolved. With these evolutions there is a need for increased for more powerful processors to accommodate extra IOs, higher bandwidth and new interface standards. But with FPGA this problem can be resolved by using a processor companion FPGA. A low cost FPGA can be used to augment and supplement processor’s requirement which helps the designer to keep the existing processor and do few modifications in the firmware.
  • 10.
    Solution As days passby new features, new interfaces, bigger and complicated displays, more efficient wireless modules and new sensors are getting evolved. With these evolutions there is a need for increased for more powerful processors to accommodate extra IOs, higher bandwidth and new interface standards. But with FPGA this problem can be resolved by using a processor companion FPGA. A low cost FPGA can be used to augment and supplement processor’s requirement which helps the designer to keep the existing processor and do few modifications in the firmware. These companion FPGA can expand number of IOs, control new memory types, bridge to new Serial interface standards or add more sensors by expanding I2C and SPI serial ports
  • 11.
    Unique challenges arisefor manufacturing these smart, connected devices like:- 1. Power efficiency 2. Interoperability across different interfaces 3. Compatibility with new processors. However, solving the most common design problems can be addressed with a programmable logic device like an FPGA, which offers a low cost, small size, and very low power solution ideal for IoT applications.
  • 12.
    References [2] https://www.edn.com/electronics-blogs/eye-on-iot-/4442318/FPGAs-solve-challenges-at-the-core-of-IoT-implementation [1] AjayRupani1 , Gajendra Sujediya2, A Review of FPGA implementation of Internet of Things [3] A. Ruta, R. Brzoza-Woch, and K. Zieli ´nski, “On fast developmentof FPGA-based SOA services—machine vision case study,” Available:http://dx.doi.org/10.1007/s10617-012-9084-z [4] R. Brzoza-Woch, A. Ruta, and K. Zieli´nski, “Remotely reconfigurable hardware software platform with web service interface for automated video surveillance,” Journal of Systems Architecture, vol. 59, no. 7, pp. 376 – 388, 2013. DOI: 10.1016/j.sysarc.2013.05.007. [Online]. Available:http://www.sciencedirect.com/science/article/pii/S138376211300074X [5] Robert Brzoza-Woch, PiotrNawrocki, “Reconfigurable FPGA-based embedded Web services as distributed computational nodes,” Position Papers of the FEDCSIS. ŁO´ DZ´, Vol. 6, pp-159-164, 2015.
  • 13.
    [6]Muzaffar Rao, ThomasNewe and Ian Grout, Secure Hash Algorithm-3(SHA-3) implementation on Xilinx FPGAs, Suitable for IoT Applications. [7] IEEE P1451.2, http://grouper.ieee.org/groups/1451/2 (2003, accessed 10 May 2015). [8] Shulong Wang1,2, Yibin Hou1,2, Fang Gao1,2 and Xinrong Ji, A reconfigurable smart interface based on IEEE 1451 and field programmable gate array for multiple Internet of Things devices.