This document contains a list of figures for an FPGA project, including figures showing the internal structure of FPGAs, the Spartan 3 FPGA board used, how to connect power and JTAG cables, pin configurations, using impact to program the FPGA, boundary scan, programming and verification processes, and figures demonstrating logic operations like multiplication, addition, subtraction, and, or, nand, nor, xor, xnor and no operation using FPGA logic blocks.

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LIST OF FIGURES
FIGURE 1.1 : Internal Structure of FPGA 2
FIGURE 1.2 : Simplified Internal Structure of FPGA 3
FIGURE 2.1 : SPARTAN 3 FPGA 5
FIGURE 2.2 : POWER CABLE 6
FIGURE 2.3 :JTAG CABLE 7
FIGURE 2.4 : XC3S400_PQ208 Pin Configuration 8
FIGURE 3.1 : Check Syntax 14
FIGURE 3.2 : Generating Programming File 15
FIGURE 3.3 Assigning Required Pins 16
FIGURE 4.1 : Configure Device IMPACT 17
FIGURE : 4.2 Boundary Scan 18
FIGURE : 4.3 Programming and verifying 19
FIGURE 4.4: Progress Dialogue 20
FIGURE 4.4 : Program Succeed window 21
FIGURE 5.1: Multiplication 22
FIGURE 5.2 : Addition 23
FIGURE 5.3 : Subtraction 24
FIGURE 5.4 : AND Operation 25
FIGURE 5.5 : OR Operation 26
FIGURE 5.5 : NAND Operation 27
FIGURE 5.6 : NOR Operation 28
FIGURE 5.7 : XOR Operation 29
FIGURE 5.8 : XNOR Operation 30
FIGURE 5.9 : NO OPERATION 31