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EC-252: COMPUTER ARCHITECTURE
AND MICROPROCESSORS
Vaskar Raychoudhury
Indian Institute of Technology Roorkee
What is an Instruction Set?
The complete collection of instructions that are
understood by a CPU
Machine Code
Binary
2
Binary
Usually represented by assembly codes
Elements of an Instruction
Operation code (Op code)
Do this
Source Operand reference
To this
3
To this
Result Operand reference
Put the answer here
Next Instruction Reference
When you have done that, do this...
Where have all the Operands Gone?
Main memory (or virtual memory or cache)
CPU register
I/O device
(Immediate)
4
(Immediate)
Instruction Representation
In machine code each instruction has a unique bit
pattern
For human consumption (well, programmers anyway)
a symbolic representation is used
5
a symbolic representation is used
e.g. ADD, SUB, LOAD
Operands can also be represented in this way
ADD A, B
Simple Instruction Format
6
Instruction Types
Data processing
Data storage (main memory)
Data movement (I/O)
Program flow control
7
Program flow control
Number of Addresses (a)
3 addresses
Operand 1, Operand 2, Result
a = b + c;
May be a fourth - next instruction (usually implicit)
8
May be a fourth - next instruction (usually implicit)
Not common
Needs very long words to hold everything
Number of Addresses (b)
2 addresses
One address doubles as operand and result
a = a + b
Reduces length of instruction
9
Reduces length of instruction
Requires some extra work
Temporary storage to hold some results
Number of Addresses (c)
1 address
Implicit second address
Usually a register (accumulator)
Common on early machines
10
Common on early machines
Number of Addresses (d)
0 (zero) addresses
All addresses implicit
Uses a stack
e.g. push a
11
e.g. push a
push b
add
pop c
c = a + b
How Many Addresses
More addresses
More complex (powerful?) instructions
More registers
Inter-register operations are quicker
12
Inter-register operations are quicker
Fewer instructions per program
Fewer addresses
Less complex (powerful?) instructions
More instructions per program
Faster fetch/execution of instructions
Design Decisions (1)
Operation repertoire
How many ops?
What can they do?
How complex are they?
13
How complex are they?
Data types
Instruction formats
Length of op code field
Number of addresses
Design Decisions (2)
Registers
Number of CPU registers available
Which operations can be performed on which
registers?
14
Addressing modes (later…)
RISC v CISC
Types of Operand
Addresses
Numbers
Integer/floating point
Characters
15
Characters
ASCII etc.
Logical Data
Bits or flags
Types of Operation
Data Transfer
Source, Destination, Amount of data
Arithmetic
Logical
Bitwise operations
16
AND, OR, NOT
Conversion
Binary to Decimal
I/O
System Control
OS specific operations
Transfer of Control
Branch, Skip, Subroutine call (e.g., interrupt)
Arithmetic
Add, Subtract, Multiply, Divide
Signed Integer
Floating point ?
May include
17
May include
Increment (a++)
Decrement (a--)
Negate (-a)
Addressing Modes
Immediate
Direct
Indirect
Register
18
Register
Register Indirect
Displacement (Indexed)
Stack
Immediate Addressing
Operand is part of instruction
Operand = address field
e.g. ADD 5
Add 5 to contents of accumulator
19
Add 5 to contents of accumulator
5 is operand
No memory reference to fetch data
Fast
Limited range
Immediate Addressing Diagram
OperandOpcode
Instruction
20
Direct Addressing
Address field contains address of operand
Effective address (EA) = address field (A)
e.g. ADD A
Add contents of cell A to accumulator
21
Add contents of cell A to accumulator
Look in memory at address A for operand
Single memory reference to access data
No additional calculations to work out effective
address
Limited address space
Direct Addressing Diagram
Address AOpcode
Instruction
Memory
22
Operand
Indirect Addressing (1)
Memory cell pointed to by address field contains
the address of (pointer to) the operand
EA = (A)
Look in A, find address (A) and look there for operand
23
Look in A, find address (A) and look there for operand
e.g. ADD (A)
Add contents of cell pointed to by contents of A to
accumulator
Indirect Addressing (2)
Large address space
2n where n = word length
May be nested, multilevel, cascaded
e.g. EA = (((A)))
24
e.g. EA = (((A)))
Draw the diagram yourself
Multiple memory accesses to find operand
Hence slower
Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Pointer to operand
25
Operand
Register Addressing (1)
Operand is held in register named in address filed
EA = R
Limited number of registers
Very small address field needed
26
Very small address field needed
Shorter instructions
Faster instruction fetch
Register Addressing (2)
No memory access
Very fast execution
Very limited address space
Multiple registers helps performance
27
Multiple registers helps performance
Requires good assembly programming or compiler
writing
N.B. C programming
register int a;
c.f. Direct addressing
Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
28
Operand
Register Indirect Addressing
C.f. indirect addressing
EA = (R)
Operand is in memory cell pointed to by contents of
register R
29
register R
Large address space (2n)
One fewer memory access than indirect addressing
Register Indirect Addressing Diagram
Register Address ROpcode
Instruction
Memory
30
OperandPointer to Operand
Registers
Displacement Addressing
EA = A + (R)
Address field hold two values
A = base value
R = register that holds displacement
31
R = register that holds displacement
or vice versa
Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
Address A
32
OperandPointer to Operand
Registers
+
Relative Addressing
A version of displacement addressing
R = Program counter, PC
EA = A + (PC)
i.e. get operand from A cells from current location
33
i.e. get operand from A cells from current location
pointed to by PC
c.f locality of reference & cache usage
Base-Register Addressing
A holds displacement
R holds pointer to base address
R may be explicit or implicit
e.g. segment registers in 80x86
34
e.g. segment registers in 80x86
Indexed Addressing
A = base
R = displacement
EA = A + R
Good for accessing arrays
35
Good for accessing arrays
EA = A + R
R++
Combinations
Postindex
EA = (A) + (R)
Preindex
36
Preindex
EA = (A+(R))
(Draw the diagrams)
Stack Addressing
Operand is (implicitly) on top of stack
e.g.
ADD Pop top two items from stack
and add
37
and add

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Ec 252 ec-252-l10-instruction sets and addressing modes

  • 1. EC-252: COMPUTER ARCHITECTURE AND MICROPROCESSORS Vaskar Raychoudhury Indian Institute of Technology Roorkee
  • 2. What is an Instruction Set? The complete collection of instructions that are understood by a CPU Machine Code Binary 2 Binary Usually represented by assembly codes
  • 3. Elements of an Instruction Operation code (Op code) Do this Source Operand reference To this 3 To this Result Operand reference Put the answer here Next Instruction Reference When you have done that, do this...
  • 4. Where have all the Operands Gone? Main memory (or virtual memory or cache) CPU register I/O device (Immediate) 4 (Immediate)
  • 5. Instruction Representation In machine code each instruction has a unique bit pattern For human consumption (well, programmers anyway) a symbolic representation is used 5 a symbolic representation is used e.g. ADD, SUB, LOAD Operands can also be represented in this way ADD A, B
  • 7. Instruction Types Data processing Data storage (main memory) Data movement (I/O) Program flow control 7 Program flow control
  • 8. Number of Addresses (a) 3 addresses Operand 1, Operand 2, Result a = b + c; May be a fourth - next instruction (usually implicit) 8 May be a fourth - next instruction (usually implicit) Not common Needs very long words to hold everything
  • 9. Number of Addresses (b) 2 addresses One address doubles as operand and result a = a + b Reduces length of instruction 9 Reduces length of instruction Requires some extra work Temporary storage to hold some results
  • 10. Number of Addresses (c) 1 address Implicit second address Usually a register (accumulator) Common on early machines 10 Common on early machines
  • 11. Number of Addresses (d) 0 (zero) addresses All addresses implicit Uses a stack e.g. push a 11 e.g. push a push b add pop c c = a + b
  • 12. How Many Addresses More addresses More complex (powerful?) instructions More registers Inter-register operations are quicker 12 Inter-register operations are quicker Fewer instructions per program Fewer addresses Less complex (powerful?) instructions More instructions per program Faster fetch/execution of instructions
  • 13. Design Decisions (1) Operation repertoire How many ops? What can they do? How complex are they? 13 How complex are they? Data types Instruction formats Length of op code field Number of addresses
  • 14. Design Decisions (2) Registers Number of CPU registers available Which operations can be performed on which registers? 14 Addressing modes (later…) RISC v CISC
  • 15. Types of Operand Addresses Numbers Integer/floating point Characters 15 Characters ASCII etc. Logical Data Bits or flags
  • 16. Types of Operation Data Transfer Source, Destination, Amount of data Arithmetic Logical Bitwise operations 16 AND, OR, NOT Conversion Binary to Decimal I/O System Control OS specific operations Transfer of Control Branch, Skip, Subroutine call (e.g., interrupt)
  • 17. Arithmetic Add, Subtract, Multiply, Divide Signed Integer Floating point ? May include 17 May include Increment (a++) Decrement (a--) Negate (-a)
  • 19. Immediate Addressing Operand is part of instruction Operand = address field e.g. ADD 5 Add 5 to contents of accumulator 19 Add 5 to contents of accumulator 5 is operand No memory reference to fetch data Fast Limited range
  • 21. Direct Addressing Address field contains address of operand Effective address (EA) = address field (A) e.g. ADD A Add contents of cell A to accumulator 21 Add contents of cell A to accumulator Look in memory at address A for operand Single memory reference to access data No additional calculations to work out effective address Limited address space
  • 22. Direct Addressing Diagram Address AOpcode Instruction Memory 22 Operand
  • 23. Indirect Addressing (1) Memory cell pointed to by address field contains the address of (pointer to) the operand EA = (A) Look in A, find address (A) and look there for operand 23 Look in A, find address (A) and look there for operand e.g. ADD (A) Add contents of cell pointed to by contents of A to accumulator
  • 24. Indirect Addressing (2) Large address space 2n where n = word length May be nested, multilevel, cascaded e.g. EA = (((A))) 24 e.g. EA = (((A))) Draw the diagram yourself Multiple memory accesses to find operand Hence slower
  • 25. Indirect Addressing Diagram Address AOpcode Instruction Memory Pointer to operand 25 Operand
  • 26. Register Addressing (1) Operand is held in register named in address filed EA = R Limited number of registers Very small address field needed 26 Very small address field needed Shorter instructions Faster instruction fetch
  • 27. Register Addressing (2) No memory access Very fast execution Very limited address space Multiple registers helps performance 27 Multiple registers helps performance Requires good assembly programming or compiler writing N.B. C programming register int a; c.f. Direct addressing
  • 28. Register Addressing Diagram Register Address ROpcode Instruction Registers 28 Operand
  • 29. Register Indirect Addressing C.f. indirect addressing EA = (R) Operand is in memory cell pointed to by contents of register R 29 register R Large address space (2n) One fewer memory access than indirect addressing
  • 30. Register Indirect Addressing Diagram Register Address ROpcode Instruction Memory 30 OperandPointer to Operand Registers
  • 31. Displacement Addressing EA = A + (R) Address field hold two values A = base value R = register that holds displacement 31 R = register that holds displacement or vice versa
  • 32. Displacement Addressing Diagram Register ROpcode Instruction Memory Address A 32 OperandPointer to Operand Registers +
  • 33. Relative Addressing A version of displacement addressing R = Program counter, PC EA = A + (PC) i.e. get operand from A cells from current location 33 i.e. get operand from A cells from current location pointed to by PC c.f locality of reference & cache usage
  • 34. Base-Register Addressing A holds displacement R holds pointer to base address R may be explicit or implicit e.g. segment registers in 80x86 34 e.g. segment registers in 80x86
  • 35. Indexed Addressing A = base R = displacement EA = A + R Good for accessing arrays 35 Good for accessing arrays EA = A + R R++
  • 36. Combinations Postindex EA = (A) + (R) Preindex 36 Preindex EA = (A+(R)) (Draw the diagrams)
  • 37. Stack Addressing Operand is (implicitly) on top of stack e.g. ADD Pop top two items from stack and add 37 and add