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Lecture 02- Instruction Set Architecture
EEE-440
1
EEE 440
Computer Architecture
EEE-440
2
Computer Program
 Instructions & Data
 Binary Numbers
 Assembly Language
 Low Level close to hardware
 One line instruction
 Assembler
 High Level Language
 Compiler
EEE-440 3
Benefits of HLL
 Closer to Natural Languages
 C++
 FORTRAN scientific computation
 COBOL business data processing
 Increased Programmer productivity
 Small and concise code
 Easy and Quick Programming
 Independent of Hardware Platform
 Compiler converts HLL code to target code
EEE-440
4
Assembly Language
 Basic job of a CPU: execute lots of instructions.
 Instructions are the primitive operations that the
CPU may execute.
 Different CPUs implement different sets of
instructions. The set of instructions a particular
CPU implements is an Instruction Set Architecture
(ISA).
 Examples: Intel 80x86 (Pentium 4), IBM/Motorola
PowerPC (Macintosh), MIPS, Intel IA64, ...
EEE-440
5
Instruction Set Architectures
 Early trend was to add more and more instructions
to new CPUs to do elaborate operations
 VAX architecture had an instruction to multiply
polynomials!
 RISC philosophy (Cocke IBM, Patterson, Hennessy,
1980s) –
Reduced Instruction Set Computing
 Keep the instruction set small and simple, makes it
easier to build fast hardware.
 Let software do complicated operations by
composing simpler ones.
EEE-440
6
MIPS Architecture
 MIPS – semiconductor company that built
one of the first commercial RISC
architectures
 We will study the MIPS architecture in
detail in this class
 Why MIPS instead of Intel 80x86?
 MIPS is simple, elegant. Don’t want to get
bogged down in gritty details.
 MIPS widely used in embedded apps, x86
little used in embedded, and more
embedded computers than PCs
 NEC, Silicon Graphics, Nintendo, Sony etc.
EEE-440
7
RISC - Reduced Instruction Set Computer
 RISC philosophy
 fixed instruction lengths
 load-store instruction sets
 limited addressing modes
 limited operations
 MIPS, Sun SPARC, HP PA-RISC, IBM PowerPC,
Intel (Compaq) Alpha, …
 Instruction sets are measured by how well
compilers use them as opposed to how well
assembly language programmers use them
EEE-440
8
Assembly Variables: Registers
 Unlike HLL like C or Java, assembly cannot use
variables
 Why not? Keep Hardware Simple
 Assembly Operands are registers
 limited number of special locations built directly
into the hardware
 operations can only be performed on these!
 Benefit: Since registers are directly in hardware,
they are very fast
(faster than 1 billionth of a second)
EEE-440
9
Assembly Variables: Registers
 Drawback: Since registers are in hardware, there
are a predetermined number of them
 Solution: MIPS code must be very carefully put
together to efficiently use registers
 32 registers in MIPS
 Why 32? Smaller is faster
 Each MIPS register is 32 bits wide
 Groups of 32 bits called a word in MIPS
EEE-440
10
EEE-440
11
MIPS Registers
Name Reg. No. Usage Preserved on
Call?
$zero 0 const. value n.a.
$v0 - $v1 2-3 values No
$a0 - $a3 4-7 arguments Yes
$t0 - $t7 8-15 temporaries No
$s0 - $s7 16-23 saved Yes
$t8 - $t9 24-25 temporaries No
$gp 28 Global pointer Yes
$sp 29 Stack pointer Yes
$fp 30 Frame Pointer Yes
$ra 31 Return address Yes
Category Instr Op Code Example Meaning
Arithmetic
(R & I
format)
add 0 and 32 add $s1, $s2, $s3 $s1 = $s2 + $s3
subtract 0 and 34 sub $s1, $s2, $s3 $s1 = $s2 - $s3
add immediate 8 addi $s1, $s2, 6 $s1 = $s2 + 6
or immediate 13 ori $s1, $s2, 6 $s1 = $s2 v 6
Data
Transfer
(I format)
load word 35 lw $s1, 24($s2) $s1 = Memory($s2+24)
store word 43 sw $s1, 24($s2) Memory($s2+24) = $s1
load byte 32 lb $s1, 25($s2) $s1 = Memory($s2+25)
store byte 40 sb $s1, 25($s2) Memory($s2+25) = $s1
load upper imm 15 lui $s1, 6 $s1 = 6 * 216
Cond.
Branch
(I & R
format)
br on equal 4 beq $s1, $s2, L if ($s1==$s2) go to L
br on not equal 5 bne $s1, $s2, L if ($s1 !=$s2) go to L
set on less than 0 and 42 slt $s1, $s2, $s3 if ($s2<$s3) $s1=1 else
$s1=0
set on less than
immediate
10 slti $s1, $s2, 6 if ($s2<6) $s1=1 else
$s1=0
Uncond.
Jump
(J & R
format)
jump 2 j 2500 go to 10000
jump register 0 and 8 jr $t1 go to $t1
jump and link 3 jal 2500 go to 10000; $ra=PC+4
EEE-440
14
Assembly Variables: Registers
 Registers are numbered from 0 to 31
 Each register can be referred to by number or
name
 Number references:
$0, $1, $2, … $30, $31
EEE-440
15
Assembly Variables: Registers
 By convention, each register also has a name to
make it easier to code
 For now:
$16 - $23  $s0 - $s7
(correspond to C variables)
$8 - $15  $t0 - $t7
(correspond to temporary variables)
Later will explain other 16 register names
 In general, use names to make your code more
readable
EEE-440
16
C, Java variables vs. registers
 In C (and most High Level Languages) variables
declared first and given a type
 Example:
int fahr, celsius;
char a, b, c, d, e;
 Each variable can ONLY represent a value of the
type it was declared as (cannot mix and match int
and char variables).
 In Assembly Language, the registers have no type;
operation determines how register contents are
treated
EEE-440
17
Comments in Assembly
 Another way to make your code more readable:
comments!
 Hash (#) is used for MIPS comments
 anything from hash mark to end of line is a
comment and will be ignored
 This is just like the C //
 Note: Different from C.
 C comments have format
/* comment */
so they can span many lines
EEE-440
18
Assembly Instructions
 In assembly language, each statement (called an
Instruction), executes exactly one of a short list of
simple commands
 Unlike in C (and most other High Level
Languages), each line of assembly code contains at
most 1 instruction
 Instructions are related to operations (=, +, -, *, /)
in C or Java
EEE-440
19
MIPS Addition and Subtraction
 Syntax of Instructions:
1 2,3,4
where:
1) operation by name
2) operand getting result (“destination”)
3) 1st operand for operation (“source1”)
4) 2nd operand for operation (“source2”)
 Syntax is rigid:
 1 operator, 3 operands
 Why? Keep Hardware simple via regularity
EEE-440
20
Addition and Subtraction of
Integers
 Addition in Assembly
 Example: add $s0,$s1,$s2 (in MIPS)
Equivalent to: a = b + c (in C)
where MIPS registers $s0,$s1,$s2 are associated
with C variables a, b, c
 Subtraction in Assembly
 Example: sub $s3,$s4,$s5 (in MIPS)
Equivalent to: d = e - f (in C)
where MIPS registers $s3,$s4,$s5 are associated
with C variables d, e, f
 Instructions, like registers and words of data, are 32
bits long
 Arithmetic Instruction Format (R format):
add $t0, $s1, $s2
Add Instruction
op rs rt rd shamt funct
op 6-bits opcode that specifies the operation
rs 5-bits register file address of the first source operand
rt 5-bits register file address of the second source operand
rd 5-bits register file address of the result’s destination
shamt 5-bits shift amount (for shift instructions)
funct 6-bits function code augmenting the opcode
EE204 L04-ISA
21
EEE-440
22
EEE-440
23
Addition and Subtraction of
Integers
 How do the following C statement?
a = b + c + d - e;
 Break into multiple instructions
add $t0, $s1, $s2 # temp = b + c
add $t0, $t0, $s3 # temp = temp + d
sub $s0, $t0, $s4 # a = temp - e
 Notice: A single line of C may break up into several
lines of MIPS.
 Notice: Everything after the hash mark on each line
is ignored (comments)
EEE-440
24
Addition and Subtraction of
Integers
 How do we do this?
f = (g + h) - (i + j);
 Use intermediate temporary register
add $t0,$s1,$s2 # temp = g + h
add $t1,$s3,$s4 # temp = i + j
sub $s0,$t0,$t1 # f=(g+h)-(i+j)
EEE-440
25
Register Zero
 One particular immediate, the number zero (0),
appears very often in code.
 So we define register zero ($0 or $zero) to
always have the value 0; eg
add $s0,$s1,$zero (in MIPS)
f = g (in C)
where MIPS registers $s0,$s1 are associated with
C variables f, g
 defined in hardware, so an instruction
add $zero,$zero,$s0
will not do anything!
EEE-440
26
Immediates
 Immediates are numerical constants.
 They appear often in code, so there are special
instructions for them.
 Add Immediate:
addi $s0,$s1,10 (in MIPS)
f = g + 10 (in C)
where MIPS registers $s0,$s1 are associated with
C variables f, g
 Syntax similar to add instruction, except that last
argument is a number instead of a register.

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ISA.pptx

  • 1. Lecture 02- Instruction Set Architecture EEE-440 1 EEE 440 Computer Architecture
  • 2. EEE-440 2 Computer Program  Instructions & Data  Binary Numbers  Assembly Language  Low Level close to hardware  One line instruction  Assembler  High Level Language  Compiler
  • 3. EEE-440 3 Benefits of HLL  Closer to Natural Languages  C++  FORTRAN scientific computation  COBOL business data processing  Increased Programmer productivity  Small and concise code  Easy and Quick Programming  Independent of Hardware Platform  Compiler converts HLL code to target code
  • 4. EEE-440 4 Assembly Language  Basic job of a CPU: execute lots of instructions.  Instructions are the primitive operations that the CPU may execute.  Different CPUs implement different sets of instructions. The set of instructions a particular CPU implements is an Instruction Set Architecture (ISA).  Examples: Intel 80x86 (Pentium 4), IBM/Motorola PowerPC (Macintosh), MIPS, Intel IA64, ...
  • 5. EEE-440 5 Instruction Set Architectures  Early trend was to add more and more instructions to new CPUs to do elaborate operations  VAX architecture had an instruction to multiply polynomials!  RISC philosophy (Cocke IBM, Patterson, Hennessy, 1980s) – Reduced Instruction Set Computing  Keep the instruction set small and simple, makes it easier to build fast hardware.  Let software do complicated operations by composing simpler ones.
  • 6. EEE-440 6 MIPS Architecture  MIPS – semiconductor company that built one of the first commercial RISC architectures  We will study the MIPS architecture in detail in this class  Why MIPS instead of Intel 80x86?  MIPS is simple, elegant. Don’t want to get bogged down in gritty details.  MIPS widely used in embedded apps, x86 little used in embedded, and more embedded computers than PCs  NEC, Silicon Graphics, Nintendo, Sony etc.
  • 7. EEE-440 7 RISC - Reduced Instruction Set Computer  RISC philosophy  fixed instruction lengths  load-store instruction sets  limited addressing modes  limited operations  MIPS, Sun SPARC, HP PA-RISC, IBM PowerPC, Intel (Compaq) Alpha, …  Instruction sets are measured by how well compilers use them as opposed to how well assembly language programmers use them
  • 8. EEE-440 8 Assembly Variables: Registers  Unlike HLL like C or Java, assembly cannot use variables  Why not? Keep Hardware Simple  Assembly Operands are registers  limited number of special locations built directly into the hardware  operations can only be performed on these!  Benefit: Since registers are directly in hardware, they are very fast (faster than 1 billionth of a second)
  • 9. EEE-440 9 Assembly Variables: Registers  Drawback: Since registers are in hardware, there are a predetermined number of them  Solution: MIPS code must be very carefully put together to efficiently use registers  32 registers in MIPS  Why 32? Smaller is faster  Each MIPS register is 32 bits wide  Groups of 32 bits called a word in MIPS
  • 12. MIPS Registers Name Reg. No. Usage Preserved on Call? $zero 0 const. value n.a. $v0 - $v1 2-3 values No $a0 - $a3 4-7 arguments Yes $t0 - $t7 8-15 temporaries No $s0 - $s7 16-23 saved Yes $t8 - $t9 24-25 temporaries No $gp 28 Global pointer Yes $sp 29 Stack pointer Yes $fp 30 Frame Pointer Yes $ra 31 Return address Yes
  • 13. Category Instr Op Code Example Meaning Arithmetic (R & I format) add 0 and 32 add $s1, $s2, $s3 $s1 = $s2 + $s3 subtract 0 and 34 sub $s1, $s2, $s3 $s1 = $s2 - $s3 add immediate 8 addi $s1, $s2, 6 $s1 = $s2 + 6 or immediate 13 ori $s1, $s2, 6 $s1 = $s2 v 6 Data Transfer (I format) load word 35 lw $s1, 24($s2) $s1 = Memory($s2+24) store word 43 sw $s1, 24($s2) Memory($s2+24) = $s1 load byte 32 lb $s1, 25($s2) $s1 = Memory($s2+25) store byte 40 sb $s1, 25($s2) Memory($s2+25) = $s1 load upper imm 15 lui $s1, 6 $s1 = 6 * 216 Cond. Branch (I & R format) br on equal 4 beq $s1, $s2, L if ($s1==$s2) go to L br on not equal 5 bne $s1, $s2, L if ($s1 !=$s2) go to L set on less than 0 and 42 slt $s1, $s2, $s3 if ($s2<$s3) $s1=1 else $s1=0 set on less than immediate 10 slti $s1, $s2, 6 if ($s2<6) $s1=1 else $s1=0 Uncond. Jump (J & R format) jump 2 j 2500 go to 10000 jump register 0 and 8 jr $t1 go to $t1 jump and link 3 jal 2500 go to 10000; $ra=PC+4
  • 14. EEE-440 14 Assembly Variables: Registers  Registers are numbered from 0 to 31  Each register can be referred to by number or name  Number references: $0, $1, $2, … $30, $31
  • 15. EEE-440 15 Assembly Variables: Registers  By convention, each register also has a name to make it easier to code  For now: $16 - $23  $s0 - $s7 (correspond to C variables) $8 - $15  $t0 - $t7 (correspond to temporary variables) Later will explain other 16 register names  In general, use names to make your code more readable
  • 16. EEE-440 16 C, Java variables vs. registers  In C (and most High Level Languages) variables declared first and given a type  Example: int fahr, celsius; char a, b, c, d, e;  Each variable can ONLY represent a value of the type it was declared as (cannot mix and match int and char variables).  In Assembly Language, the registers have no type; operation determines how register contents are treated
  • 17. EEE-440 17 Comments in Assembly  Another way to make your code more readable: comments!  Hash (#) is used for MIPS comments  anything from hash mark to end of line is a comment and will be ignored  This is just like the C //  Note: Different from C.  C comments have format /* comment */ so they can span many lines
  • 18. EEE-440 18 Assembly Instructions  In assembly language, each statement (called an Instruction), executes exactly one of a short list of simple commands  Unlike in C (and most other High Level Languages), each line of assembly code contains at most 1 instruction  Instructions are related to operations (=, +, -, *, /) in C or Java
  • 19. EEE-440 19 MIPS Addition and Subtraction  Syntax of Instructions: 1 2,3,4 where: 1) operation by name 2) operand getting result (“destination”) 3) 1st operand for operation (“source1”) 4) 2nd operand for operation (“source2”)  Syntax is rigid:  1 operator, 3 operands  Why? Keep Hardware simple via regularity
  • 20. EEE-440 20 Addition and Subtraction of Integers  Addition in Assembly  Example: add $s0,$s1,$s2 (in MIPS) Equivalent to: a = b + c (in C) where MIPS registers $s0,$s1,$s2 are associated with C variables a, b, c  Subtraction in Assembly  Example: sub $s3,$s4,$s5 (in MIPS) Equivalent to: d = e - f (in C) where MIPS registers $s3,$s4,$s5 are associated with C variables d, e, f
  • 21.  Instructions, like registers and words of data, are 32 bits long  Arithmetic Instruction Format (R format): add $t0, $s1, $s2 Add Instruction op rs rt rd shamt funct op 6-bits opcode that specifies the operation rs 5-bits register file address of the first source operand rt 5-bits register file address of the second source operand rd 5-bits register file address of the result’s destination shamt 5-bits shift amount (for shift instructions) funct 6-bits function code augmenting the opcode EE204 L04-ISA 21
  • 23. EEE-440 23 Addition and Subtraction of Integers  How do the following C statement? a = b + c + d - e;  Break into multiple instructions add $t0, $s1, $s2 # temp = b + c add $t0, $t0, $s3 # temp = temp + d sub $s0, $t0, $s4 # a = temp - e  Notice: A single line of C may break up into several lines of MIPS.  Notice: Everything after the hash mark on each line is ignored (comments)
  • 24. EEE-440 24 Addition and Subtraction of Integers  How do we do this? f = (g + h) - (i + j);  Use intermediate temporary register add $t0,$s1,$s2 # temp = g + h add $t1,$s3,$s4 # temp = i + j sub $s0,$t0,$t1 # f=(g+h)-(i+j)
  • 25. EEE-440 25 Register Zero  One particular immediate, the number zero (0), appears very often in code.  So we define register zero ($0 or $zero) to always have the value 0; eg add $s0,$s1,$zero (in MIPS) f = g (in C) where MIPS registers $s0,$s1 are associated with C variables f, g  defined in hardware, so an instruction add $zero,$zero,$s0 will not do anything!
  • 26. EEE-440 26 Immediates  Immediates are numerical constants.  They appear often in code, so there are special instructions for them.  Add Immediate: addi $s0,$s1,10 (in MIPS) f = g + 10 (in C) where MIPS registers $s0,$s1 are associated with C variables f, g  Syntax similar to add instruction, except that last argument is a number instead of a register.